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2015-03-27gpio: omap: convert debounce functions switch to use gpio offsetGrygorii Strashko1-7/+7
Convert debounce functions to use GPIO offset instead of system GPIO numbers. This allows to drop unneeded conversations between system GPIO <-> GPIO offset which are done in many places and many times. It is safe to do now because: - gpiolib always passes GPIO offset to GPIO controller - OMAP GPIO driver converted to use IRQ domain This is preparation step before removing: #define GPIO_INDEX(bank, gpio) #define GPIO_BIT(bank, gpio) int omap_irq_to_gpio() Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-27gpio: omap: simplify omap_set_gpio_dataout_x()Grygorii Strashko1-5/+5
Both functions omap_set_gpio_dataout_reg() and omap_set_gpio_dataout_mask() accept GPIO offset as 'gpio' input parameter, so rename it to 'offset' and drop usage of GPIO_BIT() macro. Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-27gpio: omap: convert omap_gpio_is_input() to use gpio offsetGrygorii Strashko1-6/+4
Convert omap_gpio_is_input() to use GPIO offset instead of mask and, in such way, make code simpler and remove few lines of code. Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-27altera_gpio_probe() can be statickbuild test robot1-1/+1
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-26gpio: rcar: Prevent module clock disable when wake-up is enabledGeert Uytterhoeven1-2/+31
When the GPIO module is needed for wake-up, it's module clock must not be disabled. Hence implement irq_chip.irq_set_wake(), which increments/decrements the clock's enable_count when needed, and forwards the wake-up state to the upstream interrupt controller. This fixes wake-up from s2ram using gpio-keys when using a PM Domain to manage the module clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-26gpio: rcar: Add more register documentationGeert Uytterhoeven1-12/+12
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-26gpio: rcar: Use local variable gpio_chip in gpio_rcar_probe()Geert Uytterhoeven1-3/+3
The existing variable gpio_chip already points to the gpiochip instance, hence use it everywhere. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-26gpio/crystalcove: Add additional GPIO for Panel controlShobhit Kumar1-1/+6
Export PANEL_EN/DISABLE (offset 0x52) as additional GPIO. Needed by display driver to enable the DSI panel on BYT platform where the Panel EN/Disable control is routed thorugh CRC PMIC CC: Samuel Ortiz <sameo@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-19gpio: dwapb: enable for QuarkAndy Shevchenko1-2/+1
The Intel Quark SoC contains the DW GPIO on board. While fixing the build error the commit 1972c97db5b0 (gpio: dwapb: fix compile errors) disables the possibility to build the driver on X86, i.e. Intel Quark. The patch reenables it for Intel Quark as well. Since we have Intel Quark SoC introduced in 4.0-rc1 I would like to make this fix available there as well, though the actual MFD driver [1] is applied only for next version. [1] https://lkml.org/lkml/2015/2/1/217 Fixes: 1972c97db5b0 (gpio: dwapb: fix compile errors) Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-19gpio / ACPI: Use local variable instead of ACPI_HANDLE()Rafael J. Wysocki1-1/+1
In acpi_gpiochip_request_interrupts() the handle local variable already contains the value that we want to pass to acpi_walk_resources(), so it is better to use that variable instead of evaluating ACPI_HANDLE() once more for the same device. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-19gpio / ACPI: Avoid unnecessary checks in __gpiod_get_index()Rafael J. Wysocki1-7/+9
If dev is NULL in __gpiod_get_index() and both ACPI and OF are enabled, it will be checked twice before the code decides to give up with DT/ACPI lookup, so avoid that. Also use the observation that ACPI_COMPANION() is much more efficient than ACPI_HANDLE(), because the latter uses the former and carries out a check and a pointer dereference on top of it, so replace the ACPI_HANDLE() check with an ACPI_COMPANION() one which does not require the additional IS_ENABLED(CONFIG_ACPI) check too. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-17gpio: f7188x: add GPIO support for F71869AAndreas Bofjall2-5/+25
Add support for the GPIOs found on the Fintek SuperI/O chip F71869A, such as the one found on the Jetway JNF99-525 motherboard, to the f7188x gpio driver. Signed-off-by: Andreas Bofjall <andreas@gazonk.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-17gpio: f7188x: add GPIO support for F71869Andreas Bofjall2-5/+24
Add support for the GPIOs found on the Fintek SuperI/O chip F71869, such as the one found on the Jetway NF96u-525 motherboard, to the f7188x gpio driver. Signed-off-by: Andreas Bofjall <andreas@gazonk.org> Tested-by: Les Schaffer <schaffer@optonline.net> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-17gpio: f7188x: correct spelling of "Fintek"Andreas Bofjall1-1/+1
The company is called "Fintek", not "Fintech". Fix it. Signed-off-by: Andreas Bofjall <andreas@gazonk.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-17gpio: fix constconst in devresLinus Walleij1-1/+1
Commit 1feb57a245a4910b03202a814ffc51a900bd4aca "gpio: add parameter to allow the use named gpios" includes a double-consted array. What we want is not const const * but const * const (const pointer to const data). Fix this. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: Olliver Schinagl <oliver@schinagl.nl> Cc: Rojhalat Ibrahim <imr@rtschenk.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-09gpio: omap: irq_shutdown: remove unnecessary call of gpiochip_unlock_as_irqGrygorii Strashko1-1/+0
GPIOLib core implemnts irqchip->irq_request/release_resources callbacks internally and these callbacks already contain clalls of gpiochip_lock/unlock_as_irq(). Hence, remove unnecessary call of gpiochip_unlock_as_irq() from omap_gpio_irq_shutdown(). Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-09gpio: pxa: simplify BANK_OFF macro offset calculationRob Herring1-2/+1
The macro BANK_OFF which calculates the base offset for each GPIO port. The macro is needlessly complex and unreadable. Simplify the calculation to a simple math operation. Signed-off-by: Rob Herring <robh@kernel.org> Cc: linux-gpio@vger.kernel.org Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-09gpio: dwapb: re-enable GPIO_DWAPB for arm64Kefeng Wang1-1/+1
Hisilicon arm64 soc uses designWare gpio, re-enable it after commit 1972c97db5b(gpio: dwapb: fix compile errors). Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-07drivers/gpio: Altera soft IP GPIO driverTien Hock Loh3-0/+385
Adds a new driver for Altera soft GPIO IP. The driver is able to do read/write and allows GPIO to be a interrupt controller. Tested on Altera GHRD on interrupt handling and IO. v10: - Updated conflicting device tree parameters - Removed unused headers - Used macro instead of magic numbers for ngpio - Code readability cleanup using ?: and temporal variables - Removed leftover garbage and unnecessary function calls - Checked bgpio_init but unusable because Altera GPIO may not be a multiple of 8 bits v9: - Removed duplicated initialization on set_type using temporals to improve code readability in calling generic_handle_irq - Using ?: ternary to reduce code size v8: - Using for_each_set_bit - Added const for struct definition - Removed naggy pr_err - Sort alpha header - Remove unused macros - Use fixed width data types instead of unsigned long - Whitespace issue fixes - Removed _relaxed function for better compatibility across different CPU - Changed irq_create_mapping to platform_get_irq updated implementation to use gpiochip_irqchip_add - Reserve interrupt-cells number 2 in device tree binding for future use - Remove confusing sections on devicetree bindings - Added tristate Kconfig help text v7: - Used dev_warn instead of pr_warn - Clean up unnecesarry if else indentation v6: - Added irq_startup and irq_shutdown - Changed bitwise clamping style - Cleanup bitwise operation to improve readability change naming of mapped irqs from virq to mapped_irq v5: - Dispose irq_domain mapping correctly - Update optional binding description in binding docs v4: - Added vendor prefix to devicetree binding for IP specific properties using MMIO GPIO helper library instead of manually map PIO to memory - altera_gpio_chip inline struct documentation to kerneldoc - Using dev_ print to print a better failure message v2, v3: - Do not reference NO_IRQ - Updated irq_set_type to only allow the hardware configured irq type Signed-off-by: Tien Hock Loh <thloh@altera.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-06gpio: vf610: Replaces comma between expression statements by semicolonAxel Lin1-8/+8
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-05gpiolib: add devm_gpiod_get_array and devm_gpiod_put_array functionsRojhalat Ibrahim1-0/+89
Add device managed variants of gpiod_get_array() / gpiod_put_array() functions for conveniently obtaining and disposing of an entire array of GPIOs with one function call. Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-05gpiolib: add gpiod_get_array and gpiod_put_array functionsRojhalat Ibrahim3-0/+236
Introduce new functions for conveniently obtaining and disposing of an entire array of GPIOs with one function call. ACPI parts tested by Mika Westerberg, DT parts tested by Rojhalat Ibrahim. Change log: v5: move the ACPI functions to gpiolib-acpi.c v4: - use shorter names for members of struct gpio_descs - rename lut_gpio_count to platform_gpio_count for clarity - add check for successful memory allocation - use ERR_CAST() v3: - rebase on current linux-gpio devel branch - fix ACPI GPIO counting - allow for zero-sized arrays - make the flags argument mandatory for the new functions - clarify documentation v2: change interface Suggested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Rojhalat Ibrahim <imr@rtschenk.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-05gpiolib: define gpio suffixes globallyRojhalat Ibrahim2-8/+9
Avoid multiple identical definitions of the gpio suffix strings by putting them into a global constant array. Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-04gpio: add parameter to allow the use named gpiosOlliver Schinagl1-1/+17
The gpio binding document says that new code should always use named gpios. Patch 40b73183 added support to parse a list of gpios from child nodes, but does not make it possible to use named gpios. This patch adds the con_id property and implements it is done in gpiolib.c, where the old-style of using unnamed gpios still works. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Acked-by: Bryan Wu <cooloney@gmail.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-04gpio: pcf857x: Propagate wake-up setting to parent irq controllerGeert Uytterhoeven1-3/+34
The pcf857x GPIO and interrupt controller uses dummy_irq_chip, which does not implement irq_chip.irq_set_wake() and does not set IRQCHIP_SKIP_SET_WAKE. This causes two s2ram issues if wake-up is enabled for the pcf857x GPIO pins: 1. During resume from s2ram, the following warning is printed: WARNING: CPU: 0 PID: 1046 at kernel/irq/manage.c:537 irq_set_irq_wake+0x9c/0xf8() Unbalanced IRQ 113 wake disable 2. Wake-up through the pcf857x GPIO pins may fail, as the parent interrupt controller may be suspended. Migrate the pcf857x GPIO and interrupt controller from dummy_irq_chip to its own irq_chip. This irq chip implements irq_chip.irq_set_wake() to propagate its wake-up setting to the parent interrupt controller. This fixes wake-up through gpio-keys on sh73a0/kzm9g, where the pcf857x interrupt is cascaded to irq-renesas-intc-irqpin, and the latter must not be suspended when wake-up is enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-04gpio: pcf857x: Switch to use gpiolib irqchip helpersGeert Uytterhoeven2-94/+28
Switch the PCF857x GPIO driver to use the gpiolib irqchip helpers. This driver uses a nested threaded interrupt, hence handle_nested_irq() and gpiochip_set_chained_irqchip() must be used. Note that this removes the checks added in commit 21fd3cd1874a2ac8 ("gpio: pcf857x: call the gpio user handler iff gpio_to_irq is done"), as the interrupt mappings are no longer created on-demand by the driver, but by gpiochip_irqchip_add() during initialization. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-04gpio: add GPIO hogging mechanismBenoit Parrot3-19/+219
Based on Boris Brezillion's work this is a reworked patch of his initial GPIO hogging mechanism. This patch provides a way to initially configure specific GPIO when the GPIO controller is probed. The actual DT scanning to collect the GPIO specific data is performed as part of gpiochip_add(). The purpose of this is to allow specific GPIOs to be configured without any driver specific code. This is particularly useful because board design are getting increasingly complex and given SoC pins can now have more than 10 mux values, a lot of connections are now dependent on external IO muxes to switch various modes. Specific drivers should not necessarily need to be aware of what accounts to a specific board implementation. This board level "description" should be best kept as part of the dts file. Signed-off-by: Benoit Parrot <bparrot@ti.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-02gpio: max732x: convert to GPIOLIB_IRQCHIPLinus Walleij2-93/+43
Take a sweep to bring the irq support for the MAX732x expanders into the gpiolib core to cut down on duplicated code. Only compile tested! I need some feedback from people using this expander with interrupts to tell me if things go right or wrong when I do this. Cc: Semen Protsenko <semen.protsenko@globallogic.com> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-02gpio: mb86s70: Return error if requesting an already assigned gpioAxel Lin1-0/+5
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-12Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds1-1/+198
Pull ARM updates from Russell King: - clang assembly fixes from Ard - optimisations and cleanups for Aurora L2 cache support - efficient L2 cache support for secure monitor API on Exynos SoCs - debug menu cleanup from Daniel Thompson to allow better behaviour for multiplatform kernels - StrongARM SA11x0 conversion to irq domains, and pxa_timer - kprobes updates for older ARM CPUs - move probes support out of arch/arm/kernel to arch/arm/probes - add inline asm support for the rbit (reverse bits) instruction - provide an ARM mode secondary CPU entry point (for Qualcomm CPUs) - remove the unused ARMv3 user access code - add driver_override support to AMBA Primecell bus * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (55 commits) ARM: 8256/1: driver coamba: add device binding path 'driver_override' ARM: 8301/1: qcom: Use secondary_startup_arm() ARM: 8302/1: Add a secondary_startup that assumes ARM mode ARM: 8300/1: teach __asmeq that r11 == fp and r12 == ip ARM: kprobes: Fix compilation error caused by superfluous '*' ARM: 8297/1: cache-l2x0: optimize aurora range operations ARM: 8296/1: cache-l2x0: clean up aurora cache handling ARM: 8284/1: sa1100: clear RCSR_SMR on resume ARM: 8283/1: sa1100: collie: clear PWER register on machine init ARM: 8282/1: sa1100: use handle_domain_irq ARM: 8281/1: sa1100: move GPIO-related IRQ code to gpio driver ARM: 8280/1: sa1100: switch to irq_domain_add_simple() ARM: 8279/1: sa1100: merge both GPIO irqdomains ARM: 8278/1: sa1100: split irq handling for low GPIOs ARM: 8291/1: replace magic number with PAGE_SHIFT macro in fixup_pv code ARM: 8290/1: decompressor: fix a wrong comment ARM: 8286/1: mm: Fix dma_contiguous_reserve comment ARM: 8248/1: pm: remove outdated comment ARM: 8274/1: Fix DEBUG_LL for multi-platform kernels (without PL01X) ARM: 8273/1: Seperate DEBUG_UART_PHYS from DEBUG_LL on EP93XX ...
2015-02-11Merge tag 'gpio-v3.20-1' of ↵Linus Torvalds30-753/+1351
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO changes from Linus Walleij: "This is the GPIO bulk changes for the v3.20 series: GPIOLIB core changes: - Create and use of_mm_gpiochip_remove() for removing memory-mapped OF GPIO chips - GPIO MMIO library suppports bgpio_set_multiple for switching several lines at once, a feature merged in the last cycle. New drivers: - New driver for the APM X-gene standby GPIO controller - New driver for the Fujitsu MB86S7x GPIO controller Cleanups: - Moved rcar driver to use gpiolib irqchip - Moxart converted to the GPIO MMIO library - GE driver converted to GPIO MMIO library - Move sx150x to irqdomain - Move max732x to irqdomain - Move vx855 to use managed resources - Move dwapb to use managed resources - Clean tc3589x from platform data - Clean stmpe driver to use device tree only probe New subtypes: - sx1506 support in the sx150x driver - Quark 1000 SoC support in the SCH driver - Support X86 in the Xilinx driver - Support PXA1928 in the PXA driver Extended drivers: - max732x supports device tree probe - sx150x supports device tree probe Various minor cleanups and bug fixes" * tag 'gpio-v3.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (61 commits) gpio: kconfig: replace PPC_OF with PPC gpio: pxa: add PXA1928 gpio type support dt/bindings: gpio: add compatible string for marvell,pxa1928-gpio gpio: pxa: remove mach IRQ includes gpio: max732x: use an inline function for container cast gpio: use sizeof() instead of hardcoded values gpio: max732x: add set_multiple function gpio: sch: Consolidate similar algorithms gpio: tz1090-pdc: Use resource_size to fix off-by-one resource size calculation gpio: ge: Convert to use devm_kstrdup gpio: correctly use const char * const gpio: sx150x: fixup OF support gpio: mpc8xxx: Use of_mm_gpiochip_remove gpio: Add Fujitsu MB86S7x GPIO driver gpio: mpc8xxx: Convert to platform device interface. gpio: zevio: Use of_mm_gpiochip_remove gpio: gpio-mm-lantiq: Use of_mm_gpiochip_remove gpio: gpio-mm-lantiq: Use of_property_read_u32 gpio: gpio-mm-lantiq: Do not replicate code gpio :gpio-mm-lantiq: Use devm_kzalloc ...
2015-02-04gpio: kconfig: replace PPC_OF with PPCKevin Hao1-1/+1
The PPC_OF is a ppc specific option which is used to mean that the firmware device tree access functions are available. Since all the ppc platforms have a device tree, it is aways set to 'y' for ppc. So it makes no sense to keep a such option in the current kernel. Replace it with PPC. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-03gpio: pxa: add PXA1928 gpio type supportRob Herring1-2/+15
Add support for PXA1928 GPIOs. The PXA1928 adds a 6th bank from previous generations. Signed-off-by: Jing Xiang <jxiang@marvell.com> Signed-off-by: Xiangzhan Meng <mengxzh@marvell.com> [robh: ported to 3.19 from vendor kernel] Signed-off-by: Rob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-03gpio: pxa: remove mach IRQ includesRob Herring1-20/+18
In preparation to enable ARCH_MMP on ARM64, the include of mach/irqs.h must be eliminated. mach/irqs.h was being included for IRQ_GPIO{0,1}, but these IRQs are always passed in as resources now. We can use irq0 and irq1 and get rid of IRQ_GPIOx. Get rid of the ifdef in the process as it is no longer needed. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-03gpio: max732x: use an inline function for container castLinus Walleij1-15/+10
Cast the struct gpio_chip into a max732x_chip using an inline macro and move the assignment to the variable declaration to save lines and simplify things. Cc: Semen Protsenko <semen.protsenko@globallogic.com> Acked-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30gpio: use sizeof() instead of hardcoded valuesOlliver Schinagl1-2/+4
gpiolib uses a fixed string for the suffixes and defines it at 32 bytes. Later in the code snprintf is used with this fixed value of 32. Using sizeof() is safer in case the size for the suffixes is ever changed. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30gpio: max732x: add set_multiple functionMans Rullgard1-3/+25
This adds a set_multiple function to the MAX732x GPIO driver, allowing for performance gains when using gpiod_set_array(). Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30gpio: sysfs: fix memory leak in gpiod_sysfs_set_active_lowJohan Hovold1-1/+1
Fix memory leak in the gpio sysfs interface due to failure to drop reference to device returned by class_find_device when setting the gpio-line polarity. Fixes: 0769746183ca ("gpiolib: add support for changing value polarity in sysfs") Cc: stable <stable@vger.kernel.org> # v2.6.33 Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30gpio: sysfs: fix memory leak in gpiod_export_linkJohan Hovold1-0/+1
Fix memory leak in the gpio sysfs interface due to failure to drop reference to device returned by class_find_device when creating a link. Fixes: a4177ee7f1a8 ("gpiolib: allow exported GPIO nodes to be named using sysfs links") Cc: stable <stable@vger.kernel.org> # v2.6.32 Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-29ARM: 8281/1: sa1100: move GPIO-related IRQ code to gpio driverDmitry Eremin-Solenikov1-0/+197
As a part of driver consolidation, move GPIO-related IRQ code to drivers/gpio/gpio-sa1100.c. The code does not use GPIOLIB_IRQCHIP (yet), because sa1100 does not have a device for gpios, which is a requirement for GPIOLIB_IRQCHIP. This will be the next step. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-01-29ARM: 8278/1: sa1100: split irq handling for low GPIOsDmitry Eremin-Solenikov1-1/+1
Low GPIO pins use an interrupt in SC interrupts space. However it's possible to handle them as if all the GPIO interrupts are instead tied to single GPIO handler, which later decodes GEDR register and chain-calls next IRQ handler. So split first 11 interrupts into system part (IRQ_GPIO0_SC - IRQ_GPIO10_SC) which work exactly like the rest of system controller interrupts and real GPIO interrupts (IRQ_GPIO0..IRQ_GPIO10). A single handler sa1100_gpio_handler then decodes and calls next handler. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-01-29gpio: sch: Consolidate similar algorithmsChang Rebecca Swee Fun1-54/+29
Consolidating similar algorithms into common functions to make GPIO SCH simpler and manageable. Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-29gpio: tz1090-pdc: Use resource_size to fix off-by-one resource size calculationAxel Lin1-1/+1
Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-29gpio: ge: Convert to use devm_kstrdupAxel Lin1-5/+6
Use devm_kstrdup to simplify the error handling path. Also return -ENOMEM instead of 0 if devm_kstrdup fails. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-29gpio: correctly use const char * constOlliver Schinagl1-1/+1
On my previous patch I was overly hasty and made the suffixes string array const char const *suffixes, instaed of const char * const suffixes. This patch corrects that Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-26gpio: mcp23s08: handle default gpio baseSonic Zhang1-7/+10
Create default gpio base if neither device node nor platform data is defined. Cc: Stable <stable@vger.kernel.org> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Antonio Fiol <antonio@fiol.es> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-26gpio: omap: Fix bad device access with setup_irq()Tony Lindgren1-6/+33
Similar to omap_gpio_irq_type() let's make sure that the GPIO is usable as an interrupt if the platform init code did not call gpio_request(). Otherwise we can get invalid device access after setup_irq(): WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x214/0x340() 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4CFG (Idle): Data Access in Supervisor mode during Functional access ... [<c05f21e4>] (__irq_svc) from [<c05f1974>] (_raw_spin_unlock_irqrestore+0x34/0x44) [<c05f1974>] (_raw_spin_unlock_irqrestore) from [<c00914a8>] (__setup_irq+0x244/0x530) [<c00914a8>] (__setup_irq) from [<c00917d4>] (setup_irq+0x40/0x8c) [<c00917d4>] (setup_irq) from [<c0039c8c>] (omap_system_dma_probe+0x1d4/0x2b4) [<c0039c8c>] (omap_system_dma_probe) from [<c03b2200>] (platform_drv_probe+0x44/0xa4) ... We can fix this the same way omap_gpio_irq_type() is handling it. Note that the long term solution is to change the gpio-omap driver to handle the banks as separate driver instances. This will allow us to rely on just runtime PM for tracking the bank specific state. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@kernel.org> Cc: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-22gpio: sx150x: fixup OF supportLinus Walleij1-2/+5
Make OF conditional on CONFIG_OF_GPIO, rename and register the match table. Reported-by: Mike Krinkin <krinkin.m.u@gmail.com> Cc: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-21gpio: mpc8xxx: Use of_mm_gpiochip_removeRicardo Ribalda Delgado1-5/+23
Since d621e8bae5ac9c67 (Create of_mm_gpiochip_remove), there is a counterpart for of_mm_gpiochip_add. This patch implements the remove function of the driver making use of it. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-20gpio: Add Fujitsu MB86S7x GPIO driverJassi Brar3-0/+239
Driver for Fujitsu MB86S7x SoCs that have a memory mapped GPIO controller. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Tetsuya Nuriya <nuriya.tetsuya@jp.fujitsu.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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