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path: root/drivers/fpga/altera-pr-ip-core.c
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2022-06-10fpga: altera-pr-ip: fix unsigned comparison with less than zeroMarco Pagani1-1/+1
Fix the "comparison with less than zero" warning reported by cppcheck for the unsigned (size_t) parameter count of the alt_pr_fpga_write() function. Fixes: d201cc17a8a3 ("fpga pr ip: Core driver support for Altera Partial Reconfiguration IP") Reviewed-by: Tom Rix <[email protected]> Acked-by: Xu Yilun <[email protected]> Signed-off-by: Marco Pagani <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Xu Yilun <[email protected]>
2021-11-28fpga: mgr: Use standard dev_release for class driverRuss Weight1-5/+2
The FPGA manager class driver data structure is being treated as a managed resource instead of using the standard dev_release call-back function to release the class data structure. This change removes the managed resource code for the freeing of the class data structure and combines the create() and register() functions into a single register() or register_full() function. The register_full() function accepts an info data structure to provide flexibility in passing optional parameters. The register() function supports the current parameter list for users that don't require the use of optional parameters. The devm_fpga_mgr_register() function is retained, and the devm_fpga_mgr_register_full() function is added. Signed-off-by: Russ Weight <[email protected]> Reviewed-by: Xu Yilun <[email protected]> Acked-by: Xu Yilun <[email protected]> Signed-off-by: Moritz Fischer <[email protected]>
2021-06-15fpga: altera-pr-ip: Remove function alt_pr_unregisterRuss Weight1-10/+0
Remove the alt_pr_unregister() function; it is no longer used. Signed-off-by: Russ Weight <[email protected]> Reviewed-by: Xu Yilun <[email protected]> Signed-off-by: Moritz Fischer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-12-01fpga: fpga-mgr: altera-pr-ip: Simplify registrationMoritz Fischer1-3/+1
Simplify registration using new devm_fpga_mgr_register() API. Reviewed-by: Tom Rix <[email protected]> Signed-off-by: Moritz Fischer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2019-07-24fpga: altera-pr-ip: Make alt_pr_unregister function voidMoritz Fischer1-3/+1
Make alt_pr_unregister function void, since it always returns 0, and nothing would act on the value anyways. Signed-off-by: Moritz Fischer <[email protected]>
2018-10-16fpga: mgr: add devm_fpga_mgr_createAlan Tull1-7/+2
Add devm_fpga_mgr_create() which is the managed version of fpga_mgr_create(). Change current FPGA manager drivers to use devm_fpga_mgr_create() Signed-off-by: Alan Tull <[email protected]> Suggested-by: Federico Vaga <[email protected]> Acked-by: Moritz Fischer <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-05-25fpga: use SPDXAlan Tull1-12/+1
Replace GPLv2 boilerplate with SPDX in FPGA code that came from me or from Altera. Signed-off-by: Alan Tull <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-05-25fpga: manager: change api, don't use drvdataAlan Tull1-2/+16
Change fpga_mgr_register to not set or use drvdata. This supports the case where a PCIe device has more than one manager. Add fpga_mgr_create/free functions. Change fpga_mgr_register and fpga_mgr_unregister functions to take the mgr struct as their only parameter. struct fpga_manager *fpga_mgr_create(struct device *dev, const char *name, const struct fpga_manager_ops *mops, void *priv); void fpga_mgr_free(struct fpga_manager *mgr); int fpga_mgr_register(struct fpga_manager *mgr); void fpga_mgr_unregister(struct fpga_manager *mgr); Update the drivers that call fpga_mgr_register with the new API. Signed-off-by: Alan Tull <[email protected]> [Moritz: Fixup whitespace issue] Reported-by: Jiuyue Ma <[email protected]> Signed-off-by: Moritz Fischer <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2017-04-08fpga pr ip: Core driver support for Altera Partial Reconfiguration IP.Matthew Gerlach1-0/+220
Adding the core functions necessary for a fpga-mgr driver for the Altera Partial IP component. It is intended for these functions to be used by the various bus implementations like the platform bus or the PCIe bus. Signed-off-by: Matthew Gerlach <[email protected]> Acked-by: Alan Tull <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>