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2024-06-11dmaengine: fsl-edma: change the memory access from local into remote mode in ↵Joy Zou1-1/+1
i.MX 8QM Fix the issue where MEM_TO_MEM fail on i.MX8QM due to the requirement that both source and destination addresses need pass through the IOMMU. Typically, peripheral FIFO addresses bypass the IOMMU, necessitating only one of the source or destination to go through it. Set "is_remote" to true to ensure both source and destination addresses pass through the IOMMU. iMX8 Spec define "Local" and "Remote" bus as below. Local bus: bypass IOMMU to directly access other peripheral register, such as FIFO. Remote bus: go through IOMMU to access system memory. The test fail log as follow: [ 66.268506] dmatest: dma0chan0-copy0: result #1: 'test timed out' with src_off=0x100 dst_off=0x80 len=0x3ec0 (0) [ 66.278785] dmatest: dma0chan0-copy0: summary 1 tests, 1 failures 0.32 iops 4 KB/s (0) Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Joy Zou <joy.zou@nxp.com> Cc: stable@vger.kernel.org Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240510030959.703663-1-joy.zou@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-11dmaengine: fsl-edma: remove redundant "idle" field from fsl_chanFrank Li1-2/+1
The 'idle' in fsl_chan is redundant as it's equivalent to 'status != DMA_IN_PROGRESS'. So remote it to simple code logic. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240603152317.69917-2-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-11dmaengine: fsl-edma: request per-channel IRQ only when channel is allocatedFrank Li1-14/+15
The edma feature individual IRQs for each DMA channel at some devices. Given the presence of numerous eDMA instances, each with multiple channels, IRQ request during probe results in an extensive list at /proc/interrupts. However, a significant portion of these channels remains unused by the system. Request irq only when a DMA client driver requests a DMA channel. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240603152317.69917-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-25dmaengine: fsl-edma: clean up unused "fsl,imx8qm-adma" compatible stringJoy Zou1-8/+0
The eDMA hardware issue only exist imx8QM A0. A0 never mass production. So remove the workaround safely. Signed-off-by: Joy Zou <joy.zou@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240424064508.1886764-2-joy.zou@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-17dmaengine: fsl-edma: fix miss mutex unlock at an error return pathFrank Li1-3/+2
Use cleanup to manage mutex. Let compiler to do scope guard automatically. Fixes: 6aa60f79e679 ("dmaengine: fsl-edma: add safety check for 'srcid'") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/r/202404110915.riwV3ZAC-lkp@intel.com/ Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240411203935.3137158-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-07dmaengine: fsl-edma: add i.MX8ULP edma supportJoy Zou1-0/+22
Add support for the i.MX8ULP platform to the eDMA driver. Introduce the use of the correct FSL_EDMA_DRV_HAS_CHCLK flag to handle per-channel clock configurations. Signed-off-by: Joy Zou <joy.zou@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240323-8ulp_edma-v3-5-c0e981027c05@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-07dmaengine: fsl-edma: clean up chclk and FSL_EDMA_DRV_HAS_CHCLKFrank Li1-8/+0
No device currently utilizes chclk and FSL_EDMA_DRV_HAS_CHCLK features. Removes these unused features. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240323-8ulp_edma-v3-3-c0e981027c05@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-07dmaengine: fsl-edma: add safety check for 'srcid'Frank Li1-0/+7
Ensure that 'srcid' is a non-zero value to avoid dtb passing invalid 'srcid' to the driver. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240323-8ulp_edma-v3-2-c0e981027c05@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-07dmaengine: fsl-edma: remove 'slave_id' from fsl_edma_chanFrank Li1-5/+5
The 'slave_id' field is redundant as it duplicates the functionality of 'srcid'. Remove 'slave_id' from fsl_edma_chan to eliminate redundancy. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240323-8ulp_edma-v3-1-c0e981027c05@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-03-15Merge tag 'dmaengine-6.9-rc1' of ↵Linus Torvalds1-1/+18
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "New hardware support: - Allwinner H616 dma support - Renesas r8a779h0 dma controller support - TI CSI2RX dma support Updates: - Freescale edma driver updates for TCD64csupport for i.MX95 - constify of pointers and args - Yaml conversion for MediaTek High-Speed controller binding - TI k3 udma support for TX/RX DMA channels for thread IDs: * tag 'dmaengine-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (25 commits) dmaengine: of: constify of_phandle_args in of_dma_find_controller() dmaengine: pl08x: constify pointer to char in filter function MAINTAINERS: change in AMD ptdma maintainer MAINTAINERS: adjust file entry in MEDIATEK DMA DRIVER dmaengine: idxd: constify the struct device_type usage dt-bindings: renesas,rcar-dmac: Add r8a779h0 support dt-bindings: dma: convert MediaTek High-Speed controller to the json-schema dmaengine: idxd: make dsa_bus_type const dmaengine: fsl-edma: integrate TCD64 support for i.MX95 dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan dmaengine: fsl-edma: fix spare build warning dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd() dt-bindings: mmp-dma: convert to YAML dmaengine: ti: k3-psil-j721s2: Add entry for CSI2RX dmaengine: ti: k3-udma-glue: Add function to request RX chan for thread ID dmaengine: ti: k3-udma-glue: Add function to request TX chan for thread ID dmaengine: ti: k3-udma-glue: Update name for remote RX channel device dmaengine: ti: k3-udma-glue: Add function to parse channel by ID ...
2024-02-16dmaengine: fsl-edma: correct max_segment_size settingFrank Li1-1/+3
Correcting the previous setting of 0x3fff to the actual value of 0x7fff. Introduced new macro 'EDMA_TCD_ITER_MASK' for improved code clarity and utilization of FIELD_GET to obtain the accurate maximum value. Cc: stable@vger.kernel.org Fixes: e06748539432 ("dmaengine: fsl-edma: support edma memcpy") Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240207194733.2112870-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07dmaengine: fsl-edma: integrate TCD64 support for i.MX95Frank Li1-0/+14
In i.MX95's edma version 5, the TCD structure is extended to support 64-bit addresses for fields like saddr and daddr. To prevent code duplication, employ help macros to handle the fields, as the field names remain the same between TCD and TCD64. Change local variables related to TCD addresses from 'u32' to 'dma_addr_t' to accept 64-bit DMA addresses. Change 'vtcd' type to 'void *' to avoid direct use. Use helper macros to access the TCD fields correctly. Call 'dma_set_mask_and_coherent(64)' when TCD64 is supported. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231221153528.1588049-7-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chanFrank Li1-0/+3
iMX95 move channel mux register to management page address space. This prepare to support iMX95. Add mux_addr in struct fsl_edma_chan. No function change. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231221153528.1588049-4-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07dmaengine: fsl-edma: fix spare build warningFrank Li1-1/+1
../drivers/dma/fsl-edma-common.c:93:9: sparse: warning: cast removes address space '__iomem' of expression ../drivers/dma/fsl-edma-common.c:101:25: sparse: warning: cast removes address space '__iomem' of expression ... ../drivers/dma/fsl-edma-main.c:557:17: sparse: got restricted __le32 [usertype] Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231221153528.1588049-3-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-19Merge tag 'dmaengine-6.8-rc1' into fixesVinod Koul1-7/+10
dmaengine updates for v6.8 New support: - Loongson LS2X APB DMA controller - sf-pdma: mpfs-pdma support - Qualcomm X1E80100 GPI dma controller support Updates: - Xilinx XDMA updates to support interleaved DMA transfers - TI PSIL threads for AM62P and J722S and cfg register regions description - axi-dmac Improving the cyclic DMA transfers - Tegra Support dma-channel-mask property - Remaining platform remove callback returning void conversions
2023-12-21dmaengine: fsl-edma: utilize common dt-binding header fileFrank Li1-11/+6
Refactor the code to use the common dt-binding header file, fsl-edma.h. Renaming ARGS* to FSL_EDMA*, ensuring no functional changes. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231114154824.3617255-4-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-12-21dmaengine: fsl-edma: fix eDMAv4 channel allocation issueFrank Li1-0/+8
The eDMAv4 channel mux has a limitation where certain requests must use even channels, while others must use odd numbers. Add two flags (ARGS_EVEN_CH and ARGS_ODD_CH) to reflect this limitation. The device tree source (dts) files need to be updated accordingly. This issue was identified by the following commit: commit a725990557e7 ("arm64: dts: imx93: Fix the dmas entries order") Reverting channel orders triggered this problem. Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231114154824.3617255-2-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-12-11dmaengine: fsl-edma: fix wrong pointer check in fsl_edma3_attach_pd()Yang Yingliang1-3/+2
device_link_add() returns NULL pointer not PTR_ERR() when it fails, so replace the IS_ERR() check with NULL pointer check. Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20231129090000.841440-1-yangyingliang@huaweicloud.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-11-24dmaengine: fsl-edma: Add judgment on enabling round robin arbitrationXiaolei Wang1-1/+2
Add judgment on enabling round robin arbitration to avoid exceptions if this function is not supported. Call trace: fsl_edma_resume_early+0x1d4/0x208 dpm_run_callback+0xd4/0x304 device_resume_early+0xb0/0x208 dpm_resume_early+0x224/0x528 suspend_devices_and_enter+0x3e4/0xd00 pm_suspend+0x3c4/0x910 state_store+0x90/0x124 kobj_attr_store+0x48/0x64 sysfs_kf_write+0x84/0xb4 kernfs_fop_write_iter+0x19c/0x264 vfs_write+0x664/0x858 ksys_write+0xc8/0x180 __arm64_sys_write+0x44/0x58 invoke_syscall+0x5c/0x178 el0_svc_common.constprop.0+0x11c/0x14c do_el0_svc+0x30/0x40 el0_svc+0x58/0xa8 el0t_64_sync_handler+0xc0/0xc4 el0t_64_sync+0x190/0x194 Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Xiaolei Wang <xiaolei.wang@windriver.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231113225713.1892643-3-xiaolei.wang@windriver.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-11-24dmaengine: fsl-edma: Do not suspend and resume the masked dma channel when ↵Xiaolei Wang1-0/+4
the system is sleeping Some channels may be masked. When the system is suspended, if these masked channels are not filtered out, this will lead to null pointer operations and system crash: Unable to handle kernel NULL pointer dereference at virtual address Mem abort info: ESR = 0x0000000096000004 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 FSC = 0x04: level 0 translation fault Data abort info: ISV = 0, ISS = 0x00000004, ISS2 = 0x00000000 CM = 0, WnR = 0, TnD = 0, TagAccess = 0 GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0 user pgtable: 4k pages, 48-bit VAs, pgdp=0000000894300000 [00000000000002a0] pgd=0000000000000000, p4d=0000000000000000 Internal error: Oops: 0000000096000004 [#1] PREEMPT SMP Modules linked in: CPU: 1 PID: 989 Comm: sh Tainted: G B 6.6.0-16203-g557fb7a3ec4c-dirty #70 Hardware name: Freescale i.MX8QM MEK (DT) pstate: 400000c5 (nZcv daIF -PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc: fsl_edma_disable_request+0x3c/0x78 lr: fsl_edma_disable_request+0x3c/0x78 sp:ffff800089ae7690 x29: ffff800089ae7690 x28: ffff000807ab5440 x27: ffff000807ab5830 x26: 0000000000000008 x25: 0000000000000278 x24: 0000000000000001 23: ffff000807ab4328 x22: 0000000000000000 x21: 0000000000000009 x20: ffff800082616940 x19: 0000000000000000 x18: 0000000000000000 x17: 3d3d3d3d3d3d3d3d x16: 3d3d3d3d3d3d3d3d x15: 3d3d3d3d3d3d3d3d x14: 3d3d3d3d3d3d3d3d x13: 3d3d3d3d3d3d3d3d x12: 1ffff00010d45724 x11: ffff700010d45724 x10: dfff800000000000 x9: dfff800000000000 x8: 00008fffef2ba8dc x7: 0000000000000001 x6: ffff800086a2b927 x5: ffff800086a2b920 x4: ffff700010d45725 x3: ffff8000800d5bbc x2 : 0000000000000000 x1 : ffff000800c1d880 x0 : 0000000000000001 Call trace: fsl_edma_disable_request+0x3c/0x78 fsl_edma_suspend_late+0x128/0x12c dpm_run_callback+0xd4/0x304 __device_suspend_late+0xd0/0x240 dpm_suspend_late+0x174/0x59c suspend_devices_and_enter+0x194/0xd00 pm_suspend+0x3c4/0x910 Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Xiaolei Wang <xiaolei.wang@windriver.com> Link: https://lore.kernel.org/r/20231113225713.1892643-2-xiaolei.wang@windriver.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-11-03Merge tag 'dmaengine-6.7-rc1' of ↵Linus Torvalds1-14/+5
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: - Big pile of __counted_by attribute annotations to several structures for bounds checking of flexible arrays at run-time - Another big pile platform remove callback returning void changes - Device tree device_get_match_data() usage and dropping of_match_device() calls - Minor driver updates to pxa, idxd fsl, hisi etc drivers * tag 'dmaengine-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (106 commits) dmaengine: stm32-mdma: correct desc prep when channel running dmaengine: dw-axi-dmac: Add support DMAX_NUM_CHANNELS > 16 dmaengine: xilinx: xilinx_dma: Fix kernel doc about xilinx_dma_remove() dmaengine: mmp_tdma: drop unused variable 'of_id' MAINTAINERS: Add entries for NXP(Freescale) eDMA drivers dmaengine: xilinx: xdma: Support cyclic transfers dmaengine: xilinx: xdma: Prepare the introduction of cyclic transfers dmaengine: Drop unnecessary of_match_device() calls dmaengine: Use device_get_match_data() dmaengine: pxa_dma: Annotate struct pxad_desc_sw with __counted_by dmaengine: pxa_dma: Remove an erroneous BUG_ON() in pxad_free_desc() dmaengine: xilinx: xdma: Use resource_size() in xdma_probe() dmaengine: fsl-dpaa2-qdma: Remove redundant initialization owner in dpaa2_qdma_driver dmaengine: Remove unused declaration dma_chan_cleanup() dmaengine: mmp: fix Wvoid-pointer-to-enum-cast warning dmaengine: qcom: fix Wvoid-pointer-to-enum-cast warning dmaengine: fsl-edma: Remove redundant dev_err() for platform_get_irq() dmaengine: ep93xx_dma: Annotate struct ep93xx_dma_engine with __counted_by dmaengine: idxd: add wq driver name support for accel-config user tool dmaengine: fsl-edma: Annotate struct struct fsl_edma_engine with __counted_by ...
2023-10-09dmaengine: fsl-edma: fix all channels requested when call fsl_edma3_xlate()Frank Li1-2/+4
dma_get_slave_channel() increases client_count for all channels. It should only be called when a matched channel is found in fsl_edma3_xlate(). Move dma_get_slave_channel() after checking for a matched channel. Cc: stable@vger.kernel.org Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231004142911.838916-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-10-09dmaengine: Use device_get_match_data()Rob Herring1-7/+2
Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231006213844.333027-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-10-04dmaengine: fsl-edma: Remove redundant dev_err() for platform_get_irq()Jinjie Ruan1-3/+1
Since commit 7723f4c5ecdb ("driver core: platform: Add an error message to platform_get_irq*()") and commit 2043727c2882 ("driver core: platform: Make use of the helper function dev_err_probe()"), there is no need to call the dev_err() function directly to print a custom message when handling an error from platform_get_irq() function as it is going to display an appropriate error message in case of a failure. Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Link: https://lore.kernel.org/r/20230901071115.1322000-1-ruanjinjie@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-09-28dmaengine: fsl-dma: fix DMA error when enabling sg if 'DONE' bit is setFrank Li1-1/+1
In eDMAv3, clearing 'DONE' bit (bit 30) of CHn_CSR is required when enabling scatter-gather (SG). eDMAv4 does not require this change. Cc: stable@vger.kernel.org Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230921144652.3259813-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-09-28dmaengine: fsl-edma-main: Convert to platform remove callback returning voidUwe Kleine-König1-4/+2
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Eventually after all drivers are converted, .remove_new() is renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230919133207.1400430-13-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: integrate v3 supportFrank Li1-7/+238
Significant alterations have been made to the EDMA v3's register layout. Now, each channel possesses a separate address space, encapsulating all channel-related controls and statuses, including IRQs. There are changes in bit position definitions as well. However, the fundamental control flow remains analogous to the previous versions. EDMA v3 was utilized in imx8qm, imx93, and will be in forthcoming chips. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-13-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: move tcd into struct fsl_dma_chanFrank Li1-2/+4
Relocates the tcd into the fsl_dma_chan structure. This adjustment reduces the need to reference back to fsl_edma_engine, paving the way for EDMA V3 support. Unified the edma_writel and edma_writew functions for accessing TCD (Transfer Control Descriptor) registers. A new macro is added that can automatically detect whether a 32-bit or 16-bit access should be used based on the structure field definition. This provide better support 64-bit TCD with future v5 version. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202305271951.gmRobs3a-lkp@intel.com/ Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-11-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: refactor chan_name setup and safetyFrank Li1-2/+3
Relocated the setup of chan_name from setup_irq() to fsl_chan init. This change anticipates its future use in various locations. For increased safety, sprintf has been replaced with snprintf. In addition, The size of the fsl_chan->name[] array was expanded from 16 to 32. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-10-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: move clearing of register interrupt into setup_irq functionFrank Li1-1/+4
This accommodates differences in the register layout of EDMA v3 by moving the clearing of register interrupts into the platform-specific set_irq function. This should ensure better compatibility with EDMA v3. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-9-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: refactor using devm_clk_get_enabledFrank Li1-17/+2
Use devm_clk_get_enabled in probe code to reduce error checks, thereby enhancing readability Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-8-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: move common IRQ handler to common.cFrank Li1-28/+2
Move the common part of IRQ handler from fsl-edma-main.c and mcf-edma-main.c to fsl-edma-common.c. This eliminates redundant code, as the both files contains mostly identical code. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-6-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: Remove enum edma_versionFrank Li1-5/+3
The enum edma_version, which defines v1, v2, and v3, is a software concept used to distinguish IP differences. However, it is not aligned with the chip reference manual. According to the 7ulp reference manual, it should be edma2. In the future, there will be edma3, edma4, and edma5, which could cause confusion. To avoid this confusion, remove the edma_version and instead use drvdata->flags to distinguish the IP difference. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-5-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: transition from bool fields to bitmask flags in drvdataFrank Li1-3/+3
Replace individual bool fields with bitmask flags within drvdata. This will facilitate future extensions, making it easier to add more flags to accommodate new versions of the edma IP. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-4-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.cFrank Li1-0/+516
Exported functions in fsl-edma-common.c are only used within fsl-edma.c and mcf-edma.c. Global export is unnecessary. This commit removes all EXPORT_SYMBOL_GPL in fsl-edma-common.c, and renames fsl-edma.c and mcf-edma.c to maintain the same final module names as before, thereby simplifying the codebase. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-3-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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