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path: root/drivers/crypto
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2014-04-28crypto: atmel-aes - check alignment of cfb64 modeLeilei Zhao1-0/+6
The length shoule be 64 bit alignment and the block size shoule be 64 bit in aes cfb64 mode. Signed-off-by: Leilei Zhao <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-28crypto: atmel-aes - correct block size of cfb8 modeLeilei Zhao1-1/+1
The block size of aes cfb8 mode shoule be 8 bit. Signed-off-by: Leilei Zhao <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-28crypto: caam - fix mem leak in ahash_setkeyHoria Geanta1-1/+3
In case hash key is bigger than algorithm block size, it is hashed. In this case, memory is allocated to keep this hash in hashed_key. hashed_key has to be freed on the key_dma dma mapping error path. Signed-off-by: Horia Geanta <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-28crypto: caam - add allocation failure handling in SPRINTFCAT macroHoria Geanta1-3/+7
GFP_ATOMIC memory allocation could fail. In this case, avoid NULL pointer dereference and notify user. Cc: <[email protected]> # 3.2+ Cc: Kim Phillips <[email protected]> Signed-off-by: Horia Geanta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-16crypto: omap-des - handle error of pm_runtime_get_syncNishanth Menon1-3/+23
pm_runtime_get_sync may not always succeed depending on SoC involved. So handle the error appropriately ensuring usage_count is accurate in case of failure. Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Felipe Balbi <[email protected]> Reported-by: Joachim Eastwood <[email protected]> Tested-by: Joachim Eastwood <[email protected]> Acked-by: Joel Fernandes <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-16crypto: ccp - Use pci_enable_msix_range() instead of pci_enable_msix()Alexander Gordeev1-4/+3
As result of deprecation of MSI-X/MSI enablement functions pci_enable_msix() and pci_enable_msi_block() all drivers using these two interfaces need to be updated to use the new pci_enable_msi_range() or pci_enable_msi_exact() and pci_enable_msix_range() or pci_enable_msix_exact() interfaces. Signed-off-by: Alexander Gordeev <[email protected]> Cc: Tom Lendacky <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Herbert Xu <[email protected]>
2014-04-16cryptoo: bfin_crc - avoid get physical address of coherence memory by ↵Sonic Zhang1-20/+23
dma_map_single - The 4-byte sg_mid_buf is located in the middle of the coherence memory sg_cpu. Don't call dma_map_single to get its physical address. Get the its base physical address from the physical address of sg_cpu instead. - Should set up the dma descriptor data after the 4-byte sg_mid_buf is filled in completely from next sg buffer. - memory copy from sg buffer should be done via virtual address. - Remove unused reference to blackfin header Signed-off-by: Sonic Zhang <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-16crypto: bfin_crc - ignore duplicated registration of the same algorithmSonic Zhang1-9/+9
in case of multiple crc devices are probed. Call platform_set_drvdata() before adding new CRC device into the list. Signed-off-by: Sonic Zhang <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-16crypto: bfin_crc - access crc registers by readl and writel functionsSonic Zhang2-17/+150
Move architecture independant crc header file out of the blackfin folder. Signed-off-by: Sonic Zhang <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-16crypto: omap-des - use devm_ioremap_resource()Jingoo Han1-4/+3
Use devm_ioremap_resource() because devm_request_and_ioremap() is obsoleted by devm_ioremap_resource(). Signed-off-by: Jingoo Han <[email protected]> Acked-by: Joel Fernandes <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-16crypto: nx - Use RCU_INIT_POINTER(x, NULL)Monam Agarwal1-2/+2
This patch replaces rcu_assign_pointer(x, NULL) with RCU_INIT_POINTER(x, NULL) The rcu_assign_pointer() ensures that the initialization of a structure is carried out before storing a pointer to that structure. And in the case of the NULL pointer, there is no structure to initialize. So, rcu_assign_pointer(p, NULL) can be safely converted to RCU_INIT_POINTER(p, NULL) Signed-off-by: Monam Agarwal <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-04-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds25-1679/+1941
Pull crypto updates from Herbert Xu: "Here is the crypto update for 3.15: - Added 3DES driver for OMAP4/AM43xx - Added AVX2 acceleration for SHA - Added hash-only AEAD algorithms in caam - Removed tegra driver as it is not functioning and the hardware is too slow - Allow blkcipher walks over AEAD (needed for ARM) - Fixed unprotected FPU/SSE access in ghash-clmulni-intel - Fixed highmem crash in omap-sham - Add (zero entropy) randomness when initialising hardware RNGs - Fixed unaligned ahash comletion functions - Added soft module depedency for crc32c for initrds that use crc32c" * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (60 commits) crypto: ghash-clmulni-intel - use C implementation for setkey() crypto: x86/sha1 - reduce size of the AVX2 asm implementation crypto: x86/sha1 - fix stack alignment of AVX2 variant crypto: x86/sha1 - re-enable the AVX variant crypto: sha - SHA1 transform x86_64 AVX2 crypto: crypto_wq - Fix late crypto work queue initialization crypto: caam - add missing key_dma unmap crypto: caam - add support for aead null encryption crypto: testmgr - add aead null encryption test vectors crypto: export NULL algorithms defines crypto: caam - remove error propagation handling crypto: hash - Simplify the ahash_finup implementation crypto: hash - Pull out the functions to save/restore request crypto: hash - Fix the pointer voodoo in unaligned ahash crypto: caam - Fix first parameter to caam_init_rng crypto: omap-sham - Map SG pages if they are HIGHMEM before accessing crypto: caam - Dynamic memory allocation for caam_rng_ctx object crypto: allow blkcipher walks over AEAD data crypto: remove direct blkcipher_walk dependency on transform hwrng: add randomness to system from rng sources ...
2014-03-21crypto: caam - add missing key_dma unmapHoria Geanta1-0/+5
(struct caam_ctx) ctx->key_dma needs to be unmapped when context is cleaned up. Signed-off-by: Horia Geanta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-21crypto: caam - add support for aead null encryptionHoria Geanta3-13/+342
Add support for the following combinations: -encryption: null -authentication: md5, sha* (1, 224, 256, 384, 512) Signed-off-by: Tudor Ambarus <[email protected]> Signed-off-by: Horia Geanta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-21crypto: caam - remove error propagation handlingHoria Geanta1-47/+7
Commit 61bb86bba169507a5f223b94b9176c32c84b4721 ("crypto: caam - set descriptor sharing type to SERIAL") changed the descriptor sharing mode from SHARE_WAIT to SHARE_SERIAL. All descriptor commands that handle the "ok to share" and "error propagation" settings should also go away, since they have no meaning for SHARE_SERIAL. Signed-off-by: Horia Geanta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-21crypto: caam - Fix first parameter to caam_init_rngHerbert Xu1-1/+1
Found by the kbuild test robot, the first argument to caam_init_rng has a spurious ampersand. Reported-by: kbuild test robot <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: omap-sham - Map SG pages if they are HIGHMEM before accessingJoel Fernandes1-1/+7
HIGHMEM pages may not be mapped so we must kmap them before accessing. This resolves a random OOPs error that was showing up during OpenSSL SHA tests. Signed-off-by: Joel Fernandes <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: caam - Dynamic memory allocation for caam_rng_ctx objectNitesh Lal1-6/+9
This patch allocates memory from DMAable region to the caam_rng_ctx object, earlier it had been statically allocated which resulted in errorneous behaviour on inserting the caamrng module at the runtime. Signed-off-by: Nitesh Lal <[email protected]> Acked-by: Ruchika Gupta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: mxs-dcp - Optimize hashingMarek Vasut1-11/+17
Optimize the hashing operation in the MXS-DCP by doing two adjustments: 1) Given that the output buffer for the hash is now always correctly aligned, we can just use the buffer for the DCP DMA to store the resulting hash. We thus get rid of one copying of data. Moreover, we remove an entry from dcp_coherent_block{} and thus lower the memory footprint of the driver. 2) We map the output buffer for the hash for DMA only in case we will output the hash, not always, as it was now. Signed-off-by: Marek Vasut <[email protected]> Cc: David S. Miller <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Herbert Xu <[email protected]> Cc: Shawn Guo <[email protected]> Cc: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: mxs-dcp - Align the bounce buffersMarek Vasut1-1/+7
The DCP needs the bounce buffers, DMA descriptors and result buffers aligned to 64 bytes (yet another hardware limitation). Make sure they are aligned by properly aligning the structure which contains them during allocation. Signed-off-by: Marek Vasut <[email protected]> Cc: David S. Miller <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Herbert Xu <[email protected]> Cc: Shawn Guo <[email protected]> Cc: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: omap-des - make local functions staticJingoo Han1-2/+2
Make omap_des_copy_needed(), omap_des_copy_sgs(), because these functions are used only in this file. Signed-off-by: Jingoo Han <[email protected]> Acked-by: Joel Fernandes <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: omap-sham - Use SIMPLE_DEV_PM_OPS macroJingoo Han1-3/+1
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: Jingoo Han <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: omap-des - Use SIMPLE_DEV_PM_OPS macroJingoo Han1-3/+1
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: Jingoo Han <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: omap-aes - Use SIMPLE_DEV_PM_OPS macroJingoo Han1-3/+1
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: Jingoo Han <[email protected]> Acked-by: Nishanth Menon <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypt: bfin_crc - Remove useless SSYNC instruction and cache flush to DMA ↵Sonic Zhang1-34/+11
coherent memory 1) SSYNC instruction is blackfin specific and takes no effect in this driver. 2) DMA descriptor and SG middle buffer are in DMA coherent memory. No need to flush. 3) Turn kzalloc, ioremap and request_irq into managed device APIs respectively. Signed-off-by: Sonic Zhang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-03-10crypto: sahara - Use return value of devm_request_irq() on errorAlexander Shiyan1-3/+4
Signed-off-by: Alexander Shiyan <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: ccp - Account for CCP backlog processingTom Lendacky1-7/+11
When the crypto layer is able to queue up a command for processing by the CCP on the initial call to ccp_crypto_enqueue_request and the CCP returns -EBUSY, then if the backlog flag is not set the command needs to be freed and not added to the active command list. Signed-off-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: ccp - Invoke context callback when there is a backlog errorTom Lendacky1-0/+3
Invoke the callback routine associated with the crypto context if an error is encountered sending the command to the CCP during backlog processing. This is needed to free any resources used by the command. Signed-off-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: ccp - Prevent a possible lost CCP command requestTom Lendacky1-0/+4
If a CCP command has been queued for processing at the crypto layer then, when dequeueing it for processing, the "can backlog" flag must be set so that the request isn't lost if the CCP backlog queue limit is reached. Signed-off-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: caam - writel() arguments are swappedDan Carpenter1-2/+2
My guess is that this little endian configuration is never found in real life, but if it were then the writel() arguments are in the wrong order so the driver would crash immediately. Signed-off-by: Dan Carpenter <[email protected]> Acked-by: Kim Phillips <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: tegra - remove driverStephen Warren4-1202/+0
This driver has never been hooked up in any board file, and cannot be instantiated via device tree. I've been told that, at least on Tegra20, the HW is slower at crypto than the main CPU. I have no test-case for it. Hence, remove it. Cc: Varun Wadekar <[email protected]> Signed-off-by: Stephen Warren <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: omap-des - Add config and build optionsJoel Fernandes2-0/+12
Add config and build options for the omap-des driver. Signed-off-by: Joel Fernandes <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: omap-des - Add omap-des driver for OMAP4/AM43xxJoel Fernandes1-0/+1218
Add omap-des driver with platform data for OMAP4/AM43xx. Support added for DES ECB and CBC modes. Also add support for 3DES operation where 3 64-bit keys are used to perform a DES encrypt-decrypt-encrypt (des3_ede) operation on a buffer. Tests have been conducted with the CRYPTO test manager, and functionality is verified at different page length alignments. Signed-off-by: Joel Fernandes <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: mxs-dcp - Fix platform_get_irq() error handlingFabio Estevam1-2/+7
We should test the error case for each platform_get_irq() assignment and propagate the error accordingly. Signed-off-by: Fabio Estevam <[email protected]> Acked-by: Marek Vasut <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: s5p-sss - Use devm_ioremap_resource()Jingoo Han1-9/+4
Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: Jingoo Han <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: sahara - Use devm_ioremap_resource()Jingoo Han1-16/+3
Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: Jingoo Han <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-27crypto: picoxcell - Use devm_ioremap_resource()Jingoo Han1-11/+5
Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: Jingoo Han <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-11crypto/nx/nx-842: Fix handling of vmalloc addressesNathan Fontenot1-10/+19
The powerpc specific nx-842 compression driver does not currently handle translating a vmalloc address to a physical address. The current driver uses __pa() for all addresses which does not properly handle vmalloc addresses and thus causes a failure since we do not pass a proper physical address to the hypervisor. This patch adds a routine to convert an address to a physical address by checking for vmalloc addresses and handling them properly. Signed-off-by: Nathan Fontenot <[email protected]> --- drivers/crypto/nx/nx-842.c | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2014-02-09crypto: caam - fix ERA retrieval functionAlex Porosanu2-27/+11
SEC ERA has to be retrieved by reading the "fsl,sec-era" property from the device tree. This property is updated/filled in by u-boot. Signed-off-by: Alex Porosanu <[email protected]> Reviewed-by: Horia Geanta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: mxs-dcp: Check the return value of stmp_reset_block()Fabio Estevam1-1/+3
stmp_reset_block() may fail, so check its return value and propagate it in the case of error. Signed-off-by: Fabio Estevam <[email protected]> Acked-by: Marek Vasut <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: mxs-dcp: Use devm_kzalloc()Fabio Estevam1-7/+2
Using devm_kzalloc() can make the code cleaner. While at it, remove the devm_kzalloc error message as there is standard OOM message done by the core. Signed-off-by: Fabio Estevam <[email protected]> Acked-by: Marek Vasut <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: talitos: init the priv->alg_list more earlier in talitos_probe()Kevin Hao1-2/+2
In function talitos_probe(), it will jump to err_out when getting an error in talitos_probe_irq(). Then the uninitialized list head priv->alg_list will be used in function talitos_remove(). In this case we would get a call trace like the following. So move up the initialization of priv->alg_list. Unable to handle kernel paging request for data at address 0x00000000 Faulting instruction address: 0xc0459ff4 Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=8 P1020 RDB Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.13.0-08789-g54c0a4b46150 #33 task: cf050000 ti: cf04c000 task.ti: cf04c000 NIP: c0459ff4 LR: c0459fd4 CTR: c02f2438 REGS: cf04dcb0 TRAP: 0300 Tainted: G W (3.13.0-08789-g54c0a4b46150) MSR: 00029000 <CE,EE,ME> CR: 82000028 XER: 20000000 DEAR: 00000000 ESR: 00000000 GPR00: c045ac28 cf04dd60 cf050000 cf2579c0 00021000 00000000 c02f35b0 0000014e GPR08: c07e702c cf104300 c07e702c 0000014e 22000024 00000000 c0002a3c 00000000 GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 c082e4e0 000000df GPR24: 00000000 00100100 00200200 cf257a2c cf0efe10 cf2579c0 cf0efe10 00000000 NIP [c0459ff4] talitos_remove+0x3c/0x1c8 LR [c0459fd4] talitos_remove+0x1c/0x1c8 Call Trace: [cf04dd60] [c07485d8] __func__.13331+0x1241c8/0x1391c0 (unreliable) [cf04dd90] [c045ac28] talitos_probe+0x244/0x998 [cf04dde0] [c0306a74] platform_drv_probe+0x28/0x68 [cf04ddf0] [c0304d38] really_probe+0x78/0x250 [cf04de10] [c030505c] __driver_attach+0xc8/0xcc [cf04de30] [c0302e98] bus_for_each_dev+0x6c/0xb8 [cf04de60] [c03043cc] bus_add_driver+0x168/0x220 [cf04de80] [c0305798] driver_register+0x88/0x130 [cf04de90] [c0002458] do_one_initcall+0x14c/0x198 [cf04df00] [c079f904] kernel_init_freeable+0x138/0x1d4 [cf04df30] [c0002a50] kernel_init+0x14/0x124 [cf04df40] [c000ec40] ret_from_kernel_thread+0x5c/0x64 Signed-off-by: Kevin Hao <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: ccp - Perform completion callbacks using a taskletTom Lendacky1-4/+17
Change from scheduling work to scheduling a tasklet to perform the callback operations. Signed-off-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: ccp - Use a single queue for proper ordering of tfm requestsTom Lendacky1-116/+48
Move to a single queue to serialize requests within a tfm. When testing using IPSec with a large number of network connections the per cpu tfm queuing logic was not working properly. Signed-off-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: ccp - Move HMAC calculation down to ccp ops fileTom Lendacky3-110/+132
Move the support to perform an HMAC calculation into the CCP operations file. This eliminates the need to perform a synchronous SHA operation used to calculate the HMAC. Signed-off-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: ccp - Allow for selective disablement of crypto API algorithmsTom Lendacky1-12/+25
Introduce module parameters that allow for disabling of a crypto algorithm by not registering the algorithm with the crypto API. Signed-off-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: ccp - Fix ccp_run_passthru_cmd dma variable assignmentsDave Jones1-2/+2
There are some suspicious looking lines of code in the new ccp driver, including one that assigns a variable to itself, and another that overwrites a previous assignment. This may have been a cut-and-paste error where 'src' was forgotten to be changed to 'dst'. I have no hardware to test this, so this is untested. Signed-off-by: Dave Jones <[email protected]> Acked-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: caam - Fix job ring discovery in controller driverNitesh Lal1-19/+6
The SEC Controller driver creates platform devices for it's child job ring nodes. Currently the driver uses for_each_compatible routine which traverses the whole device tree to create the job rings for the platform device. The patch changes this to search for the compatible property of job ring only in the child nodes i.e., the job rings are created as per the number of children associated with the crypto node. Signed-off-by: Nitesh Lal <[email protected]> Reviewed-by: Horia Geanta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-02-09crypto: dcp - Move the AES operation type from actx to rctxMarek Vasut1-10/+17
Move the AES operation type and mode from async crypto context to crypto request context. This allows for recycling of the async crypto context for different kinds of operations. I found this problem when I used dm-crypt, which uses the same async crypto context (actx) for both encryption and decryption requests. Since the requests are enqueued into the processing queue, immediatelly storing the type of operation into async crypto context (actx) caused corruption of this information when encryption and decryption operations followed imediatelly one after the other. When the first operation was dequeued, the second operation was already enqueued and overwritten the type of operation in actx, thus causing incorrect result of the first operation. Fix this problem by storing the type of operation into the crypto request context. Signed-off-by: Marek Vasut <[email protected]> Cc: David S. Miller <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Shawn Guo <[email protected]> Cc: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-01-23Merge tag 'drivers-for-linus' of ↵Linus Torvalds3-123/+266
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM driver updates from Olof Johansson: "Updates of SoC-near drivers and other driver updates that makes more sense to take through our tree. The largest part of this is a conversion of device registration for some renesas shmobile/sh devices over to use resources. This has required coordination with the corresponding arch/sh changes, and we've agreed to merge the arch/sh changes through our tree. Added in this branch is support for Trusted Foundations secure firmware, which is what is used on many of the commercial Nvidia Tegra products that are in the market, including the Nvidia Shield. The code is local to arch/arm at this time since it's uncertain whether it will be shared with arm64 longer-term, if needed we will refactor later. A couple of new RTC drivers used on ARM boards, merged through our tree on request by the RTC maintainer. ... plus a bunch of smaller updates across the board, gpio conversions for davinci, etc" * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits) watchdog: davinci: rename platform driver to davinci-wdt tty: serial: Limit msm_serial_hs driver to platforms that use it mmc: msm_sdcc: Limit driver to platforms that use it usb: phy: msm: Move mach dependent code to platform data clk: versatile: fixup IM-PD1 clock implementation clk: versatile: pass a name to ICST clock provider ARM: integrator: pass parent IRQ to the SIC irqchip: versatile FPGA: support cascaded interrupts from DT gpio: davinci: don't create irq_domain in case of unbanked irqs gpio: davinci: use chained_irq_enter/chained_irq_exit API gpio: davinci: add OF support gpio: davinci: remove unused variable intc_irq_num gpio: davinci: convert to use irqdomain support. gpio: introduce GPIO_DAVINCI kconfig option gpio: davinci: get rid of DAVINCI_N_GPIO gpio: davinci: use {readl|writel}_relaxed() instead of __raw_* serial: sh-sci: Add OF support serial: sh-sci: Add device tree bindings documentation serial: sh-sci: Remove platform data mapbase and irqs fields serial: sh-sci: Remove platform data scbrr_algo_id field ...
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