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path: root/drivers/crypto/ccp/sp-dev.h
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2020-07-31crypto: ccp - use generic power managementVaibhav Gupta1-3/+3
Drivers using legacy power management .suspen()/.resume() callbacks have to manage PCI states and device's PM states themselves. They also need to take care of standard configuration registers. Switch to generic power management framework using a single "struct dev_pm_ops" variable to take the unnecessary load from the driver. This also avoids the need for the driver to directly call most of the PCI helper functions and device power state control functions as through the generic framework, PCI Core takes care of the necessary operations, and drivers are required to do only device-specific jobs. Signed-off-by: Vaibhav Gupta <[email protected]> Acked-by: John Allen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2020-03-12crypto: ccp - Cleanup sp_dev_master in psp_dev_destroy()John Allen1-0/+1
Introduce clear_psp_master_device() to ensure that sp_dev_master gets properly cleared on the release of a psp device. Fixes: 2a6170dfe755 ("crypto: ccp: Add Platform Security Processor (PSP) device support") Signed-off-by: John Allen <[email protected]> Acked-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2019-12-20crypto: ccp - add TEE support for Raven RidgeRijo Thomas1-1/+10
Adds a PCI device entry for Raven Ridge. Raven Ridge is an APU with a dedicated AMD Secure Processor having Trusted Execution Environment (TEE) support. The TEE provides a secure environment for running Trusted Applications (TAs) which implement security-sensitive parts of a feature. This patch configures AMD Secure Processor's TEE interface by initializing a ring buffer (shared memory between Rich OS and Trusted OS) which can hold multiple command buffer entries. The TEE interface is facilitated by a set of CPU to PSP mailbox registers. The next patch will address how commands are submitted to the ring buffer. Cc: Jens Wiklander <[email protected]> Cc: Tom Lendacky <[email protected]> Cc: Ard Biesheuvel <[email protected]> Co-developed-by: Devaraj Rangasamy <[email protected]> Signed-off-by: Devaraj Rangasamy <[email protected]> Signed-off-by: Rijo Thomas <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2019-12-20crypto: ccp - move SEV vdata to a dedicated data structureRijo Thomas1-1/+5
PSP can support both SEV and TEE interface. Therefore, move SEV specific registers to a dedicated data structure. TEE interface specific registers will be added in a later patch. Cc: Ard Biesheuvel <[email protected]> Cc: Tom Lendacky <[email protected]> Cc: Jens Wiklander <[email protected]> Co-developed-by: Devaraj Rangasamy <[email protected]> Signed-off-by: Devaraj Rangasamy <[email protected]> Signed-off-by: Rijo Thomas <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2019-08-09crypto: ccp - Remove unnecessary linux/pci.h includeBjorn Helgaas1-1/+0
Remove unused includes of linux/pci.h. Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Enrico Weigelt <[email protected]> Reviewed-by: Kate Stewart <[email protected]> Reviewed-by: Allison Randal <[email protected]> Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2019-01-11crypto: ccp - Update copyright notices and datesHook, Gary1-1/+1
Correct copyright dates for files that have had code added to them in 2018. Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2018-07-13crypto: ccp - Support register differences between PSP devicesTom Lendacky1-1/+6
In preparation for adding a new PSP device ID that uses different register offsets, add support to the PSP version data for register offset values. And then update the code to use these new register offset values. Signed-off-by: Tom Lendacky <[email protected]> Acked-by: Gary R Hook <[email protected]> Reviewed-by: Brijesh Singh <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-12-04crypto: ccp: Add Secure Encrypted Virtualization (SEV) command supportBrijesh Singh1-0/+4
AMD's new Secure Encrypted Virtualization (SEV) feature allows the memory contents of virtual machines to be transparently encrypted with a key unique to the VM. The programming and management of the encryption keys are handled by the AMD Secure Processor (AMD-SP) which exposes the commands for these tasks. The complete spec is available at: http://support.amd.com/TechDocs/55766_SEV-KM%20API_Specification.pdf Extend the AMD-SP driver to provide the following support: - an in-kernel API to communicate with the SEV firmware. The API can be used by the hypervisor to create encryption context for a SEV guest. - a userspace IOCTL to manage the platform certificates. Cc: Paolo Bonzini <[email protected]> Cc: "Radim Krčmář" <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Herbert Xu <[email protected]> Cc: Gary Hook <[email protected]> Cc: Tom Lendacky <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Improvements-by: Borislav Petkov <[email protected]> Signed-off-by: Brijesh Singh <[email protected]>
2017-12-04crypto: ccp: Add Platform Security Processor (PSP) device supportBrijesh Singh1-1/+23
The Platform Security Processor (PSP) is part of the AMD Secure Processor (AMD-SP) functionality. The PSP is a dedicated processor that provides support for key management commands in Secure Encrypted Virtualization (SEV) mode, along with software-based Trusted Execution Environment (TEE) to enable third-party trusted applications. Note that the key management functionality provided by the SEV firmware can be used outside of the kvm-amd driver hence it doesn't need to depend on CONFIG_KVM_AMD. Cc: Paolo Bonzini <[email protected]> Cc: "Radim Krčmář" <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Herbert Xu <[email protected]> Cc: Gary Hook <[email protected]> Cc: Tom Lendacky <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Improvements-by: Borislav Petkov <[email protected]> Signed-off-by: Brijesh Singh <[email protected]> Reviewed-by: Borislav Petkov <[email protected]>
2017-07-28csrypto: ccp - Expand RSA support for a v5 ccpGary R Hook1-0/+1
A version 5 CCP can handle an RSA modulus up to 16k bits. Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-07-18crypto: ccp - Abstract interrupt registerationBrijesh Singh1-2/+14
The CCP and PSP devices part of AMD Secure Procesor may share the same interrupt. Hence we expand the SP device to register a common interrupt handler and provide functions to CCP and PSP devices to register their interrupt callback which will be invoked upon interrupt. Signed-off-by: Brijesh Singh <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-07-18crypto: ccp - Introduce the AMD Secure Processor deviceBrijesh Singh1-0/+120
The CCP device is part of the AMD Secure Processor. In order to expand the usage of the AMD Secure Processor, create a framework that allows functional components of the AMD Secure Processor to be initialized and handled appropriately. Signed-off-by: Brijesh Singh <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>