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2024-06-11cpufreq: amd-pstate: change cpu freq transition delay for some modelsXiaojian Du1-2/+7
Some of AMD ZEN4 APU/CPU have support for adjusting the CPU core clock more quickly and presicely according to CPU work loading. This is advertised by the Fast CPPC x86 feature. This change will only be effective in the *passive mode* of AMD pstate driver. From the test results of different transition delay values, 600us is chosen to make a balance between performance and power consumption. Some test results on AMD Ryzen 7840HS(Phoenix) APU: 1. Tbench (Energy less is better, Throughput more is better, PPW--Performance per Watt more is better) ============= =================== ============== =============== ============== =============== ============== =============== =============== Trans Delay Tbench governor:schedutil, 3-iterations average ============= =================== ============== =============== ============== =============== ============== =============== =============== 1000us Clients 1 2 4 8 12 16 32 Energy/Joules 2010 2804 8768 17171 16170 15132 15027 Throughput/(MB/s) 114 259 1041 3010 3135 4851 4605 PPW 0.0567 0.0923 0.1187 0.1752 0.1938 0.3205 0.3064 600us Clients 1 2 4 8 12 16 32 Energy/Joules 2115 (5.22%) 2388 (-14.84%) 10700(22.03%) 16716 (-2.65%) 15939 (-1.43%) 15053 (-0.52%) 15083 (0.37% ) Throughput/(MB/s) 122 (7.02%) 234 (-9.65% ) 1188 (14.12%) 3003 (-0.23%) 3143 (0.26% ) 4842 (-0.19%) 4603 (-0.04%) PPW 0.0576(1.59%) 0.0979(6.07% ) 0.111(-6.49%) 0.1796(2.51% ) 0.1971(1.70% ) 0.3216(0.34% ) 0.3051(-0.42%) ============= =================== ============== ================ ============= =============== ============== =============== =============== 2.Dbench (Energy less is better, Throughput more is better, PPW--Performance per Watt more is better) ============= =================== ============== =============== ============== =============== ============== =============== =============== Trans Delay Dbench governor:schedutil, 3-iterations average ============= =================== ============== =============== ============== =============== ============== =============== =============== 1000us Clients 1 2 4 8 12 16 32 Energy/Joules 4890 3779 3567 5157 5611 6500 8163 Throughput/(MB/s) 327 167 220 577 775 938 1397 PPW 0.0668 0.0441 0.0616 0.1118 0.1381 0.1443 0.1711 600us Clients 1 2 4 8 12 16 32 Energy/Joules 4915 (0.51%) 4912 (29.98%) 3506 (-1.71%) 4907 (-4.85% ) 5011 (-10.69%) 5672 (-12.74%) 8141 (-0.27%) Throughput/(MB/s) 348 (6.42%) 284 (70.06%) 220 (0.00% ) 518 (-10.23%) 712 (-8.13% ) 854 (-8.96% ) 1475 (5.58% ) PPW 0.0708(5.99%) 0.0578(31.07%) 0.0627(1.79% ) 0.1055(-5.64% ) 0.142(2.82% ) 0.1505(4.30% ) 0.1811(5.84% ) ============= =================== ============== =============== ============== =============== ============== =============== =============== 3.Hackbench(less time is better) ============= =========================== ========================== hackbench governor:schedutil ============= =========================== ========================== Trans Delay Process Mode Ave time(s) Thread Mode Ave time(s) 1000us 14.484 14.484 600us 14.418(-0.46%) 15.41(+6.39%) ============= =========================== ========================== 4.Perf_sched_bench(less time is better) ============= =================== ============== ============== ============== =============== =============== ============= Trans Delay perf_sched_bench governor:schedutil ============= =================== ============== ============== ============== =============== =============== ============= 1000us Groups 1 2 4 8 12 24 AveTime(s) 1.64 2.851 5.878 11.636 16.093 26.395 600us Groups 1 2 4 8 12 24 AveTime(s) 1.69(3.05%) 2.845(-0.21%) 5.843(-0.60%) 11.576(-0.52%) 16.092(-0.01%) 26.32(-0.28%) ============= ================== ============== ============== ============== =============== =============== ============== 5.Sysbench(higher is better) ============= ================== ============== ================= ============== ================ =============== ================= Sysbench governor:schedutil ============= ================== ============== ================= ============== ================ =============== ================= 1000us Thread 1 2 4 8 12 24 Ave events 6020.98 12273.39 24119.82 46171.57 47074.37 47831.72 600us Thread 1 2 4 8 12 24 Ave events 6154.82(2.22%) 12271.63(-0.01%) 24392.5(1.13%) 46117.64(-0.12%) 46852.19(-0.47%) 47678.92(-0.32%) ============= ================== ============== ================= ============== ================ =============== ================= In conclusion, a shorter transition delay of cpu clock will make a quite positive effect to improve PPW on Dbench test, in the meanwhile, keep stable performance on Tbench, Hackbench, Perf_sched_bench and Sysbench. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Perry Yuan <perry.yuan@amd.com> Acked-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-07cpufreq: intel_pstate: Support Emerald Rapids OOB modeSrinivas Pandruvada1-0/+1
Prevent intel_pstate from loading when OOB (Out Of Band) P-states mode is enabled in Emerald Rapids. The OOB identifying bits are same as for the prior generation CPUs like Sapphire Rapids servers, so also add Emerald Rapids to the intel_pstate_cpu_oob_ids[] list. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-07cpufreq: intel_pstate: Use Meteor Lake EPPs for Arrow LakeSrinivas Pandruvada1-0/+2
Use the same default EPPs as Meteor Lake generation. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-07cpufreq: intel_pstate: Update Meteor Lake EPPsSrinivas Pandruvada1-1/+1
Update the default balance_performance EPP to 64. This gives better performance and also perf/watt compared to current value of 115. For example: Speedometer 2.1 score: +19% Perf/watt: +5.25% Webxprt 4 score score: +12% Perf/watt: +6.12% 3DMark Wildlife extreme unlimited score score: +3.2% Perf/watt: +11.5% Geekbench6 MT score: +2.14% Perf/watt: +0.32% Also update balance_power EPP default to 179. With this change: Video Playback power is reduced by 52% Team video conference power is reduced by 35% With Power profile daemon now sets balance_power EPP on DC instead of balance_performance, updating balance_power EPP will help to extend battery life. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-07cpufreq: intel_pstate: Switch to new Intel CPU model definesTony Luck1-46/+44
New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck <tony.luck@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-07cpufreq: Switch to new Intel CPU model definesTony Luck1-4/+4
New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck <tony.luck@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-06cpufreq: ti-cpufreq: Handle deferred probe with dev_err_probe()Primoz Fiser1-1/+1
Handle deferred probing gracefully by using dev_err_probe() to not spam console with unnecessary error messages. Fixes: f88d152dc739 ("cpufreq: ti: Migrate to dev_pm_opp_set_config()") Signed-off-by: Primoz Fiser <primoz.fiser@norik.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-06-03cpufreq: intel_pstate: Fix unchecked HWP MSR accessSrinivas Pandruvada1-1/+2
Fix unchecked MSR access error for processors with no HWP support. On such processors, maximum frequency can be changed by the system firmware using ACPI event ACPI_PROCESSOR_NOTIFY_HIGEST_PERF_CHANGED. This results in accessing HWP MSR 0x771. Call Trace: <TASK> generic_exec_single+0x58/0x120 smp_call_function_single+0xbf/0x110 rdmsrl_on_cpu+0x46/0x60 intel_pstate_get_hwp_cap+0x1b/0x70 intel_pstate_update_limits+0x2a/0x60 acpi_processor_notify+0xb7/0x140 acpi_ev_notify_dispatch+0x3b/0x60 HWP MSR 0x771 can be only read on a CPU which supports HWP and enabled. Hence intel_pstate_get_hwp_cap() can only be called when hwp_active is true. Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Closes: https://lore.kernel.org/linux-pm/20240529155740.Hq2Hw7be@linutronix.de/ Fixes: e8217b4bece3 ("cpufreq: intel_pstate: Update the maximum CPU frequency consistently") Tested-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-03cpufreq: dt-platdev: add missing MODULE_DESCRIPTION() macroJeff Johnson1-0/+1
make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/cpufreq/cpufreq-dt-platdev.o Add the missing invocation of the MODULE_DESCRIPTION() macro. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-05-28cpufreq: amd-pstate: Fix the inconsistency in max frequency unitsDhananjay Ugwekar1-1/+1
The nominal frequency in cpudata is maintained in MHz whereas all other frequencies are in KHz. This means we have to convert nominal frequency value to KHz before we do any interaction with other frequency values. In amd_pstate_set_boost(), this conversion from MHz to KHz is missed, fix that. Tested on a AMD Zen4 EPYC server Before: $ cat /sys/devices/system/cpu/cpufreq/policy*/scaling_max_freq | uniq 2151 $ cat /sys/devices/system/cpu/cpufreq/policy*/cpuinfo_min_freq | uniq 400000 $ cat /sys/devices/system/cpu/cpufreq/policy*/scaling_cur_freq | uniq 2151 409422 After: $ cat /sys/devices/system/cpu/cpufreq/policy*/scaling_max_freq | uniq 2151000 $ cat /sys/devices/system/cpu/cpufreq/policy*/cpuinfo_min_freq | uniq 400000 $ cat /sys/devices/system/cpu/cpufreq/policy*/scaling_cur_freq | uniq 2151000 1799527 Fixes: ec437d71db77 ("cpufreq: amd-pstate: Introduce a new AMD P-State driver to support future processors") Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Tested-by: Peter Jung <ptr1337@cachyos.org> Cc: 5.17+ <stable@vger.kernel.org> # 5.17+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-05-28cpufreq: amd-pstate: remove global header fileArnd Bergmann3-2/+139
When extra warnings are enabled, gcc points out a global variable definition in a header: In file included from drivers/cpufreq/amd-pstate-ut.c:29: include/linux/amd-pstate.h:123:27: error: 'amd_pstate_mode_string' defined but not used [-Werror=unused-const-variable=] 123 | static const char * const amd_pstate_mode_string[] = { | ^~~~~~~~~~~~~~~~~~~~~~ This header is only included from two files in the same directory, and one of them uses only a single definition from it, so clean it up by moving most of the contents into the driver that uses them, and making shared bits a local header file. Fixes: 36c5014e5460 ("cpufreq: amd-pstate: optimize driver working mode selection in amd_pstate_param()") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-05-28cpufreq: longhaul: Fix kernel-doc param for longhaul_setstateYang Li1-2/+3
The patch updates the function documentation comment for longhaul_setstate to adhere to the kernel-doc specification. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-05-28cpufreq: qcom-nvmem: eliminate uses of of_node_put()Javier Carrasco1-18/+7
Make use of the __free() macro to automate memory deallocation when the existing device nodes get out of scope, removing the need for of_node_put() and therefore increasing code safety if more error paths are added to the driver, which could miss the required of_node_put() as it already occurred with commit '57f2f8b4aa0c ("cpufreq: qcom: Refactor the driver to make it easier to extend")'. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-05-28cpufreq: qcom-nvmem: fix memory leaks in probe error pathsJavier Carrasco1-3/+10
The code refactoring added new error paths between the np device node allocation and the call to of_node_put(), which leads to memory leaks if any of those errors occur. Add the missing of_node_put() in the error paths that require it. Cc: stable@vger.kernel.org Fixes: 57f2f8b4aa0c ("cpufreq: qcom: Refactor the driver to make it easier to extend") Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-05-28cpufreq: scmi: Avoid overflow of target_freq in fast switchJagadeesh Kona1-2/+2
Conversion of target_freq to HZ in scmi_cpufreq_fast_switch() can lead to overflow if the multiplied result is greater than UINT_MAX, since type of target_freq is unsigned int. Avoid this overflow by assigning target_freq to unsigned long variable for converting it to HZ. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-05-28cpufreq: sun50i: replace of_node_put() with automatic cleanup handlerJavier Carrasco1-17/+8
Make use of the __free() cleanup handler to automatically free nodes when they get out of scope. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-05-28cpufreq: sun50i: fix memory leak in dt_has_supported_hw()Javier Carrasco1-2/+2
The for_each_child_of_node() loop does not decrement the child node refcount before the break instruction, even though the node is no longer required. This can be avoided with the new for_each_child_of_node_scoped() macro that removes the need for any of_node_put(). Fixes: fa5aec9561cf ("cpufreq: sun50i: Add support for opp_supported_hw") Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-05-27cpufreq: qcom-nvmem: add support for IPQ5321Kathiravan Thirumoorthy1-0/+1
Like all other SoCs in IPQ5332 family, cpufreq for IPQ5321 is also determined by the eFuse, with the maximum limit of 1.1GHz. Add support for the same. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Link: https://lore.kernel.org/r/20240325-ipq5321-sku-support-v2-3-f30ce244732f@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-21Merge tag 'pm-6.10-rc1-2' of ↵Linus Torvalds1-0/+7
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management fixes from Rafael Wysocki: "These fix the amd-pstate driver and the operating performance point (OPP) handling related to generic PM domains. Specifics: - Fix a memory leak in the exit path of amd-pstate (Peng Ma) - Fix required_opp_tables handling in the cases when multiple generic PM domains share one OPP table (Viresh Kumar)" * tag 'pm-6.10-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: OPP: Fix required_opp_tables for multiple genpds using same table cpufreq: amd-pstate: fix memory leak on CPU EPP exit
2024-05-17Merge tag 'powerpc-6.10-1' of ↵Linus Torvalds1-4/+4
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: - Enable BPF Kernel Functions (kfuncs) in the powerpc BPF JIT. - Allow per-process DEXCR (Dynamic Execution Control Register) settings via prctl, notably NPHIE which controls hashst/hashchk for ROP protection. - Install powerpc selftests in sub-directories. Note this changes the way run_kselftest.sh needs to be invoked for powerpc selftests. - Change fadump (Firmware Assisted Dump) to better handle memory add/remove. - Add support for passing additional parameters to the fadump kernel. - Add support for updating the kdump image on CPU/memory add/remove events. - Other small features, cleanups and fixes. Thanks to Andrew Donnellan, Andy Shevchenko, Aneesh Kumar K.V, Arnd Bergmann, Benjamin Gray, Bjorn Helgaas, Christian Zigotzky, Christophe Jaillet, Christophe Leroy, Colin Ian King, Cédric Le Goater, Dr. David Alan Gilbert, Erhard Furtner, Frank Li, GUO Zihua, Ganesh Goudar, Geoff Levand, Ghanshyam Agrawal, Greg Kurz, Hari Bathini, Joel Stanley, Justin Stitt, Kunwu Chan, Li Yang, Lidong Zhong, Madhavan Srinivasan, Mahesh Salgaonkar, Masahiro Yamada, Matthias Schiffer, Naresh Kamboju, Nathan Chancellor, Nathan Lynch, Naveen N Rao, Nicholas Miehlbradt, Ran Wang, Randy Dunlap, Ritesh Harjani, Sachin Sant, Shirisha Ganta, Shrikanth Hegde, Sourabh Jain, Stephen Rothwell, sundar, Thorsten Blum, Vaibhav Jain, Xiaowei Bao, Yang Li, and Zhao Chenhui. * tag 'powerpc-6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (85 commits) powerpc/fadump: Fix section mismatch warning powerpc/85xx: fix compile error without CONFIG_CRASH_DUMP powerpc/fadump: update documentation about bootargs_append powerpc/fadump: pass additional parameters when fadump is active powerpc/fadump: setup additional parameters for dump capture kernel powerpc/pseries/fadump: add support for multiple boot memory regions selftests/powerpc/dexcr: Fix spelling mistake "predicition" -> "prediction" KVM: PPC: Book3S HV nestedv2: Fix an error handling path in gs_msg_ops_kvmhv_nestedv2_config_fill_info() KVM: PPC: Fix documentation for ppc mmu caps KVM: PPC: code cleanup for kvmppc_book3s_irqprio_deliver KVM: PPC: Book3S HV nestedv2: Cancel pending DEC exception powerpc/xmon: Check cpu id in commands "c#", "dp#" and "dx#" powerpc/code-patching: Use dedicated memory routines for patching powerpc/code-patching: Test patch_instructions() during boot powerpc64/kasan: Pass virtual addresses to kasan_init_phys_region() powerpc: rename SPRN_HID2 define to SPRN_HID2_750FX powerpc: Fix typos powerpc/eeh: Fix spelling of the word "auxillary" and update comment macintosh/ams: Fix unused variable warning powerpc/Makefile: Remove bits related to the previous use of -mcmodel=large ...
2024-05-16cpufreq: amd-pstate: fix memory leak on CPU EPP exitPeng Ma1-0/+7
The cpudata memory from kzalloc() in amd_pstate_epp_cpu_init() is not freed in the analogous exit function, so fix that. Signed-off-by: Peng Ma <andypma@tencent.com> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Perry Yuan <Perry.Yuan@amd.com> [ rjw: Subject and changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-05-14Merge tag 'pm-6.10-rc1' of ↵Linus Torvalds12-299/+469
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael Wysocki: "These are mostly cpufreq updates, including a significant intel-pstate driver update and several amd-pstate improvements plus some updates of ARM cpufreq drivers, general fixes and cleanups. Also included are changes related to system sleep, power capping updates adding support for a new platform and a new hardware feature (among other things), a Samsung exynos-asv driver update allowing it to change its Energy Model after adjusting voltage, minor cpuidle and devfreq updates and a small documentation cleanup. Specifics: - Rework the handling of disabled turbo in the intel_pstate driver and make it update the maximum CPU frequency consistently regardless of the reason on top of a number of cleanups (Rafael Wysocki) - Add missing checks for NULL .exit() cpufreq driver callback to the cpufreq core (Viresh Kumar) - Prevent pulicy->max from going above the frequency QoS maximum value when cpufreq_frequency_table_verify() is used (Xuewen Yan) - Prevent a negative CPU number or frequency value from being printed if they are really large (Joshua Yeong) - Update MAINTAINERS entry for amd-pstate to add two new submaintainers and a designated reviewer (Huang Rui) - Clean up the amd-pstate driver and update its documentation (Gautham Shenoy) - Fix the highest frequency issue in the amd-pstate driver which limits performance (Perry Yuan) - Enable CPPC v2 for certain processors in the family 17H, as requested by TR40 processor users who expect improved performance and lower system temperature (Perry Yuan) - Change latency and delay values to be read from platform firmware firstly for more accurate timing (Perry Yuan) - A new quirk is introduced for supporting amd-pstate on legacy processors which either lack CPPC capability, or only only have CPPC v2 capability (Perry Yuan) - Sun50i cpufreq: Add support for opp_supported_hw, H616 platform and general cleanups (Andre Przywara, Martin Botka, Brandon Cheo Fusi, Dan Carpenter, Viresh Kumar) - CPPC cpufreq: Fix possible null pointer dereference (Aleksandr Mishin) - Eliminate uses of of_node_put() from cpufreq (Javier Carrasco, Shivani Gupta) - brcmstb-avs: ISO C90 forbids mixed declarations (Portia Stephens) - mediatek cpufreq: Add support for MT7988A (Sam Shih) - cpufreq-qcom-hw: Add SM4450 compatibles in DT bindings (Tengfei Fan) - Fix struct cpudata::epp_cached kernel-doc in the intel_pstate cpufreq driver (Jeff Johnson) - Fix kerneldoc description of ladder_do_selection() (Jeff Johnson) - Convert the cpuidle kirkwood driver to platform remove callback returning void (Yangtao Li) - Replace deprecated strncpy() with strscpy() in the hibernation core code (Justin Stitt) - Use %ps to simplify debug output in the core system-wide suspend and resume code (Len Brown) - Remove unnecessary else from device_init_wakeup() and make device_wakeup_disable() return void (Dhruva Gole) - Enable PMU support in the Intel TPMI RAPL driver (Zhang Rui) - Add support for ArrowLake-H platform to the Intel RAPL driver (Zhang Rui) - Avoid explicit cpumask allocation on stack in DTPM (Dawei Li) - Make the Samsung exynos-asv driver update the Energy Model after adjusting voltage on top of some preliminary changes of the OPP and Enery Model generic code (Lukasz Luba) - Remove a reference to a function that has been dropped from the power management documentation (Bjorn Helgaas) - Convert the platfrom remove callback to .remove_new for the exyno-nocp, exynos-ppmu, mtk-cci-devfreq, sun8i-a33-mbus, and rk3399_dmc devfreq drivers (Uwe Kleine-König) - Use DEFINE_SIMPLE_PM_OPS for exyno-bus.c driver (Anand Moon)" * tag 'pm-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (68 commits) PM / devfreq: exynos: Use DEFINE_SIMPLE_DEV_PM_OPS for PM functions PM / devfreq: rk3399_dmc: Convert to platform remove callback returning void PM / devfreq: sun8i-a33-mbus: Convert to platform remove callback returning void PM / devfreq: mtk-cci: Convert to platform remove callback returning void PM / devfreq: exynos-ppmu: Convert to platform remove callback returning void PM / devfreq: exynos-nocp: Convert to platform remove callback returning void cpufreq: amd-pstate: fix the highest frequency issue which limits performance cpufreq: intel_pstate: fix struct cpudata::epp_cached kernel-doc cpuidle: ladder: fix ladder_do_selection() kernel-doc powercap: intel_rapl_tpmi: Enable PMU support powercap: intel_rapl: Introduce APIs for PMU support PM: hibernate: replace deprecated strncpy() with strscpy() cpufreq: Fix up printing large CPU numbers and frequency values MAINTAINERS: cpufreq: amd-pstate: Add co-maintainers and reviewer cpufreq: amd-pstate: remove unused variable lowest_nonlinear_freq cpufreq: amd-pstate: fix code format problems cpufreq: amd-pstate: Add quirk for the pstate CPPC capabilities missing cppc_acpi: print error message if CPPC is unsupported cpufreq: amd-pstate: get transition delay and latency value from ACPI tables cpufreq: amd-pstate: Bail out if min/max/nominal_freq is 0 ...
2024-05-08cpufreq: amd-pstate: fix the highest frequency issue which limits performancePerry Yuan1-3/+19
To address the performance drop issue, an optimization has been implemented. The incorrect highest performance value previously set by the low-level power firmware for AMD CPUs with Family ID 0x19 and Model ID ranging from 0x70 to 0x7F series has been identified as the cause. To resolve this, a check has been implemented to accurately determine the CPU family and model ID. The correct highest performance value is now set and the performance drop caused by the incorrect highest performance value are eliminated. Before the fix, the highest frequency was set to 4200MHz, now it is set to 4971MHz which is correct. CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ MHZ 0 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000 1 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000 2 0 0 1 1:1:1:0 yes 4971.0000 400.0000 4865.8140 3 0 0 1 1:1:1:0 yes 4971.0000 400.0000 400.0000 Fixes: f3a052391822 ("cpufreq: amd-pstate: Enable amd-pstate preferred core support") Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218759 Signed-off-by: Perry Yuan <perry.yuan@amd.com> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Tested-by: Gaha Bana <gahabana@gmail.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-05-08powerpc: rename SPRN_HID2 define to SPRN_HID2_750FXMatthias Schiffer1-4/+4
This register number is hardware-specific, rename it for clarity. FIXME comments are added in a few places where it seems like the wrong register is used. As I can't test this, only the rename is done with no functional change. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240124105031.45734-1-matthias.schiffer@ew.tq-group.com
2024-05-07cpufreq: intel_pstate: fix struct cpudata::epp_cached kernel-docJeff Johnson1-1/+1
make C=1 currently gives the following warning: drivers/cpufreq/intel_pstate.c:262: warning: Function parameter or struct member 'epp_cached' not described in 'cpudata' Add the missing ":" to fix the trivial kernel-doc syntax error. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-05-02Merge branch 'amd-pstate'Rafael J. Wysocki1-103/+155
Merge AMD P-state driver changes from Perry Yuan for v6.10: "- Enable CPPC v2 for certain processors in the family 17H, as requested by TR40 processor users who expect improved performance and lower system temperature. - Change latency and delay values to be read from platform firmware firstly for more accurate timing. - A new quirk is introduced for supporting amd-pstate on legacy processors which either lack CPPC capability, or only only have CPPC v2 capability." * amd-pstate: MAINTAINERS: cpufreq: amd-pstate: Add co-maintainers and reviewer cpufreq: amd-pstate: remove unused variable lowest_nonlinear_freq cpufreq: amd-pstate: fix code format problems cpufreq: amd-pstate: Add quirk for the pstate CPPC capabilities missing cppc_acpi: print error message if CPPC is unsupported cpufreq: amd-pstate: get transition delay and latency value from ACPI tables cpufreq: amd-pstate: Bail out if min/max/nominal_freq is 0 cpufreq: amd-pstate: Remove amd_get_{min,max,nominal,lowest_nonlinear}_freq() cpufreq: amd-pstate: Unify computation of {max,min,nominal,lowest_nonlinear}_freq cpufreq: amd-pstate: Document the units for freq variables in amd_cpudata cpufreq: amd-pstate: Document *_limit_* fields in struct amd_cpudata
2024-04-30cpufreq: Fix up printing large CPU numbers and frequency valuesJoshua Yeong1-2/+2
A negative CPU number or frequency value may be printed if they are really large (which is unlikely, though). Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com> Reviewed-by: Thorsten Blum <thorsten.blum@toblux.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> [ rjw: Subject and changelog edits. ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-30Merge tag 'cpufreq-arm-updates-6.10' of ↵Rafael J. Wysocki8-76/+216
git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm Merge ARM cpufreq updates for 6.10 from Viresh Kumar: "- Sun50i: Add support for opp_supported_hw, H616 platform and general cleaups (Andre Przywara, Martin Botka, Brandon Cheo Fusi, Dan Carpenter, and Viresh Kumar). - cppc: Fix possible null pointer dereference (Aleksandr Mishin). - Eliminate uses of of_node_put() (Javier Carrasco, and Shivani Gupta). - brcmstb-avs: ISO C90 forbids mixed declarations (Portia Stephens). - mediatek: Add support for MT7988A (Sam Shih). - cpufreq-qcom-hw: Add SM4450 compatibles in DT bindings (Tengfei Fan)." * tag 'cpufreq-arm-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM4450 compatibles cpufreq: sun50i: fix error returns in dt_has_supported_hw() cpufreq: brcmstb-avs-cpufreq: ISO C90 forbids mixed declarations cpufreq: dt-platdev: eliminate uses of of_node_put() cpufreq: dt: eliminate uses of of_node_put() cpufreq: ti: Implement scope-based cleanup in ti_cpufreq_match_node() cpufreq: mediatek: Add support for MT7988A cpufreq: sun50i: Fix build warning around snprint() arm64: dts: allwinner: h616: enable DVFS for all boards arm64: dts: allwinner: h616: Add CPU OPPs table cpufreq: sun50i: Add H616 support cpufreq: sun50i: Add support for opp_supported_hw cpufreq: sun50i: Refactor speed bin decoding dt-bindings: opp: Describe H616 OPPs and opp-supported-hw cpufreq: dt-platdev: Blocklist Allwinner H616/618 SoCs firmware: smccc: Export revision soc_id function cppc_cpufreq: Fix possible null pointer dereference cpupfreq: tegra124: eliminate uses of of_node_put()
2024-04-30cpufreq: amd-pstate: remove unused variable lowest_nonlinear_freqPerry Yuan1-4/+2
removed the unused variable `lowest_nonlinear_freq` for build warning. This variable was defined and assigned a value in the previous code, but it was not used in the subsequent code. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202404271038.em6nJjzy-lkp@intel.com/ Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-30cpufreq: amd-pstate: fix code format problemsPerry Yuan1-4/+3
get some code format problems fixed in the amd-pstate driver. Changes Made: - Fixed incorrect comment format in the functions. - Removed unnecessary blank line. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202404271148.HK9yHBlB-lkp@intel.com/ Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-26cpufreq: amd-pstate: Add quirk for the pstate CPPC capabilities missingPerry Yuan1-2/+51
Add quirks table to get CPPC capabilities issue fixed by providing correct perf or frequency values while driver loading. If CPPC capabilities are not defined in the ACPI tables or wrongly defined by platform firmware, it needs to use quick to get those issues fixed with correct workaround values to make pstate driver can be loaded even though there are CPPC capabilities errors. The workaround will match the broken BIOS which lack of CPPC capabilities nominal_freq and lowest_freq definition in the ACPI table. $ cat /sys/devices/system/cpu/cpu0/acpi_cppc/lowest_freq 0 $ cat /sys/devices/system/cpu/cpu0/acpi_cppc/nominal_freq 0 Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Tested-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-26cpufreq: amd-pstate: get transition delay and latency value from ACPI tablesPerry Yuan1-2/+32
Make pstate driver initially retrieve the P-state transition delay and latency values from the BIOS ACPI tables which has more reasonable delay and latency values according to the platform design and requirements. Previously there values were hardcoded at specific value which may have conflicted with platform and it might not reflect the most accurate or optimized setting for the processor. [054h 0084 8] Preserve Mask : FFFFFFFF00000000 [05Ch 0092 8] Write Mask : 0000000000000001 [064h 0100 4] Command Latency : 00000FA0 [068h 0104 4] Maximum Access Rate : 0000EA60 [06Ch 0108 2] Minimum Turnaround Time : 0000 Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Tested-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-26cpufreq: amd-pstate: Bail out if min/max/nominal_freq is 0Perry Yuan1-6/+10
The amd-pstate driver cannot work when the min_freq, nominal_freq or the max_freq is zero. When this happens it is prudent to error out early on rather than waiting failing at the time of the governor initialization. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Tested-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-26cpufreq: amd-pstate: Remove amd_get_{min,max,nominal,lowest_nonlinear}_freq()Gautham R. Shenoy1-30/+10
amd_get_{min,max,nominal,lowest_nonlinear}_freq() functions merely return cpudata->{min,max,nominal,lowest_nonlinear}_freq values. There is no loss in readability in replacing their invocations by accesses to the corresponding members of cpudata. Do so and remove these helper functions. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Li Meng <li.meng@amd.com> Tested-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-26cpufreq: amd-pstate: Unify computation of ↵Perry Yuan1-67/+59
{max,min,nominal,lowest_nonlinear}_freq Currently the amd_get_{min, max, nominal, lowest_nonlinear}_freq() helpers computes the values of min_freq, max_freq, nominal_freq and lowest_nominal_freq respectively afresh from cppc_get_perf_caps(). This is not necessary as there are fields in cpudata to cache these values. To simplify this, add a single helper function named amd_pstate_init_freq() which computes all these frequencies at once, and caches it in cpudata. Use the cached values everywhere else in the code. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Li Meng <li.meng@amd.com> Tested-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Co-developed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-25cpufreq: sun50i: fix error returns in dt_has_supported_hw()Dan Carpenter1-2/+2
The dt_has_supported_hw() function returns type bool. That means these negative error codes are cast to true but the function should return false instead. Fixes: fa5aec9561cf ("cpufreq: sun50i: Add support for opp_supported_hw") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-25cpufreq: brcmstb-avs-cpufreq: ISO C90 forbids mixed declarationsPortia Stephens1-1/+4
There is a compile warning because a NULL pointer check was added before a struct was declared. This moves the NULL pointer check to after the struct is declared and moves the struct assignment to after the NULL pointer check. Fixes: f661017e6d32 ("cpufreq: brcmstb-avs-cpufreq: add check for cpufreq_cpu_get's return value") Signed-off-by: Portia Stephens <portia.stephens@canonical.com> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-24sched/cpufreq: Rename arch_update_thermal_pressure() => ↵Vincent Guittot1-2/+2
arch_update_hw_pressure() Now that cpufreq provides a pressure value to the scheduler, rename arch_update_thermal_pressure into HW pressure to reflect that it returns a pressure applied by HW (i.e. with a high frequency change) and not always related to thermal mitigation but also generated by max current limitation as an example. Such high frequency signal needs filtering to be smoothed and provide an value that reflects the average available capacity into the scheduler time scale. Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Tested-by: Lukasz Luba <lukasz.luba@arm.com> Reviewed-by: Qais Yousef <qyousef@layalina.io> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://lore.kernel.org/r/20240326091616.3696851-5-vincent.guittot@linaro.org
2024-04-24cpufreq: Add a cpufreq pressure feedback for the schedulerVincent Guittot1-0/+36
Provide to the scheduler a feedback about the temporary max available capacity. Unlike arch_update_thermal_pressure(), this doesn't need to be filtered as the pressure will happen for dozens of ms or more. Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Tested-by: Lukasz Luba <lukasz.luba@arm.com> Reviewed-by: Qais Yousef <qyousef@layalina.io> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20240326091616.3696851-2-vincent.guittot@linaro.org
2024-04-23cpufreq: dt-platdev: eliminate uses of of_node_put()Javier Carrasco1-5/+2
Make use of the __free() cleanup handler to automatically free nodes when they get out of scope. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-23cpufreq: dt: eliminate uses of of_node_put()Javier Carrasco1-15/+6
Make use of the __free() cleanup handler to automatically free nodes when they get out of scope. Only find_supply_name() is affected, and the new mechanism removes the need for a 'goto' and the 'name' local variable. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-23cpufreq: ti: Implement scope-based cleanup in ti_cpufreq_match_node()Shivani Gupta1-3/+1
Modify the ti_cpufreq_match_node() function to utilize the __free() cleanup handler for automatically releasing the device node when it goes out of scope. By moving the declaration to the initialization, the patch ensures that the device node is properly managed throughout the function's scope, thus eliminating the need for manual invocation of of_node_put(). This approach reduces the potential for memory leaks. Suggested-by: Julia Lawall <julia.lawall@inria.fr> Signed-off-by: Shivani Gupta <shivani07g@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-23cpufreq: mediatek: Add support for MT7988ASam Shih1-0/+10
This add cpufreq support for mediatek MT7988A SoC. The platform data of MT7988A is different from previous MediaTek SoCs, so we add a new compatible and platform data for it. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-23cpufreq: sun50i: Fix build warning around snprint()Viresh Kumar1-4/+2
The Sun50i driver generates a warning with W=1: warning: '%d' directive output may be truncated writing between 1 and 10 bytes into a region of size 2 [-Wformat-truncation=] Fix it by allocating a big enough array to print an integer. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202404191715.LDwMm2gP-lkp@intel.com/ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Julian Calaby <julian.calaby@gmail.com>
2024-04-19cpufreq: sun50i: Add H616 supportMartin Botka1-0/+67
The Allwinner H616/H618 SoCs have different OPP tables per SoC version and die revision. The SoC version is stored in NVMEM, as before, though encoded differently. The die revision is in a different register, in the SRAM controller. Firmware already exports that value in a standardised way, through the SMCCC SoCID mechanism. We need both values, as some chips have the same SoC version, but they don't support the same frequencies and they get differentiated by the die revision. Add the new compatible string and tie the new translation function to it. This mechanism not only covers the original H616 SoC, but also its very close sibling SoCs H618 and H700, so add them to the list as well. Signed-off-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-19cpufreq: sun50i: Add support for opp_supported_hwAndre Przywara1-8/+54
The opp_supported_hw DT property allows the DT to specify a mask of chip revisions that a certain OPP is eligible for. This allows for easy limiting of maximum frequencies, for instance. Add support for that in the sun50i-cpufreq-nvmem driver. We support both the existing opp-microvolt suffix properties as well as the opp-supported-hw property, the generic code figures out which is needed automatically. However if none of the DT OPP nodes contain an opp-supported-hw property, the core code will ignore all OPPs and the driver will fail probing. So check the DT's eligibility first before using that feature. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-19cpufreq: sun50i: Refactor speed bin decodingBrandon Cheo Fusi1-25/+49
Make converting the speed bin value into a speed grade generic and determined by a platform specific callback. Also change the prototypes involved to encode the speed bin directly in the return value. This allows to extend the driver more easily to support more SoCs. Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com> [Andre: merge output into return value] Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-19cpufreq: dt-platdev: Blocklist Allwinner H616/618 SoCsMartin Botka1-0/+3
The AllWinner H616 SoC will use the (extended) H6 OPP driver, so add them to the cpufreq-dt blocklist, to not create the device twice. This also affects the closely related sibling SoCs H618 and H700. Signed-off-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-19cppc_cpufreq: Fix possible null pointer dereferenceAleksandr Mishin1-2/+12
cppc_cpufreq_get_rate() and hisi_cppc_cpufreq_get_rate() can be called from different places with various parameters. So cpufreq_cpu_get() can return null as 'policy' in some circumstances. Fix this bug by adding null return check. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: a28b2bfc099c ("cppc_cpufreq: replace per-cpu data array with a list") Signed-off-by: Aleksandr Mishin <amishin@t-argos.ru> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-04-19cpupfreq: tegra124: eliminate uses of of_node_put()Javier Carrasco1-13/+6
Make use of the __free() cleanup handler to automatically free nodes when they get out of scope. Only the probe function is affected by this modification. Given that this mechanism requires the node to be initialized, its initialization and the value check have been moved to the top of the function. After removing uses of of_node_put(), the jump to out_put_np is no longer necessary. Suggested-by: Julia Lawall <julia.lawall@inria.fr> Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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