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Like it's already done in one place in the driver, convert the rest to use pr_*
macros instead of printk(KERN_LEVEL) calls.
While here, join strings to be one string for one line to make grep on them
easier.
There is no functional change.
Signed-off-by: Andy Shevchenko <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Link: http://lkml.kernel.org/r/1451310085-113182-1-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <[email protected]>
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Signed-off-by: Yoshinori Sato <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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Signed-off-by: Yoshinori Sato <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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Signed-off-by: Yoshinori Sato <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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Signed-off-by: Yoshinori Sato <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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Counter overflow detection use for overflow interrupt
Signed-off-by: Yoshinori Sato <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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If by some reason timerclk is not available, both clockevent and
clocksource initializations correctly exit, but output of errno to
kernel log buffer may be confusing:
lpc32xx_clk_init: failed to map system control block registers
lpc32xx_clocksource_init: clock get failed (4294966779)
lpc32xx_clockevent_init: clock get failed (4294966779)
Use signed integer output in the correspondent pr_err() string formats:
lpc32xx_clocksource_init: clock get failed (-517)
lpc32xx_clockevent_init: clock get failed (-517)
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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Now the System stall is observed on TI AM437x based board (am437x-gp-evm)
during resuming from System suspend when ARM Global timer is selected as
clocksource device (CPUIdle not enabled) - SysRq are working, but nothing
else.
The reason of stall is that ARM Global timer loses its contexts during
System suspend:
GT_CONTROL.TIMER_ENABLE = 0 (unbanked)
GT_COUNTERx = 0
Hence, update ARM Global timer driver to reflect above behaviour
- re-enable ARM Global timer on resume (GT_CONTROL.TIMER_ENABLE = 1)
if not enabled.
CC: Arnd Bergmann <[email protected]>
Cc: John Stultz <[email protected]>
Cc: Felipe Balbi <[email protected]>
Cc: Tony Lindgren <[email protected]>
Cc: Marc Zyngier <[email protected]>
Reviewed-by: Santosh Shilimkar <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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Let's assume the counter value is 0xf0000000, the pistachio clocksource
read cycles function should return ~0x0fffffff but actually it returns
0xffffffff0fffffff.
That occurs because:
~(cycle_t)value is different from (cycle_t)~value.
unsigned long val = ~(unsigned long)0xf0000000;
40049a: 48 b8 ff ff ff 0f ff movabs $0xffffffff0fffffff,%rax
unsigned long val = (unsigned long)~0xf0000000;
40049a: 48 c7 45 f8 ff ff ff movq $0xfffffff,-0x8(%rbp)
We fix this issue by calculating bitwise-not counter, then cast to
cycle_t.
Signed-off-by: Jisheng Zhang <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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Use the relaxed version to improve performance. we measured time of
4096 rounds of gt_compare_set() spent on Marvell BG2Q:
before the patch: 3690648ns on average
after the patch: 1083023ns on average
improved by 70%!
Signed-off-by: Jisheng Zhang <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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It seems gcc can automatically inline apbt_writel() for us, but
apbt_real isn't inlined. This patch makes them inline to get a trivial
performance improvement: 4096 rounds of __apbt_read_clocksource() call
spend time on Marvell BG4CT platform:
before the patch 1275240ns on average
after the patch 1263240ns on average
so we get 1% performance improvement.
Signed-off-by: Jisheng Zhang <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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It's safe to use the relaxed version. From another side, the relaxed io
accessor macros are available on all architectures now, so we can use
the relaxed versions to get a trivial system performance improvement,
we measured time the following functions spent on Marvell BG4CT:
4096 rounds of __apbt_read_clocksource() call:
before the patch: 1263240ns on average
after the patch: 1250080ns on average
improved by 1%
4096 rounds of apbt_eoi() call:
before the patch: 1290960ns on average
after the patch: 1248240ns on average
4096 rounds of apbt_next_event() call:
before the patch: 3333660ns on average
after the patch: 1322040ns on average
improved by 60%!
Signed-off-by: Jisheng Zhang <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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On Marvell BG4CT platform, we observed the __apbt_read_clocksource()
return wrong value: Let's assume the APBTMR_N_CURRENT_VALUE value is
0xf0000000, we got 0xffffffff0fffffff, but it should be 0xfffffff.
This issue should be common on all 64bit platforms. We fix the issue
by letting aptb_readl() return u32. apbt_writel() is also updated
to write u32 val rather than unsigned long.
Signed-off-by: Jisheng Zhang <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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The current code to initialize, register and read the clocksource is
already factored out in mmio.c via the clocksource_mmio_init function.
Factor out the code with the clocksource_mmio_init function.
Signed-off-by: Daniel Lezcano <[email protected]>
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Add the COMPILE_TEST option so the drivers can be compiled on different
architecture with the 'allyesconfig' kernel configuration.
Signed-off-by: Daniel Lezcano <[email protected]>
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For the sake of consistency, let rename all ctrl_out/in calls to the write/read
calls so we have the same API consistent with the other architectures hence
open the door for the increasing of the test compilation coverage.
The unsigned long coercive cast is removed because all variables are set to
the right type "void __iomem *".
Signed-off-by: Daniel Lezcano <[email protected]>
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The current Kconfig option is the H8300 arch option. In order to comply to the
current rule, let's create a specific option for the timer8 and select it
from the arch's Kconfig.
Signed-off-by: Daniel Lezcano <[email protected]>
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The current code to initialize, register and read the clocksource is
already factored out in mmio.c via the clocksource_mmio_init function.
The only difference is the readl vs readl_relaxed.
Factor out the code with the clocksource_mmio_init function.
Signed-off-by: Daniel Lezcano <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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The lock in the timer16_clocksource_read is not needed, remove it.
Signed-off-by: Daniel Lezcano <[email protected]>
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The function irq_of_parse_and_map returns zero in case of failure.
Fix the return code test to check against zero.
Signed-off-by: Daniel Lezcano <[email protected]>
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The fields are not used in the code, remove them.
Signed-off-by: Daniel Lezcano <[email protected]>
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The macros are no longer used in the code, remove them.
Signed-off-by: Daniel Lezcano <[email protected]>
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The headers are not needed, remove them.
Signed-off-by: Daniel Lezcano <[email protected]>
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The current code retrieves the rate value when the timer is enabled which
occurs each time a timer is re-armed. Except if the clock frequency has changed
magically I don't see why this should be done each time.
Retrieve the clock rate value at init time only.
Signed-off-by: Daniel Lezcano <[email protected]>
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The time framawork takes care of disabling the interrupts and takes a lock
to prevent races.
Remove the legacy code in the driver taking care of the races.
Signed-off-by: Daniel Lezcano <[email protected]>
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The current code assumes the interrupt function is re-entrant.
That is not correct. An interrupt handler is never invoked concurrently. The
interrupt line is masked on all processors.
Remove the chewing flags in the code.
Signed-off-by: Daniel Lezcano <[email protected]>
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The value returned in case of error for the 'irq_of_parse_and_map' function is
zero in case of error. Fix the check in the init code.
Signed-off-by: Daniel Lezcano <[email protected]>
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Specify the delta as parameter for the timer8_clock_event_start function
instead of using a macro to tell PERIODIC or ONESHOT.
Signed-off-by: Daniel Lezcano <[email protected]>
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Signed-off-by: Daniel Lezcano <[email protected]>
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Signed-off-by: Daniel Lezcano <[email protected]>
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Signed-off-by: Daniel Lezcano <[email protected]>
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Some macros are unused, delete them.
Signed-off-by: Daniel Lezcano <[email protected]>
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The dev_warn is using the platform driver which was removed in the previous
patch.
Let's replace dev_warn by pr_warn.
Signed-off-by: Daniel Lezcano <[email protected]>
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Remove some legacy code and replace it by the clksrc-of code.
Do some cleanup and code consolidation.
Signed-off-by: Yoshinori Sato <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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Implement an ARM delay timer to be used for udelay(). This allows us to
skip the delay loop calibration at boot on Marvell BG2, BG2Q, BG2CD
platforms. And after this patch, udelay() will be unaffected by CPU
frequency changes.
Note: Although in case there are several possible delay timers, we may
not select the "best" delay timer. Take one Marvell Berlin platform for
example: we have arch timer and dw-apb timer. The arch timer freq is
25MHZ while the dw-apb timer freq is 100MHZ, current selection would
choose the dw-apb timer. But the dw apb timer is on the APB bus while
arch timer sits in CPU, the cost of accessing the apb timer is higher
than the arch timer. We could introduce "rating" concept to delay
timer, but this approach "brings a lot of complexity and workarounds
in the code for a small benefit" as pointed out by Daniel.
Later, Arnd pointed out "However, we could argue that this actually
doesn't matter at all, because the entire point of the ndelay()/
udelay()/mdelay() functions is to waste CPU cycles doing not much at
all, so we can just as well waste them reading the timer register
than spinning on the CPU reading the arch timer more often.", so we
just simply register the dw apb base delay timer.
Signed-off-by: Jisheng Zhang <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
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In order to compile on all arch without error with 'allyesconfig' make
sure the platform selected the GENERIC_CLOCKEVENTS. Without this patch
the new added drivers will prevent the kernel to compile on PARISC.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Signed-off-by: Daniel Lezcano <[email protected]>
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Let the platform's Kconfig to select the clock instead of having a reverse
dependency from the driver to the platform options.
Add the COMPILE_TEST option for the compilation test coverage. Due to the
non portable 'delay' code, this driver is only compilable on ARM.
Signed-off-by: Daniel Lezcano <[email protected]>
Tested-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Chanwoo Choi <[email protected]>
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Let the platform's Kconfig to select the clock instead of having a reverse
dependency from the driver to the platform options.
Add the COMPILE_TEST option for the compilation test coverage.
This change is debatable as the option itself in the Kconfig allows to
select the driver for the platform or not. This change will make the prcmu
timer always selected.
Signed-off-by: Daniel Lezcano <[email protected]>
Acked-by: Linus Walleij <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Due to the non portable code for the delay timer, this option is only
available for the ARM architecture.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
The driver depends on the common clock framework, thus the dependency added
on COMMON_CLK.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Signed-off-by: Daniel Lezcano <[email protected]>
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Remove the <asm/time.h> header inclusion which is pointless.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Due to the non portable code for the delay timer, this option is only
available for the ARM architecture.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
The driver depends on the common clock framework, thus the dependency added
on COMMON_CLK.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Signed-off-by: Daniel Lezcano <[email protected]>
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Increase the compilation test coverage by adding the COMPILE_TEST option.
Signed-off-by: Daniel Lezcano <[email protected]>
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