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2023-06-21clk: at91: clk-generated: add support for parent_hwClaudiu Beznea6-7/+15
Add support for parent_hw in generic clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-generated were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea <[email protected]> Reviewed-by: Maxime Ripard <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-21clk: at91: clk-main: add support for parent_data/parent_hwClaudiu Beznea14-37/+52
Add support for parent_data and parent_hw in main oscillator clock drivers. With this parent-child relations are described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-main were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea <[email protected]> Reviewed-by: Maxime Ripard <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-20clk: qcom: gcc-sc8280xp: Add runtime PMKonrad Dybcio1-2/+16
The GCC block on SC8280XP is powered by the CX rail. We need to ensure that it's enabled to prevent unwanted power collapse. Enable runtime PM to keep the power flowing only when necessary. Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-06-20clk: qcom: gpucc-sc8280xp: Add runtime PMKonrad Dybcio1-2/+17
The GPU_CC block on SC8280XP is powered by the GFX rail. We need to ensure that it's enabled to prevent unwanted power collapse. Enable runtime PM to keep the power flowing only when necessary. Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-06-20clk: Fix memory leak in devm_clk_notifier_register()Fei Shao1-0/+1
devm_clk_notifier_register() allocates a devres resource for clk notifier but didn't register that to the device, so the notifier didn't get unregistered on device detach and the allocated resource was leaked. Fix the issue by registering the resource through devres_add(). This issue was found with kmemleak on a Chromebook. Fixes: 6d30d50d037d ("clk: add devm variant of clk_notifier_register") Signed-off-by: Fei Shao <[email protected]> Link: https://lore.kernel.org/r/20230619112253.v2.1.I13f060c10549ef181603e921291bdea95f83033c@changeid Reviewed-by: Dan Carpenter <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-20clk: mvebu: Iterate over possible CPUs instead of DT CPU nodesRob Herring1-11/+3
Rework iterating over DT CPU nodes to iterate over possible CPUs instead. There's no need to walk the DT CPU nodes again. Possible CPUs is equal to the number of CPUs defined in the DT. Using the "reg" value for an array index is fragile as it assumes "reg" is 0-N which often is not the case. Signed-off-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-20clk: mvebu: Use of_get_cpu_hwid() to read CPU IDRob Herring1-8/+8
Use of_get_cpu_hwid() rather than the open coded reading of the CPU nodes "reg" property. The existing code is in fact wrong as the "reg" address cells size is 2 cells for arm64. The existing code happens to work because the DTS files are wrong as well. Signed-off-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-20clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flagsDmitry Baryshkov1-1/+1
Using PWRSTS_RET on msm8974's MDSS_GDSC causes display to stop working. The gdsc doesn't fully come out of retention mode. Change it's pwrsts flags to PWRSTS_OFF_ON. Fixes: d399723950c4 ("clk: qcom: gdsc: Fix the handling of PWRSTS_RET support") Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Rajendra Nayak <[email protected]> Tested-by: Luca Weiss <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-06-16clk: clocking-wizard: check return value of devm_kasprintf()Claudiu Beznea1-0/+5
devm_kasprintf() returns a pointer to dynamically allocated memory. Pointer could be NULL in case allocation fails. Check pointer validity. Identified with coccinelle (kmerr.cocci script). Fixes: 2046338dcbc6 ("ARM: mxs: Use soc bus infrastructure") Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: ti: clkctrl: check return value of kasprintf()Claudiu Beznea1-0/+7
kasprintf() returns a pointer to dynamically allocated memory. Pointer could be NULL in case allocation fails. Check pointer validity. Identified with coccinelle (kmerr.cocci script). Fixes: 852049594b9a ("clk: ti: clkctrl: convert subclocks to use proper names also") Fixes: 6c3090520554 ("clk: ti: clkctrl: Fix hidden dependency to node name") Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Tony Lindgren <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: keystone: sci-clk: check return value of kasprintf()Claudiu Beznea1-0/+2
kasprintf() returns a pointer to dynamically allocated memory. Pointer could be NULL in case allocation fails. Check pointer validity. Identified with coccinelle (kmerr.cocci script). Fixes: b745c0794e2f ("clk: keystone: Add sci-clk driver support") Depends-on: 96488c09b0f4 ("clk: keystone: sci-clk: cut down the clock name length") Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Tony Lindgren <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: si5341: free unused memory on probe failureClaudiu Beznea1-9/+7
Pointers from synth_clock_names[] should be freed at the end of probe either on probe success or failure path. Fixes: b7bbf6ec4940 ("clk: si5341: Allow different output VDD_SEL values") Fixes: 9b13ff4340df ("clk: si5341: Add sysfs properties to allow checking/resetting device faults") Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: si5341: check return value of {devm_}kasprintf()Claudiu Beznea1-0/+8
{devm_}kasprintf() returns a pointer to dynamically allocated memory. Pointer could be NULL in case allocation fails. Check pointer validity. Identified with coccinelle (kmerr.cocci script). Fixes: 3044a860fd09 ("clk: Add Si5341/Si5340 driver") Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: si5341: return error if one synth clock registration failsClaudiu Beznea1-6/+8
In case devm_clk_hw_register() fails for one of synth clocks the probe continues. Later on, when registering output clocks which have as parents all the synth clocks, in case there is registration failure for at least one synth clock the information passed to clk core for registering output clock is not right: init.num_parents is fixed but init.parents may contain an array with less parents. Fixes: 3044a860fd09 ("clk: Add Si5341/Si5340 driver") Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: cdce925: check return value of kasprintf()Claudiu Beznea1-0/+12
kasprintf() returns a pointer to dynamically allocated memory. Pointer could be NULL in case allocation fails. Check pointer validity. Identified with coccinelle (kmerr.cocci script). Fixes: 19fbbbbcd3a3 ("Add TI CDCE925 I2C controlled clock synthesizer driver") Depends-on: e665f029a283 ("clk: Convert to using %pOFn instead of device_node.name") Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: vc5: check memory returned by kasprintf()Claudiu Beznea1-0/+29
kasprintf() returns a pointer to dynamically allocated memory. Pointer could be NULL in case allocation fails. Check pointer validity. Identified with coccinelle (kmerr.cocci script). Fixes: f491276a5168 ("clk: vc5: Allow Versaclock driver to support multiple instances") Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Luca Ceresoli <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: mediatek: clk-mt8173-apmixedsys: Fix iomap not released issueAngeloGioacchino Del Regno1-1/+4
In case of error after of_ioremap() the resource must be released: call iounmap() where appropriate to fix that. Fixes: 41138fbf876c ("clk: mediatek: mt8173: Migrate to platform driver and common probe") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: mediatek: clk-mt8173-apmixedsys: Fix return value for of_iomap() errorAngeloGioacchino Del Regno1-1/+1
The of_iomap() function returns NULL in case of error so usage of PTR_ERR() is wrong! Change that to return -ENOMEM in case of failure. Fixes: 41138fbf876c ("clk: mediatek: mt8173: Migrate to platform driver and common probe") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Chen-Yu Tsai <[email protected]> Reviewed-by: Markus Schneider-Pargmann <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: mediatek: clk-mtk: Grab iomem pointer for divider clocksAngeloGioacchino Del Regno1-3/+3
In the rare case in which one of the clock drivers has divider clocks but not composite clocks, mtk_clk_simple_probe() would not io(re)map, hence passing a NULL pointer to mtk_clk_register_dividers(). To fix this issue, extend the `if` conditional to also check if any divider clocks are present. While at it, also make sure the iomem pointer is NULL if no composite/divider clocks are declared, as we are checking for that when iounmapping it in the error path. This hasn't been seen on any MediaTek clock driver as the current ones always declare composite clocks along with divider clocks, but this is still an important fix for a future potential KP. Fixes: 1fe074b1f112 ("clk: mediatek: Add divider clocks to mtk_clk_simple_{probe,remove}()") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Chen-Yu Tsai <[email protected]> Reviewed-by: Markus Schneider-Pargmann <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: keystone: syscon-clk: Add support for audio refclkJai Luthra1-5/+40
TI's AM62 SoC can optionally provide two audio reference clocks (AUDIO_REFCLKx) to external peripherals. By default this reference clock is looped-back inside the SoC to a mux that goes to McASP AHCLK, but can optionally be enabled as an output to peripherals outside the SoC by setting a bit through CTRL_MMR registers. This bit only controls the direction of the clock, while the parent is a muxed input from sci-clk [1] which may be a configurable PLL or a master clock from one of the McASP instances. Link: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am62x/clocks.html#clocks-for-board0-device [1] Signed-off-by: Jai Luthra <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-16clk: keystone: syscon-clk: Allow the clock node to not be of type sysconAndrew Davis1-2/+2
There is a helper device_node_to_regmap() we can use that does not force this clock DT node to be a "syscon" node. It should work the same in this case but allow us to remove the unneeded "syscon" compatible. Signed-off-by: Andrew Davis <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-15clk: meson: pll: remove unneeded semicolonJiapeng Chong1-1/+1
No functional modification involved. ./drivers/clk/meson/clk-pll.c:373:2-3: Unneeded semicolon. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Reviewed-by: Martin Blumenstingl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Fixes: b6ec400aa153 ("clk: meson: introduce new pll power-on sequence for A1 SoC family") Signed-off-by: Jerome Brunet <[email protected]>
2023-06-14clk: mvebu: Use of_address_to_resource()Rob Herring1-5/+3
Replace of_get_property() and of_translate_address() calls with a single call to of_address_to_resource(). Signed-off-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-14clk: tegra: tegra124-emc: Fix potential memory leakYuan Can1-0/+2
The tegra and tegra needs to be freed in the error handling path, otherwise it will be leaked. Fixes: 2db04f16b589 ("clk: tegra: Add EMC clock driver") Signed-off-by: Yuan Can <[email protected]> Link: https://lore.kernel.org/r/[email protected] Acked-by: Thierry Reding <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-14clk: clocking-wizard: Fix Oops in clk_wzrd_register_divider()Dan Carpenter1-1/+1
Smatch detected this potential error pointer dereference clk_wzrd_register_divider(). If devm_clk_hw_register() fails then it sets "hw" to an error pointer and then dereferences it on the next line. Return the error directly instead. Fixes: 5a853722eb32 ("staging: clocking-wizard: Add support for dynamic reconfiguration") Signed-off-by: Dan Carpenter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Michal Simek <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-14clk: pxa: fix NULL pointer dereference in pxa3xx_clk_update_accrArnd Bergmann1-1/+1
sparse points out an embarrasing bug in an older patch of mine, which uses the register offset instead of an __iomem pointer: drivers/clk/pxa/clk-pxa3xx.c:167:9: sparse: sparse: Using plain integer as NULL pointer Unlike sparse, gcc and clang ignore this bug and fail to warn because a literal '0' is considered a valid representation of a NULL pointer. Fixes: 3c816d950a49 ("ARM: pxa: move clk register definitions to driver") Cc: [email protected] Reported-by: kernel test robot <[email protected]> Link: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Arnd Bergmann <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-14clk: bcm: rpi: Fix off by one in raspberrypi_discover_clocks()Dan Carpenter1-2/+2
Smatch detected an off by one in this code: drivers/clk/bcm/clk-raspberrypi.c:374 raspberrypi_discover_clocks() error: buffer overflow 'data->hws' 16 <= 16 The data->hws[] array has RPI_FIRMWARE_NUM_CLK_ID elements so the > comparison needs to changed to >=. Fixes: 12c90f3f27bb ("clk: bcm: rpi: Add variant structure") Signed-off-by: Dan Carpenter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Stefan Wahren <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-14clk: sifive: Use devm_platform_ioremap_resource()Yang Li1-3/+1
Convert platform_get_resource(),devm_ioremap_resource() to a single call to devm_platform_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-14clk: sprd: composite: Simplify determine_rate implementationStephen Boyd3-25/+3
The sprd_div_helper_round_rate() function calls divider_round_rate() which calls divider_round_rate_parent() which calls divider_determine_rate(). This call chain converts back and forth from the rate request structure to make a determine_rate clk_op fit with a round_rate clk_op. Simplify the code here by directly calling divider_determine_rate() instead. This fixes a smatch warning where an unsigned long is compared to less than zero, which is impossible. This makes sprd_div_helper_round_rate() unnecessary as well so simply remove it and fold it into the only caller left. Reported-by: Harshit Mogalapalli <[email protected]> Closes: https://lore.kernel.org/r/[email protected] Cc: Maxime Ripard <[email protected]> Fixes: 302d2f836d78 ("clk: sprd: composite: Switch to determine_rate") Signed-off-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Maxime Ripard <[email protected]>
2023-06-13clk: qcom: gpucc-sm6375: Enable runtime pmKonrad Dybcio1-2/+17
The GPUCC block on SM6375 is powered by VDD_CX and VDD_GX. If the latter rail is not online, GX_GDSC will never turn on. Enable runtime pm so that we can reference VDD_GX from the dt to ensure that. Signed-off-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-13clk: qcom: gcc-sm6115: Add missing PLL config propertiesKonrad Dybcio1-0/+8
When the driver was ported upstream, PLL ctl register values were omitted. Add them to ensure the PLLs are fully configured like we expect them to. Fixes: cbe63bfdc54f ("clk: qcom: Add Global Clock controller (GCC) driver for SM6115") Signed-off-by: Konrad Dybcio <[email protected]> Reviewed-by: Iskren Chernev <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-13clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)Konrad Dybcio2-4/+17
The "vanilla" Alpha PLL configs are sometimes provided with an intention to only update certain bits of th register. Do so if a mask is found. Signed-off-by: Konrad Dybcio <[email protected]> Reviewed-by: Iskren Chernev <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-13clk: qcom: gcc-ipq6018: remove duplicate initializersArnd Bergmann1-2/+0
A recent change added new initializers for .config_ctl_val and .config_ctl_hi_val but left the old values in place: drivers/clk/qcom/gcc-ipq6018.c:4155:27: error: initialized field overwritten [-Werror=override-init] 4155 | .config_ctl_val = 0x240d4828, | ^~~~~~~~~~ drivers/clk/qcom/gcc-ipq6018.c:4156:30: error: initialized field overwritten [-Werror=override-init] 4156 | .config_ctl_hi_val = 0x6, | ^~~ Remove the unused ones now to avoid confusion. Fixes: f4f0c8acee0e4 ("clk: qcom: gcc-ipq6018: update UBI32 PLL") Signed-off-by: Arnd Bergmann <[email protected]> Reviewed-by: Robert Marko <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-13clk: qcom: gcc-ipq9574: Enable crypto clocksAnusha Rao1-0/+72
Enable the clocks required for crypto operation. Reviewed-by: Bhupesh Sharma <[email protected]> Signed-off-by: Anusha Rao <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-13clk: Fix best_parent_rate after moving code into a separate functionMarek Szyprowski1-0/+1
best_parent_rate entry is still being used in the code and needs to be always updated regardless of the CLK_SET_RATE_NO_REPARENT flag. Fixes: 1b4e99fda73f ("clk: Move no reparent case into a separate function") Signed-off-by: Marek Szyprowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Acked-by: Maxime Ripard <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-13clk: qcom: Add lpass audio clock controller driver for SC8280XPSrinivas Kandagatla1-0/+23
Add support for the lpass audio clock controller found on SC8280XP based devices. This would allow lpass peripheral loader drivers to control the clocks and bring the subsystems out of reset. Currently this patch only supports resets as the Q6DSP is in control of LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg channel. Signed-off-by: Srinivas Kandagatla <[email protected]> Reviewed-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-13clk: qcom: Add lpass clock controller driver for SC8280XPSrinivas Kandagatla3-0/+74
Add support for the lpass clock controller found on SC8280XP based devices. This would allow lpass peripheral loader drivers to control the clocks and bring the subsystems out of reset. Currently this patch only supports resets as the Q6DSP is in control of LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg channel. Signed-off-by: Srinivas Kandagatla <[email protected]> Reviewed-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-12clk: clk-loongson2: Zero init clk_init_dataBinbin Zhou1-1/+1
As clk_core_populate_parent_map() checks clk_init_data.num_parents first, and checks clk_init_data.parent_names[] before clk_init_data.parent_data[] and clk_init_data.parent_hws[]. Therefore the clk_init_data structure needs to be explicitly initialised to prevent an unexpected crash if clk_init_data.parent_names[] is a random value. CPU 0 Unable to handle kernel paging request at virtual address 0000000000000dc0, era == 9000000002986290, ra == 900000000298624c Oops[#1]: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.4.0-rc2+ #4582 pc 9000000002986290 ra 900000000298624c tp 9000000100094000 sp 9000000100097a60 a0 9000000104541e00 a1 0000000000000000 a2 0000000000000dc0 a3 0000000000000001 a4 90000001000979f0 a5 90000001800977d7 a6 0000000000000000 a7 900000000362a000 t0 90000000034f3548 t1 6f8c2a9cb5ab5f64 t2 0000000000011340 t3 90000000031cf5b0 t4 0000000000000dc0 t5 0000000000000004 t6 0000000000011300 t7 9000000104541e40 t8 000000000005a4f8 u0 9000000104541e00 s9 9000000104541e00 s0 9000000104bc4700 s1 9000000104541da8 s2 0000000000000001 s3 900000000356f9d8 s4 ffffffffffffffff s5 0000000000000000 s6 0000000000000dc0 s7 90000000030d0a88 s8 0000000000000000 ra: 900000000298624c __clk_register+0x228/0x84c ERA: 9000000002986290 __clk_register+0x26c/0x84c CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE) PRMD: 00000004 (PPLV0 +PIE -PWE) EUEN: 00000000 (-FPE -SXE -ASXE -BTE) ECFG: 00071c1c (LIE=2-4,10-12 VS=7) ESTAT: 00010000 [PIL] (IS= ECode=1 EsubCode=0) BADV: 0000000000000dc0 PRID: 0014a000 (Loongson-64bit, ) Modules linked in: Process swapper/0 (pid: 1, threadinfo=(____ptrval____), task=(____ptrval____)) Stack : 90000000031c1810 90000000030d0a88 900000000325bac0 90000000034f3548 90000001002ab410 9000000104541e00 0000000000000dc0 9000000003150098 90000000031c1810 90000000031a0460 900000000362a000 90000001002ab410 900000000362a000 9000000104541da8 9000000104541de8 90000001002ab410 900000000362a000 9000000002986a68 90000000034f3ed8 90000000030d0aa8 9000000104541da8 900000000298d3b8 90000000031c1810 0000000000000000 90000000034f3ed8 90000000030d0aa8 0000000000000dc0 90000000030d0a88 90000001002ab410 900000000298d401 0000000000000000 6f8c2a9cb5ab5f64 90000000034f4000 90000000030d0a88 9000000003a48a58 90000001002ab410 9000000104bd81a8 900000000298d484 9000000100020260 0000000000000000 ... Call Trace: [<9000000002986290>] __clk_register+0x26c/0x84c [<9000000002986a68>] devm_clk_hw_register+0x5c/0xe0 [<900000000298d3b8>] loongson2_clk_register.constprop.0+0xdc/0x10c [<900000000298d484>] loongson2_clk_probe+0x9c/0x4ac [<9000000002a4eba4>] platform_probe+0x68/0xc8 [<9000000002a4bf80>] really_probe+0xbc/0x2f0 [<9000000002a4c23c>] __driver_probe_device+0x88/0x128 [<9000000002a4c318>] driver_probe_device+0x3c/0x11c [<9000000002a4c5dc>] __driver_attach+0x98/0x18c [<9000000002a49ca0>] bus_for_each_dev+0x80/0xe0 [<9000000002a4b0dc>] bus_add_driver+0xfc/0x1ec [<9000000002a4d4a8>] driver_register+0x68/0x134 [<90000000020f0110>] do_one_initcall+0x50/0x188 [<9000000003150f00>] kernel_init_freeable+0x224/0x294 [<90000000030240fc>] kernel_init+0x20/0x110 [<90000000020f1568>] ret_from_kernel_thread+0xc/0xa4 Fixes: acc0ccffec50 ("clk: clk-loongson2: add clock controller driver support") Cc: [email protected] Cc: Yinbo Zhu <[email protected]> Signed-off-by: Binbin Zhou <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: mediatek: fix of_iomap memory leakBosi Zhang1-2/+5
Smatch reports: drivers/clk/mediatek/clk-mtk.c:583 mtk_clk_simple_probe() warn: 'base' from of_iomap() not released on lines: 496. This problem was also found in linux-next. In mtk_clk_simple_probe(), base is not released when handling errors if clk_data is not existed, which may cause a leak. So free_base should be added here to release base. Fixes: c58cd0e40ffa ("clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers") Signed-off-by: Bosi Zhang <[email protected]> Reviewed-by: Dongliang Mu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: mediatek: reset: add infra_ao reset support for MT8188Runyang Chen1-0/+24
The infra_ao reset is needed for MT8188. - Add mtk_clk_rst_desc for MT8188. - Add register reset controller function for MT8188 infra_ao. - Add infra_ao_idx_map for MT8188. Signed-off-by: Runyang Chen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: mediatek: Remove CLK_SET_PARENT from all MSDC core clocksAngeloGioacchino Del Regno11-92/+93
Various MSDC core clocks, used for multiple MSDC controller instances, share the same parent(s): in order to add parents selection in the mtk-sd driver to achieve an accurate clock rate for all modes, remove the CLK_SET_RATE_PARENT flag from all MSDC clocks for all SoCs: this will make sure that a clk_set_rate() call performed for a clock on a secondary controller will not change the rate of a common parent, which would result in an overclock or underclock of one of the controllers. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Reviewed-by: Matthias Brugger <[email protected]> Reviewed-by: Markus Schneider-Pargmann <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Alexandre Mergnat <[email protected]> Reviewed-by: Alexandre Mergnat <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: mediatek: mux: Stop forcing CLK_SET_RATE_PARENT flagAngeloGioacchino Del Regno9-40/+62
The clk-mux driver was forcing the CLK_SET_RATE_PARENT flag even for the GATE_CLK_SET_UPD_FLAGS() macro, as in mtk_clk_register_mux() the flag was unconditionally added. In preparation for a change on MSDC clock muxes, stop forcing this flag and, where necessary, update clock drivers to add it so that with this commit we introduce no functional changes for the currently supported SoCs. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Reviewed-by: Matthias Brugger <[email protected]> Reviewed-by: Markus Schneider-Pargmann <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Alexandre Mergnat <[email protected]> Reviewed-by: Alexandre Mergnat <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: si521xx: Switch i2c driver back to use .probe()Uwe Kleine-König1-1/+1
After commit b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then 03c835f498b5 ("i2c: Switch .probe() to not take an id parameter") convert back to (the new) .probe() to be able to eventually drop .probe_new() from struct i2c_driver. Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: mediatek: mt8365: Fix inverted topclk operationsMarkus Schneider-Pargmann1-3/+3
The given operations are inverted for the wrong registers which makes multiple of the mt8365 hardware units unusable. In my setup at least usb did not work. Fixed by swapping the operations with the inverted ones. Reported-by: Alexandre Mergnat <[email protected]> Fixes: 905b7430d3cc ("clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocks") Signed-off-by: Markus Schneider-Pargmann <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Alexandre Mergnat <[email protected]> Reviewed-by: Alexandre Mergnat <[email protected]> Reviewed-by: Matthias Brugger <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: composite: Fix handling of high clock ratesSebastian Reichel1-1/+4
ULONG_MAX is used by a few drivers to figure out the highest available clock rate via clk_round_rate(clk, ULONG_MAX). Since abs() takes a signed value as input, the current logic effectively calculates with ULONG_MAX = -1, which results in the worst parent clock being chosen instead of the best one. For example on Rockchip RK3588 the eMMC driver tries to figure out the highest available clock rate. There are three parent clocks available resulting in the following rate diffs with the existing logic: GPLL: abs(18446744073709551615 - 1188000000) = 1188000001 CPLL: abs(18446744073709551615 - 1500000000) = 1500000001 XIN24M: abs(18446744073709551615 - 24000000) = 24000001 As a result the clock framework will promote a maximum supported clock rate of 24 MHz, even though 1.5GHz are possible. With the updated logic any casting between signed and unsigned is avoided and the numbers look like this instead: GPLL: 18446744073709551615 - 1188000000 = 18446744072521551615 CPLL: 18446744073709551615 - 1500000000 = 18446744072209551615 XIN24M: 18446744073709551615 - 24000000 = 18446744073685551615 As a result the parent with the highest acceptable rate is chosen instead of the parent clock with the lowest one. Cc: [email protected] Fixes: 49502408007b ("mmc: sdhci-of-dwcmshc: properly determine max clock on Rockchip") Tested-by: Christopher Obbard <[email protected]> Signed-off-by: Sebastian Reichel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: meson: a1: Staticize rtc clkStephen Boyd1-1/+1
Sparse rightly complains that this symbol is supposed to be static. Cc: Jian Hu <[email protected]> Cc: Dmitry Rokosov <[email protected]> Cc: Martin Blumenstingl <[email protected]> Cc: Jerome Brunet <[email protected]> Fixes: 84af914404db ("clk: meson: a1: add Amlogic A1 Peripherals clock controller driver") Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Jerome Brunet <[email protected]> Reviewed-by: Martin Blumenstingl <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: mediatek: mt8365: Fix index issueAlexandre Mergnat1-0/+12
Before the patch [1], the clock probe was done directly in the clk-mt8365 driver. In this probe function, the array which stores the data clocks is sized using the higher defined numbers (*_NR_CLOCK) in the clock lists [2]. Currently, with the patch [1], the specific clk-mt8365 probe function is replaced by the mtk generic one [3], which size the clock data array by adding all the clock descriptor array size provided by the clk-mt8365 driver. Actually, all clock indexes come from the header file [2], that mean, if there are more clock (then more index) in the header file [2] than the number of clock declared in the clock descriptor arrays (which is the case currently), the clock data array will be undersized and then the generic probe function will overflow when it will try to write in "clk_data[CLK_INDEX]". Actually, instead of crashing at boot, the probe function returns an error in the log which looks like: "of_clk_hw_onecell_get: invalid index 135", then this clock isn't enabled. Solve this issue by adding in the driver the missing clocks declared in the header clock file [2]. [1]: Commit ffe91cb28f6a ("clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}()") [2]: include/dt-bindings/clock/mediatek,mt8365-clk.h [3]: drivers/clk/mediatek/clk-mtk.c Fixes: ffe91cb28f6a ("clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}()") Signed-off-by: Alexandre Mergnat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Markus Schneider-Pargmann <[email protected]> Reviewed-by: Markus Schneider-Pargmann <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2023-06-12clk: samsung: add CONFIG_OF dependencyArnd Bergmann1-0/+1
When CONFIG_OF is disabled, build testing on x86 runs into a couple of objtool warnings from functions that unconditionally call panic() but have no __noreturn annotation: vmlinux.o: warning: objtool: exynos3250_cmu_isp_probe+0x17: samsung_cmu_register_one() is missing a __noreturn annotation vmlinux.o: warning: objtool: exynos7885_cmu_probe+0x16: exynos_arm64_register_cmu() is missing a __noreturn annotation vmlinux.o: warning: objtool: exynos850_cmu_probe+0x16: exynos_arm64_register_cmu() is missing a __noreturn annotation vmlinux.o: warning: objtool: exynosautov9_cmu_probe+0x16: exynos_arm64_register_cmu() is missing a __noreturn annotation The objtool analysis is correct, and this could be addressed by just returning success whenever CONFIG_OF is disabled to let all that code be eliminated, but since the driver is no use without CONFIG_OF, just add that as a dependency. It will still get compile tested on all architectures since CONFIG_OF is enabled in allmodconfig and most randconfig builds. Cc: Josh Poimboeuf <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2023-06-12clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe()Yuxing Liu1-11/+13
Replace of_iomap() and kzalloc() with devm_of_iomap() and devm_kzalloc() which can automatically release the related memory when the device or driver is removed or unloaded to avoid potential memory leak. In this case, iounmap(anatop_base) in line 427,433 are removed as manual release is not required. Besides, referring to clk-imx8mq.c, check the return code of of_clk_add_hw_provider, if it returns negtive, print error info and unregister hws, which makes the program more robust. Fixes: 9c140d992676 ("clk: imx: Add support for i.MX8MP clock driver") Signed-off-by: Yuxing Liu <[email protected]> Reviewed-by: Dongliang Mu <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Abel Vesa <[email protected]>
2023-06-12clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probeZhanhao Hu1-7/+8
In function probe(), it returns directly without unregistered hws when error occurs. Fix this by adding 'goto unregister_hws;' on line 295 and line 310. Use devm_kzalloc() instead of kzalloc() to automatically free the memory using devm_kfree() when error occurs. Replace of_iomap() with devm_of_iomap() to automatically handle the unused ioremap region and delete 'iounmap(anatop_base);' in unregister_hws. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Signed-off-by: Zhanhao Hu <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Abel Vesa <[email protected]>
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