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Add common library code for the Analog Bits Wide-Range PLL (WRPLL) IP
block, as implemented in TSMC CLN28HPC.
There is no bus interface or register target associated with this PLL.
This library is intended to be used by drivers for IP blocks that
expose registers connected to the PLL configuration and status
signals.
Based on code originally written by Wesley Terpstra
<[email protected]>:
https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60
This version incorporates several changes requested by Stephen
Boyd <[email protected]>.
Signed-off-by: Paul Walmsley <[email protected]>
Signed-off-by: Paul Walmsley <[email protected]>
Cc: Wesley Terpstra <[email protected]>
Cc: Palmer Dabbelt <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Megan Wachs <[email protected]>
Cc: [email protected]
Cc: [email protected]
[[email protected]: Fix some const issues]
Signed-off-by: Stephen Boyd <[email protected]>
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