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2024-05-01ARM: dts: aspeed: harma: correct Mellanox multi-host propertyKrzysztof Kozlowski1-1/+1
"mlx,multi-host" is using incorrect vendor prefix and is not documented. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: yosemitev2: correct Mellanox multi-host propertyKrzysztof Kozlowski1-1/+1
"mlx,multi-host" is using incorrect vendor prefix and is not documented. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: yosemite4: correct Mellanox multi-host propertyKrzysztof Kozlowski1-2/+2
"mlx,multi-host" is using incorrect vendor prefix and is not documented. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: greatlakes: correct Mellanox multi-host propertyKrzysztof Kozlowski1-1/+1
"mlx,multi-host" is using incorrect vendor prefix and is not documented. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Modify I2C bus configurationRenze Nicolai1-0/+7
Enable I2C bus 8 which is exposed on the IPMB_1 connector on the X570D4U mainboard. Additionally adds a descriptive comment to I2C busses 1 and 5. Signed-off-by: Renze Nicolai <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Disable unused ADC channels for Asrock X570D4U BMCRenze Nicolai1-16/+13
Additionally adds labels describing the ADC channels. Signed-off-by: Renze Nicolai <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Modify GPIO table for Asrock X570D4U BMCRenze Nicolai1-58/+37
Restructure GPIO table to fit maximum line length. Fix mistakes found while working on OpenBMC userland configuration and based on probing the board. Schematic for this board is not available. Because of this the choice was made to use a descriptive method for naming the GPIOs. - Push-pull outputs start with output-* - Open-drain outputs start with control-* - LED outputs start with led-* - Inputs start with input-* - Button inputs start with button-* - Active low signals end with *-n Signed-off-by: Renze Nicolai <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: yosemite4: set bus13 frequency to 100kDelphine CC Chiu1-1/+1
Since the ocp debug card only supports 100k, the bus is also set to 100k. Signed-off-by: Delphine CC Chiu <[email protected]> [AJ: Fixed fuzz due to prior IPMB patch] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: Aspeed: Bonnell: Fix NVMe LED labelsEddie James1-4/+4
The PCA chip for the NVMe LEDs is wired up backwards, so correct the device tree labels. Signed-off-by: Eddie James <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: yosemite4: Enable ipmb device for OCP debug cardDelphine CC Chiu1-0/+7
Add OCP debug card devicetree config Signed-off-by: Delphine CC Chiu <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: ahe50dc: Update lm25066 regulator nameZev Weiss1-1/+1
A recent change to the lm25066 driver changed the name of its regulator from vout0 to vout; device-tree users of lm25066's regulator functionality (of which ahe50dc is the only one) thus require a corresponding update. Signed-off-by: Zev Weiss <[email protected]> Cc: Conor Dooley <[email protected]> Cc: Guenter Roeck <[email protected]> Acked-by: Guenter Roeck <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Add vendor prefixes to lm25066 compat stringsZev Weiss2-3/+3
Due to the way i2c driver matching works (falling back to the driver's id_table if of_match_table fails) this didn't actually cause any misbehavior, but let's add the vendor prefixes so things actually work the way they were intended to. Signed-off-by: Zev Weiss <[email protected]> Reviewed-by: Conor Dooley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROMZev Weiss2-0/+18
Like the more recently added ASRock BMC platforms, e3c246d4i and romed8hm3 also have the BMC's MAC address available in the baseboard FRU EEPROM, so let's add support for using it. Signed-off-by: Zev Weiss <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: system1: IBM System1 BMC boardAndrew Geissler2-0/+1624
Added a device tree for IBM system1 BMC board, which uses AST2600 SoC. Signed-off-by: Andrew Geissler <[email protected]> Signed-off-by: Ninad Palsule <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: FSI interrupt supportEddie James2-0/+6
Enable FSI interrupt controllers for AST2600 and P10BMC hub master. Signed-off-by: Eddie James <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Modify GPIO line namePeter Yin1-9/+29
Add: "reset-cause-platrst", "cpu0-err-alert", "leakage-detect-alert", "presence-post-card", "ac-power-button", "P0_I3C_APML_ALERT_L", "irq-uv-detect-alert", "irq-hsc-alert", "cpu0-prochot-alert", "cpu0-thermtrip-alert", "reset-cause-pcie", "pvdd11-ocp-alert" Rename: "power-cpu-good" to "host0-ready", "host-ready-n" to "post-end-n Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Add retimer devicePeter Yin1-0/+8
Add pt5161l device in i2c bus12 and bus21. Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Revise node namePeter Yin1-3/+3
Revise max31790 and delta_brick node name. Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Add ltc4286 devicePeter Yin1-0/+7
Add ltc4286 device. Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Add NIC Fru devicePeter Yin1-0/+6
Add MB NIC Device Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Revise max31790 addressPeter Yin1-4/+4
Revise max31790 address from 0x30 to 0x5e Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Add PDB temperaturePeter Yin1-1/+6
Add PDB temperature sensor. Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Add spi-gpioPeter Yin1-0/+21
Add spi-gpio for tpm device. Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Add cpu power good line namePeter Yin1-1/+1
Add a line name for cpu power good. Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Remove VuartPeter Yin1-4/+0
Remove vuart to avoid port conflict with uart2 Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: mapping ttyS2 to UART4.Peter Yin1-2/+2
Change routing to match SOL(Serial Over LAN) settings. Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Revise SGPIO line name.Peter Yin1-2/+2
The same name as reset-control-smb-e1s change to reset-control-smb-e1s-0 and reset-control-smb-e1s-0. Signed-off-by: Peter Yin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: add sgpio line nameYang Chen1-0/+149
Add the SGPIO line name that the project's function can use by the meaningful name. Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: add gpio line nameYang Chen1-0/+30
Add the GPIO line name that the project's function can use by the meaningful name. Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: Add led-fan-fault gpioYang Chen1-0/+17
Add led-fan-fault gpio pin on the PCA9555 on the i2c bus 0. Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: add fan rpm controllerYang Chen1-0/+42
Add fan rpm controller max31790 on all bus of FCB. Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: add bus labels and aliasesYang Chen1-6/+16
Add bus labels and aliases for the fan control board. Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: correct the address of eepromYang Chen1-2/+2
Correct the address from 0x51 to 0x54 of eeprom on the i2c bus 1 Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: Add temperature sensorYang Chen1-1/+6
Add one temperature sensor on i2c bus 1 Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: Enable power monitor deviceYang Chen1-0/+22
Enable power monitor device ina230 and ltc2945 on the i2c bus 0 Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: Change sgpio useYang Chen1-1/+1
Correct the sgpio use from sgpiom1 to sgpiom0 Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: Modify mac3 settingYang Chen1-2/+5
Remove the unuse setting and fix the link to 100 M Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: minerva: Revise the name of DTSYang Chen2-2/+2
The project Minerva which is the platform used by Meta has two boards: the Chassis Management Module (Minerva) and the Motherboard (Harma), so change the DTS name to minerva here for CMM use. Signed-off-by: Yang Chen <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Harma: Add Meta Harma (AST2600) BMCPeter Yin2-0/+586
Add linux device tree entry related to the Meta(Facebook) computer-node system use an AT2600 BMC. This node is named "Harma". Signed-off-by: Peter Yin <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: asrock: Add ASRock X570D4U BMCRenze Nicolai2-0/+378
This is a relatively low-cost AST2500-based Amd Ryzen 5000 Series micro-ATX board that we hope can provide a decent platform for OpenBMC development. This initial device-tree provides the necessary configuration for basic BMC functionality such as serial console, KVM support and POST code snooping. Signed-off-by: Renze Nicolai <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-05-01ARM: dts: aspeed: Add ASRock SPC621D8HM3 BMCZev Weiss2-0/+325
This is a Xeon board broadly similar (aside from CPU vendor) to the already-support romed8hm3 (half-width, single-socket, ast2500). It doesn't require anything terribly special for OpenBMC support, so this device-tree should provide everything necessary for basic functionality with it. Signed-off-by: Zev Weiss <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]>
2024-04-30riscv: dts: starfive: add Milkv Mars board device treeJisheng Zhang2-0/+31
The Milkv Mars is a development board based on the Starfive JH7110 SoC. The board features: - JH7110 SoC - 1/2/4/8 GiB LPDDR4 DRAM - AXP15060 PMIC - 40 pin GPIO header - 3x USB 3.0 host port - 1x USB 2.0 host port - 1x M.2 E-Key - 1x eMMC slot - 1x MicroSD slot - 1x QSPI Flash - 1x 1Gbps Ethernet port - 1x HDMI port - 1x 2-lane DSI and 1x 4-lane DSI - 1x 2-lane CSI Add the devicetree file describing the currently supported features, namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet. Signed-off-by: Jisheng Zhang <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2024-04-30riscv: dts: starfive: introduce a common board dtsi for jh7110 based boardsJisheng Zhang2-584/+600
This is to prepare for Milkv Mars board dts support in the following patch. Let's factored out common part into .dtsi. Signed-off-by: Jisheng Zhang <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2024-04-30riscv: dts: starfive: visionfive 2: add "disable-wp" for tfcardJisheng Zhang1-0/+1
No physical write-protect line is present, so setting "disable-wp". Signed-off-by: Jisheng Zhang <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2024-04-30riscv: dts: starfive: visionfive 2: add tf cd-gpiosJisheng Zhang1-1/+1
Per VisionFive 2 1.2B, and 1.3A boards' SCH, GPIO 41 is used as card detect. So add "cd-gpios" property for this. Signed-off-by: Jisheng Zhang <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2024-04-30riscv: dts: starfive: visionfive 2: use cpus label for timebase freqJisheng Zhang1-4/+4
As pointed out by Krzysztof "Board should not bring new CPU nodes. Override by label instead." Suggested-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Jisheng Zhang <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2024-04-30riscv: dts: starfive: visionfive 2: update sound and codec dt node nameJisheng Zhang1-2/+2
Use "audio-codec" as the codec dt node name, and "sound" as the simple audio card dt name. Suggested-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Jisheng Zhang <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2024-04-30riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsiJisheng Zhang2-2/+2
Add the 'cpus' label so that we can reference it in board dts files. Signed-off-by: Jisheng Zhang <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2024-04-30ACPI: Move acpi_blacklisted() declaration to asm/acpi.hKuppuswamy Sathyanarayanan1-0/+2
The function acpi_blacklisted() is defined only when CONFIG_X86 is enabled and is only used by X86 arch code. To align with its usage and definition conditions, move its declaration to asm/acpi.h Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> [ rjw: Added empty code line in a header file ] Signed-off-by: Rafael J. Wysocki <[email protected]>
2024-04-30arm64: dts: exynos: gs101: enable ufs, phy on oriole & define ufs regulatorPeter Griffin1-0/+18
Enable ufs & ufs phy nodes for Oriole. Also define the ufs regulator node. ufs regulator is a stub until full s2mpg11 slave pmic support is added. The gpio defined is for the BOOTLD0 (gs101) signal connected to UFS_EN(s2mpg11) gpio enabled voltage rail for UFS. Signed-off-by: Peter Griffin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
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