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2024-08-07s390/cpum_sf: Use refcount_t instead of atomic_tThomas Richter1-17/+12
Replace atomic_t by refcount_t for reference counting of events. Signed-off-by: Thomas Richter <[email protected]> Acked-by: Sumanth Korikkar <[email protected]> Cc: Heiko Carstens <[email protected]> Cc: Vasily Gorbik <[email protected]> Cc: Alexander Gordeev <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-07x86/paravirt: Fix incorrect virt spinlock setting on bare metalChen Yu2-9/+10
The kernel can change spinlock behavior when running as a guest. But this guest-friendly behavior causes performance problems on bare metal. The kernel uses a static key to switch between the two modes. In theory, the static key is enabled by default (run in guest mode) and should be disabled for bare metal (and in some guests that want native behavior or paravirt spinlock). A performance drop is reported when running encode/decode workload and BenchSEE cache sub-workload. Bisect points to commit ce0a1b608bfc ("x86/paravirt: Silence unused native_pv_lock_init() function warning"). When CONFIG_PARAVIRT_SPINLOCKS is disabled the virt_spin_lock_key is incorrectly set to true on bare metal. The qspinlock degenerates to test-and-set spinlock, which decreases the performance on bare metal. Set the default value of virt_spin_lock_key to false. If booting in a VM, enable this key. Later during the VM initialization, if other high-efficient spinlock is preferred (e.g. paravirt-spinlock), or the user wants the native qspinlock (via nopvspin boot commandline), the virt_spin_lock_key is disabled accordingly. This results in the following decision matrix: X86_FEATURE_HYPERVISOR Y Y Y N CONFIG_PARAVIRT_SPINLOCKS Y Y N Y/N PV spinlock Y N N Y/N virt_spin_lock_key N Y/N Y N Fixes: ce0a1b608bfc ("x86/paravirt: Silence unused native_pv_lock_init() function warning") Reported-by: Prem Nath Dey <[email protected]> Reported-by: Xiaoping Zhou <[email protected]> Suggested-by: Dave Hansen <[email protected]> Suggested-by: Qiuxu Zhuo <[email protected]> Suggested-by: Nikolay Borisov <[email protected]> Signed-off-by: Chen Yu <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Nikolay Borisov <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/acpi: Remove __ro_after_init from acpi_mp_wake_mailboxZhiquan Li1-1/+1
On a platform using the "Multiprocessor Wakeup Structure"[1] to startup secondary CPUs the control processor needs to memremap() the physical address of the MP Wakeup Structure mailbox to the variable acpi_mp_wake_mailbox, which holds the virtual address of mailbox. To wake up the AP the control processor writes the APIC ID of AP, the wakeup vector and the ACPI_MP_WAKE_COMMAND_WAKEUP command into the mailbox. Current implementation doesn't consider the case which restricts boot time CPU bringup to 1 with the kernel parameter "maxcpus=1" and brings other CPUs online later from user space as it sets acpi_mp_wake_mailbox to read-only after init. So when the first AP is tried to brought online after init, the attempt to update the variable results in a kernel panic. The memremap() call that initializes the variable cannot be moved into acpi_parse_mp_wake() because memremap() is not functional at that point in the boot process. Also as the APs might never be brought up, keep the memremap() call in acpi_wakeup_cpu() so that the operation only takes place when needed. Fixes: 24dd05da8c79 ("x86/apic: Mark acpi_mp_wake_* variables as __ro_after_init") Signed-off-by: Zhiquan Li <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Kirill A. Shutemov <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07ARM: at91: Kconfig: add config flag for SAM9X7 SoCVarshini Rajendran1-3/+19
Add config flag for sam9x7 SoC. Signed-off-by: Varshini Rajendran <[email protected]> Reviewed-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Claudiu Beznea <[email protected]>
2024-08-07ARM: at91: pm: add sam9x7 SoC init configVarshini Rajendran2-0/+34
Add SoC init config for sam9x7 family. Signed-off-by: Varshini Rajendran <[email protected]> Reviewed-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Claudiu Beznea <[email protected]>
2024-08-07ARM: at91: pm: add support for sam9x7 SoC familyVarshini Rajendran2-0/+31
Add support and pm init config for sam9x7 SoC. Signed-off-by: Varshini Rajendran <[email protected]> Reviewed-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Claudiu Beznea <[email protected]>
2024-08-07ARM: configs: at91: enable config flags for sam9x7 SoC familyVarshini Rajendran1-0/+1
Enable config flags for SAM9X7 SoC for the sam9x7 SoC family. Signed-off-by: Varshini Rajendran <[email protected]> Reviewed-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Claudiu Beznea <[email protected]>
2024-08-07x86/apic: Remove unused inline function apic_set_eoi_cb()Yue Haibing1-1/+0
Commit 2744a7ce34a7 ("x86/apic: Replace acpi_wake_cpu_handler_update() and apic_set_eoi_cb()") left it unused. Signed-off-by: Yue Haibing <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Cleanup remaining coding style issuesThomas Gleixner1-11/+12
Add missing new lines and reorder variable definitions. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Cleanup line breaksThomas Gleixner1-37/+18
80 character limit is history. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Cleanup bracket usageThomas Gleixner1-16/+18
Add brackets around if/for constructs as required by coding style or remove pointless line breaks to make it true single line statements which do not require brackets. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Cleanup commentsThomas Gleixner1-49/+37
Use proper comment styles and shrink comments to their scope where applicable. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Move replace_pin_at_irq_node() to the call siteThomas Gleixner1-22/+18
It's only used by check_timer(). Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/mpparse: Cleanup apic_printk()sThomas Gleixner1-7/+6
Use the new apic_pr_verbose() helper. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Cleanup guarded debug printk()sThomas Gleixner1-38/+29
Cleanup the APIC printk()s which are inside of a apic verbosity guarded region by using apic_dbg() for the KERN_DEBUG level prints. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Cleanup apic_printk()sThomas Gleixner1-103/+73
Replace apic_printk($LEVEL) with the corresponding apic_pr_*() helpers and use pr_info() for APIC_QUIET as that is always printed so the indirection is pointless noise. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/apic: Cleanup apic_printk()sThomas Gleixner1-46/+35
Use the new apic_pr_*() helpers and cleanup the apic_printk() maze. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/apic: Provide apic_printk() helpersThomas Gleixner1-14/+19
apic_printk() requires the APIC verbosity level and printk level which is tedious and horrible to read. Provide helpers to simplify all of that. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Use guard() for locking where applicableThomas Gleixner1-128/+64
KISS rules! Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Cleanup structsThomas Gleixner1-18/+14
Make them conforming to the TIP coding style guide. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Mark mp_alloc_timer_irq() __initThomas Gleixner1-2/+2
Only invoked from check_timer() which is __init too. Cleanup the variable declaration while at it. Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Tested-by: Breno Leitao <[email protected]> Reviewed-by: Breno Leitao <[email protected]> Link: https://lore.kernel.org/all/[email protected]
2024-08-07x86/ioapic: Handle allocation failures gracefullyThomas Gleixner1-24/+22
Breno observed panics when using failslab under certain conditions during runtime: can not alloc irq_pin_list (-1,0,20) Kernel panic - not syncing: IO-APIC: failed to add irq-pin. Can not proceed panic+0x4e9/0x590 mp_irqdomain_alloc+0x9ab/0xa80 irq_domain_alloc_irqs_locked+0x25d/0x8d0 __irq_domain_alloc_irqs+0x80/0x110 mp_map_pin_to_irq+0x645/0x890 acpi_register_gsi_ioapic+0xe6/0x150 hpet_open+0x313/0x480 That's a pointless panic which is a leftover of the historic IO/APIC code which panic'ed during early boot when the interrupt allocation failed. The only place which might justify panic is the PIT/HPET timer_check() code which tries to figure out whether the timer interrupt is delivered through the IO/APIC. But that code does not require to handle interrupt allocation failures. If the interrupt cannot be allocated then timer delivery fails and it either panics due to that or falls back to legacy mode. Cure this by removing the panic wrapper around __add_pin_to_irq_node() and making mp_irqdomain_alloc() aware of the failure condition and handle it as any other failure in this function gracefully. Reported-by: Breno Leitao <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Breno Leitao <[email protected]> Tested-by: Qiuxu Zhuo <[email protected]> Link: https://lore.kernel.org/all/[email protected] Link: https://lore.kernel.org/all/[email protected]
2024-08-07ARM: dts: microchip: at91-sama7g5ek: add EEPROMsClaudiu Beznea1-0/+40
The main boot sequence for Microchip AT91 devices is one of the following: 1/ ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel 2/ ROM BOOT -> AT91Bootstrap -> Linux Kernel For case 1/ U-Boot is the stage where the Ethernet MAC addresses are set. For case 2/ where U-Boot is skipped the Ethernet MAC addresses need to be configured in Linux. For this add EEPROMs and nvmem-layout to describe EUI48 MAC address regions. Signed-off-by: Claudiu Beznea <[email protected]> [[email protected]: Add nvmem-layout to describe eui48 mac region. Align compatible name with datasheet. Reword commit message.] Signed-off-by: Andrei Simion <[email protected]> [claudiu.beznea: adjusted the new commit message] Signed-off-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-08-07RISC-V: Enable IPI CPU BacktraceRyo Takakura2-0/+21
Add arch_trigger_cpumask_backtrace() which is a generic infrastructure for sampling other CPUs' backtrace using IPI. The feature is used when lockups are detected or in case of oops/panic if parameters are set accordingly. Below is the case of oops with the oops_all_cpu_backtrace enabled. $ sysctl kernel.oops_all_cpu_backtrace=1 triggering oops shows: [ 212.214237] NMI backtrace for cpu 1 [ 212.214390] CPU: 1 PID: 610 Comm: in:imklog Tainted: G OE 6.10.0-rc6 #1 [ 212.214570] Hardware name: riscv-virtio,qemu (DT) [ 212.214690] epc : fallback_scalar_usercopy+0x8/0xdc [ 212.214809] ra : _copy_to_user+0x20/0x40 [ 212.214913] epc : ffffffff80c3a930 ra : ffffffff8059ba7e sp : ff20000000eabb50 [ 212.215061] gp : ffffffff82066f90 tp : ff6000008e958000 t0 : 3463303866660000 [ 212.215210] t1 : 000000000000005b t2 : 3463303866666666 s0 : ff20000000eabb60 [ 212.215358] s1 : 0000000000000386 a0 : 00007ff6e81df926 a1 : ff600000824df800 [ 212.215505] a2 : 000000000000003f a3 : 7fffffffffffffc0 a4 : 0000000000000000 [ 212.215651] a5 : 000000000000003f a6 : 0000000000000000 a7 : 0000000000000000 [ 212.215857] s2 : ff600000824df800 s3 : ffffffff82066cc0 s4 : 0000000000001c1a [ 212.216074] s5 : ffffffff8206a5a8 s6 : 00007ff6e81df926 s7 : ffffffff8206a5a0 [ 212.216278] s8 : ff600000824df800 s9 : ffffffff81e25de0 s10: 000000000000003f [ 212.216471] s11: ffffffff8206a59d t3 : ff600000824df812 t4 : ff600000824df812 [ 212.216651] t5 : ff600000824df818 t6 : 0000000000040000 [ 212.216796] status: 0000000000040120 badaddr: 0000000000000000 cause: 8000000000000001 [ 212.217035] [<ffffffff80c3a930>] fallback_scalar_usercopy+0x8/0xdc [ 212.217207] [<ffffffff80095f56>] syslog_print+0x1f4/0x2b2 [ 212.217362] [<ffffffff80096e5c>] do_syslog.part.0+0x94/0x2d8 [ 212.217502] [<ffffffff800979e8>] do_syslog+0x66/0x88 [ 212.217636] [<ffffffff803a5dda>] kmsg_read+0x44/0x5c [ 212.217764] [<ffffffff80392dbe>] proc_reg_read+0x7a/0xa8 [ 212.217952] [<ffffffff802ff726>] vfs_read+0xb0/0x24e [ 212.218090] [<ffffffff803001ba>] ksys_read+0x64/0xe4 [ 212.218264] [<ffffffff8030025a>] __riscv_sys_read+0x20/0x2c [ 212.218453] [<ffffffff80c4af9a>] do_trap_ecall_u+0x60/0x1d4 [ 212.218664] [<ffffffff80c56998>] ret_from_exception+0x0/0x64 Signed-off-by: Ryo Takakura <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
2024-08-07x86/mm: Fix PTI for i386 some moreThomas Gleixner1-16/+29
So it turns out that we have to do two passes of pti_clone_entry_text(), once before initcalls, such that device and late initcalls can use user-mode-helper / modprobe and once after free_initmem() / mark_readonly(). Now obviously mark_readonly() can cause PMD splits, and pti_clone_pgtable() doesn't like that much. Allow the late clone to split PMDs so that pagetables stay in sync. [peterz: Changelog and comments] Reported-by: Guenter Roeck <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Tested-by: Guenter Roeck <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
2024-08-07powerpc: Remove useless config comment in asm/percpu.hJinjie Ruan1-1/+1
commit 0db880fc865f ("powerpc: Avoid nmi_enter/nmi_exit in real mode interrupt.") has a config comment typo, and the #if/#else/#endif section is small and doesn't nest additional #ifdefs so the comment is useless and should be removed completely. Signed-off-by: Jinjie Ruan <[email protected]> Suggested-by: Christophe Leroy <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2024-08-07powerpc/476: Drop explicit initialization of struct ↵Uwe Kleine-König1-1/+1
i2c_device_id::driver_data to 0 This driver doesn't use the driver_data member of struct i2c_device_id, so don't explicitly initialize this member. This prepares putting driver_data in an anonymous union which requires either no initialization or named designators. But it's also a nice cleanup on its own. Signed-off-by: Uwe Kleine-König <[email protected]> Reviewed-by: Christophe Leroy <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2024-08-07powerpc/traps: Use backlight power constantsThomas Zimmermann1-1/+1
Replace FB_BLANK_ constants with their counterparts from the backlight subsystem. The values are identical, so there's no change in functionality or semantics. traps.c already includes backlight.h where the BACKLIGHT constants are defined. Signed-off-by: Thomas Zimmermann <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2024-08-07powerpc: Use of_property_present()Rob Herring (Arm)2-2/+2
Use of_property_present() to test for property presence rather than of_get_property(). This is part of a larger effort to remove callers of of_get_property() and similar functions. of_get_property() leaks the DT property data pointer which is a problem for dynamically allocated nodes which may be freed. Signed-off-by: Rob Herring (Arm) <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2024-08-07Merge tag 'ti-k3-dt-fixes-for-v6.11' of ↵Arnd Bergmann7-49/+16
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/fixes Devicetree fixes for TI K3 platforms for v6.11 Critical fixes for the following: * j784s4: Fix for McASP DMA map * J722s/AM62p: GPIO ranges fixes * k3-am62-verdin-dahlia: sleep-moci fixes for deep-sleep (revert) * tag 'ti-k3-dt-fixes-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arm64: dts: ti: k3-j784s4-main: Correct McASP DMAs arm64: dts: ti: k3-j722s: Fix gpio-range for main_pmx0 arm64: dts: ti: k3-am62p: Fix gpio-range for main_pmx0 arm64: dts: ti: k3-am62p: Add gpio-ranges for mcu_gpio0 arm64: dts: ti: k3-am62-verdin-dahlia: Keep CTRL_SLEEP_MOCI# regulator on arm64: dts: ti: k3-j784s4-evm: Consolidate serdes0 references arm64: dts: ti: k3-j784s4-evm: Assign only lanes 0 and 1 to PCIe1
2024-08-07ARM: pxa/gumstix: fix attaching properties to vbus gpio deviceDmitry Torokhov1-4/+7
Commit f1d6588af93b tried to convert GPIO lookup tables to software properties for the vbus gpio device, bit forgot the most important step: actually attaching the new properties to the device. Also fix up the name of the property array to reflect the board name, and add missing gpio/property.h and devices.h includes absence of which causes compile failures on some configurations. Switch "#ifdef CONFIG_USB_PXA25X" to "#if IS_ENABLED(CONFIG_USB_PXA25X)" because it should not matter if the driver is buolt in or a module, it still need vbus controls. Reported-by: Arnd Bergmann <[email protected]> Fixes: f1d6588af93b ("ARM: pxa/gumstix: convert vbus gpio to use software nodes") Signed-off-by: Dmitry Torokhov <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2024-08-07s390/uv: Panic for set and remove shared access UVC errorsClaudio Imbrenda1-1/+4
The return value uv_set_shared() and uv_remove_shared() (which are wrappers around the share() function) is not always checked. The system integrity of a protected guest depends on the Share and Unshare UVCs being successful. This means that any caller that fails to check the return value will compromise the security of the protected guest. No code path that would lead to such violation of the security guarantees is currently exercised, since all the areas that are shared never get unshared during the lifetime of the system. This might change and become an issue in the future. The Share and Unshare UVCs can only fail in case of hypervisor misbehaviour (either a bug or malicious behaviour). In such cases there is no reasonable way forward, and the system needs to panic. This patch replaces the return at the end of the share() function with a panic, to guarantee system integrity. Fixes: 5abb9351dfd9 ("s390/uv: introduce guest side ultravisor code") Signed-off-by: Claudio Imbrenda <[email protected]> Reviewed-by: Christian Borntraeger <[email protected]> Reviewed-by: Steffen Eiden <[email protected]> Reviewed-by: Janosch Frank <[email protected]> Link: https://lore.kernel.org/r/[email protected] Message-ID: <[email protected]> [[email protected]: Fixed up patch subject] Signed-off-by: Janosch Frank <[email protected]>
2024-08-07LoongArch: KVM: Remove undefined a6 argument comment for kvm_hypercall()Dandan Zhang1-2/+2
The kvm_hypercall() set for LoongArch is limited to a1-a5. So the mention of a6 in the comment is undefined that needs to be rectified. Reviewed-by: Bibo Mao <[email protected]> Signed-off-by: Wentao Guan <[email protected]> Signed-off-by: Dandan Zhang <[email protected]> Signed-off-by: Huacai Chen <[email protected]>
2024-08-07LoongArch: KVM: Remove unnecessary definition of KVM_PRIVATE_MEM_SLOTSYuli Wang1-2/+0
1. "KVM_PRIVATE_MEM_SLOTS" is renamed as "KVM_INTERNAL_MEM_SLOTS". 2. "KVM_INTERNAL_MEM_SLOTS" defaults to zero, so it is not necessary to define it in LoongArch's asm/kvm_host.h. Link: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=bdd1c37a315bc50ab14066c4852bc8dcf070451e Link: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=b075450868dbc0950f0942617f222eeb989cad10 Reviewed-by: Bibo Mao <[email protected]> Signed-off-by: Wentao Guan <[email protected]> Signed-off-by: Yuli Wang <[email protected]> Signed-off-by: Huacai Chen <[email protected]>
2024-08-07LoongArch: Use accessors to page table entries instead of direct dereferenceHuacai Chen8-42/+52
As very well explained in commit 20a004e7b017cce282 ("arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables"), an architecture whose page table walker can modify the PTE in parallel must use READ_ONCE()/ WRITE_ONCE() macro to avoid any compiler transformation. So apply that to LoongArch which is such an architecture, in order to avoid potential problems. Similar to commit edf955647269422e ("riscv: Use accessors to page table entries instead of direct dereference"). Signed-off-by: Huacai Chen <[email protected]>
2024-08-07LoongArch: Enable general EFI poweroff methodMiao Wang1-0/+6
efi_shutdown_init() can register a general sys_off handler named efi_power_off(). Enable this by providing efi_poweroff_required(), like arm and x86. Since EFI poweroff is also supported on LoongArch, and the enablement makes the poweroff function usable for hardwares which lack ACPI S5. We prefer ACPI poweroff rather than EFI poweroff (like x86), so we only require EFI poweroff if acpi_gbl_reduced_hardware or acpi_no_s5 is true. Cc: [email protected] Acked-by: Ard Biesheuvel <[email protected]> Signed-off-by: Miao Wang <[email protected]> Signed-off-by: Huacai Chen <[email protected]>
2024-08-06arm64: dts: ti: k3-j7200-som-p0: Update mux-controller node nameBhavya Kapoor1-2/+2
There are 2 mux-controller nodes in J7200 which are responsible for transferring can signals to the can phy but same node names for both the mux-controllers led to errors while setting up both mux-controllers for can phys simultaneously. Thus, update node names for these mux-controller. Fixes: da23e8d1124b ("arm64: dts: ti: k3-j7200-som-p0: Add support for CAN instance 0 in main domain") Signed-off-by: Bhavya Kapoor <[email protected]> Reviewed-by: Judith Mendez <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nishanth Menon <[email protected]>
2024-08-06arm64: dts: ti: k3-j721s2-som-p0: Update mux-controller node nameBhavya Kapoor1-2/+2
There are 2 mux-controller nodes in J721S2 which are responsible for transferring can signals to the can phy but same node names for both the mux-controllers led to errors while setting up both mux-controllers for can phys simultaneously. Thus, update node names for these mux-controller. Fixes: 98f3b667e1de ("arm64: dts: ti: k3-j721s2: Add support for CAN instances 3 and 5 in main domain") Signed-off-by: Bhavya Kapoor <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nishanth Menon <[email protected]>
2024-08-06riscv: Re-introduce global icache flush in patch_text_XXX()Alexandre Ghiti1-0/+4
commit edf2d546bfd6 ("riscv: patch: Flush the icache right after patching to avoid illegal insns") mistakenly removed the global icache flush in patch_text_nosync() and patch_text_set_nosync() functions, so reintroduce them. Fixes: edf2d546bfd6 ("riscv: patch: Flush the icache right after patching to avoid illegal insns") Reported-by: Samuel Holland <[email protected]> Closes: https://lore.kernel.org/linux-riscv/[email protected]/ Signed-off-by: Alexandre Ghiti <[email protected]> Reviewed-by: Samuel Holland <[email protected]> Reviewed-by: Charlie Jenkins <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
2024-08-06x86/traps: Enable UBSAN traps on x86Gatlin Newhouse2-5/+66
Currently ARM64 extracts which specific sanitizer has caused a trap via encoded data in the trap instruction. Clang on x86 currently encodes the same data in the UD1 instruction but x86 handle_bug() and is_valid_bugaddr() currently only look at UD2. Bring x86 to parity with ARM64, similar to commit 25b84002afb9 ("arm64: Support Clang UBSAN trap codes for better reporting"). See the llvm links for information about the code generation. Enable the reporting of UBSAN sanitizer details on x86 compiled with clang when CONFIG_UBSAN_TRAP=y by analysing UD1 and retrieving the type immediate which is encoded by the compiler after the UD1. [ tglx: Simplified it by moving the printk() into handle_bug() ] Signed-off-by: Gatlin Newhouse <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Cc: Kees Cook <[email protected]> Link: https://lore.kernel.org/all/[email protected] Link: https://github.com/llvm/llvm-project/commit/c5978f42ec8e9#diff-bb68d7cd885f41cfc35843998b0f9f534adb60b415f647109e597ce448e92d9f Link: https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/X86/X86InstrSystem.td#L27
2024-08-06arm64: dts: ti: k3-j784s4-main: Correct McASP DMAsParth Pancholi1-2/+2
Correct the McASP nodes - mcasp3 and mcasp4 with the right DMAs thread IDs as per TISCI documentation [1] for J784s4. This fixes the related McASPs probe failure due to incorrect DMA IDs. Link: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/j784s4/psil_cfg.html#psi-l-source-and-destination-thread-ids/ [1] Fixes: 5095ec4aa1ea ("arm64: dts: ti: k3-j784s4-main: Add McASP nodes") Signed-off-by: Parth Pancholi <[email protected]> Reviewed-by: Jayesh Choudhary <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nishanth Menon <[email protected]>
2024-08-06arm64: dts: mediatek: mt8186-corsola: Update ADSP reserved memory regionFei Shao1-1/+1
Corsola firmware reserves the memory region of [0x60000000, 0x61100000) exclusively for ADSP usage. But in fact, a 6 MB "hole" of [0x60A00000, 0x61000000) didn't get assigned to the ADSP node in the Corsola device tree, meaning no audio tasks can access and utilize that memory section. Update the reserved ADSP memory region to fill the gap. Fixes: 8855d01fb81f ("arm64: dts: mediatek: Add MT8186 Krabby platform based Tentacruel / Tentacool") Signed-off-by: Fei Shao <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
2024-08-06arm64: dts: mediatek: mt8183: Remove clock from mfg_async power domainPin-yen Lin1-2/+0
This clock dependency introduced a mutual dependency between mfg_async power domain and mt8183-mfgcfg clock, and Mediatek has confirmed that this dependency is not needed. Remove this to avoid potential deadlock. Signed-off-by: Pin-yen Lin <[email protected]> Fixes: 37fb78b9aeb7 ("arm64: dts: mediatek: Add mt8183 power domains controller") Tested-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
2024-08-06arm64: dts: mt8183-kukui: clean up regulator treeChen-Yu Tsai1-16/+6
Some regulators in the kukui device tree are modeled incorrectly. Some are missing supplies and some switches are incorrectly modeled as voltage regulators. A pass-through was incorrectly modeled as a regulator. Add supplies where missing, remove voltage constraints for "switches", and drop the "bl_pp5000" pass-through. This depends on commit 2a99858c172e ("arm64: dts: mediatek: mt8183-kukui: Add PMIC regulator supplies") for reg_vsys. Fixes: cd894e274b74 ("arm64: dts: mt8183: Add krane-sku176 board") Fixes: f15722c0fef0 ("arm64: dts: mt8183: Add pwm and backlight node") Signed-off-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
2024-08-06arm64: dts: mediatek: mt7981: add SPI controllersRafał Miłecki1-0/+42
MT7981 (Filogic 820) has three on-SoC SPI controllers. Signed-off-by: Rafał Miłecki <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
2024-08-06arm64: dts: mediatek: mt8183-kukui: Disable unused efuse at 8000000Nícolas F. R. A. Prado1-4/+0
MT8183's Devicetree describes two eFuse regions: one at 8000000 and another at 11f10000. The efuse at 8000000, unlike the one at 11f10000 and the efuse on all other MediaTek SoCs, does not define any cell, including the socinfo-data ones which the mtk-efuse driver expects to always be present, resulting in the following errors in the log: mtk-socinfo mtk-socinfo.0.auto: error -ENOENT: Failed to get socinfo data mtk-socinfo mtk-socinfo.0.auto: probe with driver mtk-socinfo failed with error -2 The efuse at 8000000 is disabled by default but enabled on mt8183-kukui. Since it is unused, and to prevent the errors from being thrown, disable it on mt8183-kukui. Signed-off-by: Nícolas F. R. A. Prado <[email protected]> Link: https://lore.kernel.org/r/20240803-mtk-socinfo-no-data-probe-err-v3-1-09cfffc7241a@collabora.com Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
2024-08-06arm64: dts: mediatek: mt8188: add default thermal zonesNicolas Pitre1-0/+447
Inspired by the vendor kernel but adapted to the upstream thermal driver version. Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Nicolas Pitre <[email protected]> Signed-off-by: Julien Panis <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
2024-08-06arm64: dts: mediatek: mt8188: add lvts definitionsNicolas Pitre1-0/+35
Various values extracted from the vendor's kernel driver. Signed-off-by: Nicolas Pitre <[email protected]> Link: https://lore.kernel.org/r/[email protected] [Angelo: Fixed wrong nvmem-cell-names] Signed-off-by: Julien Panis <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
2024-08-06arm64: dts: mediatek: mt8186: add default thermal zonesNicolas Pitre1-0/+297
Inspired by the vendor kernel but adapted to the upstream thermal driver version. Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Nicolas Pitre <[email protected]> Signed-off-by: Julien Panis <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
2024-08-06arm64: dts: mediatek: mt8186: add lvts definitionsNicolas Pitre1-0/+19
Values extracted from vendor source tree. Signed-off-by: Nicolas Pitre <[email protected]> Link: https://lore.kernel.org/r/[email protected] [Angelo: Fixed validation and quality issues] Signed-off-by: Julien Panis <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
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