| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
Many platforms were specifying the `aspeed,external-nodes` property
required by the AST2500 pinctrl. However, its been specified in the
pinctrl node directly in aspeed-g5.dtsi for quite a long time now.
Remove the unnecessary override from all relevant platform dts files.
Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-5-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
There's no binding defined for the device, so remove it from the
devicetrees until someone has the motivation to write one.
Squash warnings such as:
arch/arm/boot/dts/aspeed/aspeed-ast2500-evb.dtb:
/ahb/apb@1e6e0000/xdma@1e6e7000: failed to match any schema with
compatible: ['aspeed,ast2500-xdma']
Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-4-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Squash warnings such as:
```
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: '#address-cells' is a required property
from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: '#size-cells' is a required property
from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: 'ranges' is a required property
from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
```
Fixes: d44a1138cd82 ("arm/dts: Add Aspeed ast2400 device tree")
Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-3-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
The ASPEED CVIC binding documents `aspeed,cvic` as the required generic
compatible, but the devicetrees contained `aspeed-cvic`. Update the
devictrees to use `aspeed,cvic` as documented and as required by
the driver implementation. Presumably the bug was the result of some
incoherent thoughts while removing the SoC name at the time of
writing.
Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-2-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Squash schema warnings such as:
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb:
copro-interrupt-controller@1e6c2000: $nodename:0:
'copro-interrupt-controller@1e6c2000' does not match
'^interrupt-controller(@[0-9a-f,]+)*$'
Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-1-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add LED nodes as the gpio-leds devices. They are led-bmc-ready,
led-sw-heartbeat, led-identify, led-fault, led-fan-fault, led-psu-fault
Signed-off-by: Chanh Nguyen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Enable the BMC I2C10.
Enable the BMC I2C15 and add the GPIO Expander as a child node.
Signed-off-by: Chanh Nguyen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Define the I2C alias ports for the riser cards.
Add the i2c muxes to switch to the i2c alias ports and
the eeprom nodes to read the FRU contents on riser cards.
Signed-off-by: Chanh Nguyen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add the I2C alias ports to read temperature sensors via channels
of the I2C muxes.
Signed-off-by: Chanh Nguyen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Define I2C alias ports from I2C Switch 0x70 at BMC I2C5.
Add the tmp421 sensors via the I2C alias ports as OCP device
temperature sensors.
Signed-off-by: Chanh Nguyen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add linux device tree entry for Meta(Facebook) Catalina compute-tray
BMC using AT2600 SoC.
Signed-off-by: Potin Lai <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add host0-ready pin for phosphor-state-manager.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add spi-gpio for TPM device.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Enable LTC4287 device on i2c-0.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Remove unused power device.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Switch the i2c bus number to map the i2c tag according to the hardware
design.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Revise the SGPIO naming to mapping the SGPIO from the CPLD.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add HSC xdp710 on i2c bus0.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add tmp75 sensor on the i2c bus connect to each fan board.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Enable ehci0 for USB.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add linename of two pins for power good/control.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add ina238 support to read the sensors in front of fans.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Define the LEDs node name.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Remove unused bus and device.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Change usage of I2C bus 11 to mdio3.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Change the RTC reference from on-chip to externel on i2c bus 9 and address
is 0x51.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Add eeprom on the i2c-9 address 0x50 and i2c-15 address 0x56.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Change and add aliases name for uart interface.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
Revise the address of tmp75 on I2C bus 1 from 0x48 to 0x4f due to design
change.
Signed-off-by: Yang Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
|
|
If pcie_find_root_port() is unable to locate a Root Port, it will return
NULL. Check the pointer for NULL before dereferencing it.
This particular case is in a quirk for devices that are always below a Root
Port, so this won't avoid a problem and doesn't need to be backported, but
check as a matter of style and to prevent copy/paste mistakes.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Samasth Norway Ananda <[email protected]>
[bhelgaas: drop Fixes: and explain why there's no problem in this case]
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Mario Limonciello <[email protected]>
|
|
The SM8150 MTP board does not have magically different GPU than the
SM8150, so it cannot use amd,imageon compatible, also pointed by
dtbs_check:
sm8150-mtp.dtb: gpu@2c00000: compatible: 'oneOf' conditional failed, one must be fixed:
['qcom,adreno-640.1', 'qcom,adreno', 'amd,imageon'] is too long
'qcom,adreno-640.1' does not match '^qcom,adreno-[0-9a-f]{8}$'
'qcom,adreno-640.1' does not match '^amd,imageon-200\\.[0-1]$'
'amd,imageon' was expected
The incorrect amd,imageon compatible was added in commit f30ac26def18
("arm64: dts: qcom: add sm8150 GPU nodes") to the SM8150 and later moved
to the SM8150 MTP board in commit 1642ab96efa4 ("arm64: dts: qcom:
sm8150: Don't start Adreno in headless mode") with an intention to allow
headless mode. This should be solved via proper driver quirks, not fake
compatibles.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
|
|
qsi() executes the instruction qsi (query sample information)
and stores the result of the query in a sample information block
pointed to by the function argument. The instruction does not
change the condition code register. The return code is always
zero. No need to check for errors. Remove now unreferenced
macros PMC_FAILURE and RS_INIT_FAILURE_QSI.
Signed-off-by: Thomas Richter <[email protected]>
Acked-by: Sumanth Korikkar <[email protected]>
Cc: Heiko Carstens <[email protected]>
Cc: Vasily Gorbik <[email protected]>
Cc: Alexander Gordeev <[email protected]>
Signed-off-by: Vasily Gorbik <[email protected]>
|
|
sf_disable() returns the condition code of instruction lsctl (load
sampling controls). However the parameter to lsctl() in
sf_disable() is a sample control block containing
all zeroes. This invocation of lsctl() does not fail and returns
always zero even when there is no authorization for sampling
on the machine. In short, sampling can be always turned off.
Ignore the return code of sf_disable() and change the function
return to void.
Signed-off-by: Thomas Richter <[email protected]>
Acked-by: Sumanth Korikkar <[email protected]>
Cc: Heiko Carstens <[email protected]>
Cc: Vasily Gorbik <[email protected]>
Cc: Alexander Gordeev <[email protected]>
Signed-off-by: Vasily Gorbik <[email protected]>
|
|
SIE instruction performs faster when the virtual address of
SIE block matches the physical one. Pin the identity mapping
base to zero for the benefit of SIE and other instructions
that have similar performance impact. Still, randomize the
base when DEBUG_VM kernel configuration option is enabled.
Suggested-by: Vasily Gorbik <[email protected]>
Reviewed-by: Christian Borntraeger <[email protected]>
Signed-off-by: Alexander Gordeev <[email protected]>
Signed-off-by: Vasily Gorbik <[email protected]>
|
|
The identity mapping position in virtual memory is randomized
together with the kernel mapping. That position can never
overlap with the lowcore even when the lowcore is relocated.
Prevent overlapping with the lowcore to allow independent
positioning of the identity mapping. With the current value
of the alternative lowcore address of 0x70000 the overlap
could happen in case the identity mapping is placed at zero.
This is a prerequisite for uncoupling of randomization base
of kernel image and identity mapping in virtual memory.
Acked-by: Vasily Gorbik <[email protected]>
Signed-off-by: Alexander Gordeev <[email protected]>
Signed-off-by: Vasily Gorbik <[email protected]>
|
|
Extend the code patching selftests with some basic coverage of the new
data patching variants too.
Signed-off-by: Benjamin Gray <[email protected]>
Reviewed-by: Hari Bathini <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://msgid.link/[email protected]
|
|
These changes are for patch_instruction() uses on data. Unlike ppc64
these should not be incorrect as-is, but using the patch_uint() alias
better reflects what kind of data being patched and allows for
benchmarking the effect of different patch_* implementations (e.g.,
skipping instruction flushing when patching data).
Signed-off-by: Benjamin Gray <[email protected]>
Tested-by: Hari Bathini <[email protected]>
Acked-by: Naveen N Rao <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://msgid.link/[email protected]
|
|
This use of patch_instruction() is working on 32 bit data, and can fail
if the data looks like a prefixed instruction and the extra write
crosses a page boundary. Use patch_u32() to fix the write size.
Fixes: 8734b41b3efe ("powerpc/module_64: Fix livepatching for RO modules")
Link: https://lore.kernel.org/all/20230203004649.1f59dbd4@yea/
Signed-off-by: Benjamin Gray <[email protected]>
Tested-by: Hari Bathini <[email protected]>
Acked-by: Naveen N Rao <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://msgid.link/[email protected]
|
|
The new data patching still needs to be aligned within a
cacheline too for the flushes to work correctly. To simplify
this requirement, we just say data patches must be aligned.
Detect when data patching is not aligned, returning an invalid
argument error.
Signed-off-by: Benjamin Gray <[email protected]>
Reviewed-by: Hari Bathini <[email protected]>
Acked-by: Naveen N Rao <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://msgid.link/[email protected]
|
|
patch_instruction() is designed for patching instructions in otherwise
readonly memory. Other consumers also sometimes need to patch readonly
memory, so have abused patch_instruction() for arbitrary data patches.
This is a problem on ppc64 as patch_instruction() decides on the patch
width using the 'instruction' opcode to see if it's a prefixed
instruction. Data that triggers this can lead to larger writes, possibly
crossing a page boundary and failing the write altogether.
Introduce patch_uint(), and patch_ulong(), with aliases patch_u32(), and
patch_u64() (on ppc64) designed for aligned data patches. The patch
size is now determined by the called function, and is passed as an
additional parameter to generic internals.
While the instruction flushing is not required for data patches, it
remains unconditional in this patch. A followup series is possible if
benchmarking shows fewer flushes gives an improvement in some
data-patching workload.
ppc32 does not support prefixed instructions, so is unaffected by the
original issue. Care is taken in not exposing the size parameter in the
public (non-static) interface, so the compiler can const-propagate it
away.
Signed-off-by: Benjamin Gray <[email protected]>
Reviewed-by: Hari Bathini <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://msgid.link/[email protected]
|
|
LHZX_BE has been unused since commit dbf44daf7c88 ("bpf, ppc64: remove
ld_abs/ld_ind")
Remove it.
Signed-off-by: Christophe Leroy <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://msgid.link/fd332b01c47bb9cb6c3af1696a2e109be655f5b5.1724222856.git.christophe.leroy@csgroup.eu
|
|
Add ADSP and CDSP0 fastrpc nodes.
Signed-off-by: Ling Xu <[email protected]>
Reviewed-by: Bartosz Golaszewski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
|
|
X1E80100 has a multiport controller with 2 HS (eUSB) and 2 SS PHYs
attached to it. It's commonly used for USB-A ports and internally
routed devices. Configure it to support such functionality.
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
|
|
The omap1510_idle_loop_suspend/_sz() and omap1610_idle_loop_suspend/_sz()
has been removed since commit feb72f3b313e ("ARM: OMAP1: Remove
omap_sram_idle()"), so remove them.
Signed-off-by: Gaosheng Cui <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Kevin Hilman <[email protected]>
|
|
The BCM21664 is nearly identical in terms of register layout to the
BCM23550. Move the shared nodes into a new file, bcm2166x-common.dtsi,
and make both bcm21664.dtsi and bcm23550.dtsi include it. This new
common file is based on the former bcm23550.dtsi file, and inherits
its licensing.
Signed-off-by: Artur Weber <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add node for board info registers, which allows getting SoC family and
board revision.
For example, with MESON_GX_SOCINFO config enabled we can get the
following information for board with Amlogic A4 SoC:
soc soc0: Amlogic A4 (A113L2) Revision 40:b (1:1) Detected.
Signed-off-by: Xianwei Zhao <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Add node for board info registers, which allows getting SoC family and
board revision.
For example, with MESON_GX_SOCINFO config enabled we can get the
following information for board with Amlogic T7 SoC:
soc soc0: Amlogic T7 (A311D2) Revision 36:c (1:1) Detected.
Signed-off-by: Xianwei Zhao <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Add node for board info registers, which allows getting SoC family and
board revision.
For example, with MESON_GX_SOCINFO config enabled we can get the
following information for board with Amlogic C3 SoC:
soc soc0: Amlogic C3 (C308L) Revision 3d:a (1:1) Detected
Signed-off-by: Xianwei Zhao <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Add node for board info registers, which allows getting SoC family and
board revision.
For example, with MESON_GX_SOCINFO config enabled we can get the
following information for board with Amlogic S4 SoC:
soc soc0: Amlogic S4 (S805X2) Revision 37:a (2:1) Detecte
Signed-off-by: Xianwei Zhao <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Add watchdog device.
Signed-off-by: Huqiang Qin <[email protected]>
Signed-off-by: Xianwei Zhao <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|