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2013-08-26ARM: dts: Add RTC DT node to Exynos5420 SoCVikas Sajjan1-0/+6
Adds RTC DT node to Exynos5420 SoC Signed-off-by: Vikas Sajjan <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-08-26ARM: dts: Update the "status" property of RTC DT node for Exynos5250 SoCVikas Sajjan3-8/+1
Moves the RTC DT node's "status" property from exynos5250 board (arndale & snow) dts files to exynos5250.dtsi, since the bindings in exynos5250.dtsi depicts the RTC h/w completely. Signed-off-by: Vikas Sajjan <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-08-26ARM: dts: Fix the RTC DT node name for Exynos5250Vikas Sajjan4-4/+4
Fixes the RTC DT node name for Exynos5250 as per the DT node naming convention. Signed-off-by: Vikas Sajjan <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-08-25ARM: 7806/1: allow DEBUG_UNCOMPRESS for TegraStephen Warren2-1/+30
DEBUG_UNCOMPRESS was previously disallowed for Tegra due to tegra.S's use of global data that was not linked into the decompressor. Solve this by declaring this symbol in tegra.S when it is being built into the decompressor. For the kernel proper, leave the declaration in mach-tegra/common.c as explained in the comment. Signed-off-by: Stephen Warren <[email protected]> Tested-by: Alexandre Courbot <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: 7793/1: debug: use generic option for ep93xx PL10x debug portHartley Sweeten2-26/+2
The generic option DEBUG_LL_UART_PL01X is now used to select the UART type for the kernel low-level debugging on the ep93xx platform. This enables two config options to provide the physical and virtual base address of the debug UART. Use the generic options instead of providing platform specific options to select the debug UART. UART1 is selected with: DEBUG_UART_PHYS = 0x808c0000 DEBUG_UART_VIRT = 0xfedc0000 UART2 is selected with: DEBUG_UART_PHYS = 0x808d0000 DEBUG_UART_VIRT = 0xfedd0000 UART3 is selected with: DEBUG_UART_PHYS = 0x808e0000 DEBUG_UART_VIRT = 0xfede0000 The selected UART must already be initialized by the bootloader. If it isn't setup nothing will appear (which might be desired). Signed-off-by: H Hartley Sweeten <[email protected]> Cc: Ryan Mallon <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: move SPEAr debug to generic PL01x codeRussell King3-38/+7
The SPEAr debug code is a copy of the PL01x debugging code, so rather than have this pointless code duplication, lets just use the standard implementation instead. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: move davinci debug to generic 8250 codeRussell King2-66/+15
Davinci's debugging is just a copy of the old 8250_32 code with a different base address. Incorporate this into the generic 8250 debug code. Acked-by: Sekhar Nori <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: move keystone debug to generic 8250 codeRussell King2-46/+8
Keystone's debugging is just a copy of the old 8250_32 code with a different base address. Incorporate this into the generic 8250 debug code. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: remove DEBUG_ROCKCHIP_UARTRussell King1-11/+0
Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: provide generic option choices for 8250 and PL01x portsRussell King1-7/+37
Provide generic option choices for 8250 and PL01x UART ports; these can now be selected by UART type rather than asking about the platform. This means that a kernel configuration user can manually choose the various parameters of the debug UART without resorting to the platform having to encode the possible settings. These two generic options are preferred over further debug entries for these ports; the existing options which refer back to the 8250 and PL01x ports are now considered deprecated. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: move PL01X debug include into arch/arm/include/debug/Russell King15-142/+5
Now that the PL01X debug include can mostly stand alone without requiring platforms to provide any macros, move it into the debug directory so it can be directly included. This allows us to get rid of a lot of debug-macros include files. The autodetect case for Versatile Express and the ux500 are left alone; these are more complicated implementations. Acked-by: Rob Herring <[email protected]> Acked-by: Ryan Mallon <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: provide PL01x debug uart phys/virt address configuration optionsRussell King14-156/+57
Move the definition of the UART register addresses out of the platform specific header files into the Kconfig files. Acked-by: Ryan Mallon <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: add support for word accesses to debug/8250.SRussell King5-72/+33
Add 32-bit word access support to debug/8250.S and convert Picoxcell and SoCFPGA to this. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: move 8250 debug include into arch/arm/include/debug/Russell King20-212/+3
Now that the 8250 debug include can stand alone without requiring platforms to provide any macros, move it into the debug directory so it can be directly included. This allows us to get rid of a lot of debug-macros include files. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: provide 8250 debug uart phys/virt address configuration optionsRussell King20-201/+68
Move the definition of the UART register addresses out of the platform specific header file into the Kconfig files. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: provide 8250 debug uart register shift configuration optionRussell King20-20/+30
Move the definition of the UART register shift out of the platform specific header file into the Kconfig files. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: provide 8250 debug uart flow control configuration optionRussell King6-5/+10
Move the definition out of the machine class debug-macro.S header into the Kconfig files. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: clean up low level kernel debugging selectionRussell King1-137/+191
It is silly to bury UART selection under multiple levels of choice statements, where the top level choice statement will only list about four entries when a single SoC is selected. Move the UART selection up into the top level choice statement as it was always intended to be. Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: fix wording error in DEBUG_LL_UART_NONE option helpRussell King1-1/+1
The DEBUG_LL_UART_NONE option was moved from the top of the list to the bottom - unfortunately, it still referred to the options "below" rather than "above". Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: 7822/1: add workaround for ambiguous C99 stdint.h typesArd Biesheuvel1-0/+40
The C99 types uintXX_t that are usually defined in 'stdint.h' are not as unambiguous on ARM as you would expect. For the types below, there is a difference on ARM between GCC built for bare metal ARM, GCC built for glibc and the kernel itself, which results in build errors if you try to build with -ffreestanding and include 'stdint.h' (such as when you include 'arm_neon.h' in order to use NEON intrinsics) As the typedefs for these types in 'stdint.h' are based on builtin defines supplied by GCC, we can tweak these to align with the kernel's idea of those types, so 'linux/types.h' and 'stdint.h' can be safely included from the same source file (provided that -ffreestanding is used). int32_t uint32_t uintptr_t bare metal GCC long unsigned long unsigned int glibc GCC int unsigned int unsigned int kernel int unsigned int unsigned long Acked by: Dave Martin <[email protected]> Acked-by: Nicolas Pitre <[email protected]> Acked-by: Mikael Pettersson <[email protected]> Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25[media] ARM: shmobile: Marzen: enable VIN and ADV7180 in defconfigVladimir Barinov1-0/+7
Add the VIN and ADV7180 drivers to 'marzen_defconfig'. Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-25[media] ARM: shmobile: Marzen: add VIN and ADV7180 supportVladimir Barinov1-1/+43
Add ADV7180 platform devices on the Marzen board, configure VIN1/3 pins, and register VIN1/3 devices with the ADV7180 specific platform data. [Sergei: removed superfluous tabulation and inserted empty lines in the macro definition, updated the copyrights, annotated VIN platform data as '__initdata'] Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-25[media] ARM: shmobile: r8a7779: add VIN supportVladimir Barinov3-0/+50
Add VIN clocks and platform devices for R8A7779 SoC; add function to register the VIN platform devices. [Sergei: added 'id' parameter check to r8a7779_add_vin_device(), used '*pdata' in *sizeof* operator there, renamed some variables, annotated vin[0-3]_resources [] and 'vin[0-3]_info' as '__initdata'.] Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-24sh: ecovec24: Remove MMCIF and SDHI .set_pwr() callbacksLaurent Pinchart1-41/+0
The MMCIF and SHDI platform data .set_pwr() callbacks are used to control the vmmc/vqmmc power supplies. As the power supplies already register control GPIOs there's no need to perform the operation manually. Remove the callback functions. Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-24sh: ecovec24: Remove mmcif .down_pwr() callbackLaurent Pinchart1-6/+0
The callback isn't used by the mmcif driver, don't initialize it in board code. Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-24sh: ecovec24: Use MMC/SDHI CD and RO GPIOLaurent Pinchart1-34/+8
Pass the CD and RO GPIO numbers to the MMC SPI and SDHI drivers and remove the custom .get_cd() and .get_ro() callback functions. Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-24ARM: ep93xx: vision_ep9307: Use MMC CD and RO GPIOLaurent Pinchart1-52/+5
Pass the CD and RO GPIO numbers to the MMC SPI driver and remove the custom .get_cd() and .get_ro() callback functions. Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: H Hartley Sweeten <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-24ARC: [lib] strchr breakage in Big-endian configurationJoern Rennecke1-0/+10
For a search buffer, 2 byte aligned, strchr() was returning pointer outside of buffer (buf - 1) ------------->8---------------- // Input buffer (default 4 byte aigned) char *buffer = "1AA_"; // actual search start (to mimick 2 byte alignment) char *current_line = &(buffer[2]); // Character to search for char c = 'A'; char *c_pos = strchr(current_line, c); printf("%s\n", c_pos) --> 'AA_' as oppose to 'A_' ------------->8---------------- Reported-by: Anton Kolesov <[email protected]> Debugged-by: Anton Kolesov <[email protected]> Cc: <[email protected]> # [3.9 and 3.10] Cc: Noam Camus <[email protected]> Signed-off-by: Joern Rennecke <[email protected]> Signed-off-by: Vineet Gupta <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2013-08-24ARM: mmp: avoid to include head file in mach-mmpHaojian Zhuang2-0/+12
pxa910_set_wake() & mmp2_set_wake() are both declared in head files of arch/arm/mach-mmp/include/mach directory. If we include these head files in irq-mmp driver, it blocks the multiplatform build. So adjust the code. Signed-off-by: Haojian Zhuang <[email protected]>
2013-08-24irqchip: mmp: support irqchipHaojian Zhuang4-40/+3
Support IRQCHIP & CONFIG_MULTI_IRQ_HANDLER in irq-mmp driver. Signed-off-by: Haojian Zhuang <[email protected]> Reviewed-by: Daniel Drake <[email protected]>
2013-08-24irqchip: move mmp irq driverHaojian Zhuang6-465/+4
Move irq-mmp driver from mach-mmp directory into irqchip directory. It's used to support multiple platform. Signed-off-by: Haojian Zhuang <[email protected]>
2013-08-24[media] ARM: shmobile: BOCK-W: enable VIN and ML86V7667 in defconfigVladimir Barinov1-0/+7
Add the VIN and ML86V7667 drivers to 'bockw_defconfig'. Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-24[media] ARM: shmobile: BOCK-W: add VIN and ML86V7667 supportVladimir Barinov1-0/+41
Add ML86V7667 platform devices on BOCK-W board, configure VIN0/1 pins, and register VIN0/1 devices with the ML86V7667 specific platform data. [Sergei: some macro/comment cleanup; updated the copyrights, removed duplicate 'sh_eth' driver being enabled before registering VIN1 due to a pin conflict, removed superfluous semicolon after iclink[01]_ml86v7667' initializer.] Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-24[media] ARM: shmobile: r8a7778: add VIN supportVladimir Barinov3-0/+42
Add VIN clocks and platform devices on R8A7778 SoC; add function to register the VIN platform devices. [Sergei: added 'id' parameter check to r8a7778_add_vin_device(), used '*pdata' in *sizeof* operator, and added an empty line there; renamed some variables, annotated 'vin[01]_info' and vin[01]_resources[] as '__initdata'.] Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-23powerpc/85xx: Add C293PCIE board supportMingkai Hu6-0/+307
C293PCIE board is a series of Freescale PCIe add-in cards to perform as public key crypto accelerator or secure key management module. - 512KB platform SRAM in addition to 512K L2 Cache/SRAM - 512MB soldered DDR3 32bit memory - CPLD System Logic - 64MB x16 NOR flash and 4GB x8 NAND flash - 16MB SPI flash Signed-off-by: Mingkai Hu <[email protected]> Signed-off-by: Po Liu <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2013-08-23powerpc/85xx: Add silicon device tree for C293Mingkai Hu2-0/+256
Signed-off-by: Mingkai Hu <[email protected]> Signed-off-by: Po Liu <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2013-08-23powerpc/85xx: Add SEC6.0 device treeMingkai Hu1-0/+56
Add device tree for SEC 6.0 used on C29x silicon. Signed-off-by: Mingkai Hu <[email protected]> Signed-off-by: Po Liu <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2013-08-23powerpc: add Book E support to 64-bit hibernationWang Dongsheng1-2/+43
Update the 64-bit hibernation code to support Book E CPUs. Some registers and instructions are not defined for Book3e (SDR reg, tlbia instruction). SDR: Storage Description Register. Book3S and Book3E have different address translation mode, we do not need HTABORG & HTABSIZE to translate virtual address to real address. More registers are saved in BookE-64bit.(TCR, SPRG1) Signed-off-by: Wang Dongsheng <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2013-08-23powerpc/85xx: Add P1023RDB board supportChunhe Lan4-6/+280
P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <[email protected]> Cc: Scott Wood <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2013-08-23powerpc/85xx: Add support for 85xx cpu type detectionHaijun.Zhang1-0/+92
Add this file to help detect cpu type in runtime. These macros will be more favorable for driver to apply errata and workaround to specified cpu type. Signed-off-by: Haijun Zhang <[email protected]> Signed-off-by: Zhao Chenhui <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2013-08-24dts: mpc512x: prepare for preprocessor supportGerhard Sittig4-3/+4
prepare C preprocessor support when processing MPC512x DTS files - switch from DTS syntax to CPP syntax for include specs - create a symlink such that DTS processing can reference includes Signed-off-by: Gerhard Sittig <[email protected]> Signed-off-by: Anatolij Gustschin <[email protected]>
2013-08-23powerpc: mpc512x: array decl for MCLK registers in CCMGerhard Sittig1-16/+2
reword the clock control module's registers declaration such that the MCLK related registers form an array and get indexed by PSC controller or CAN controller component number this change is in preparation to COMMON_CLK support for the MPC512x platform, the changed declaration remains neutral to existing code since the PSC and MSCAN CCR fields declared here aren't referenced elsewhere Signed-off-by: Gerhard Sittig <[email protected]> Signed-off-by: Anatolij Gustschin <[email protected]>
2013-08-23Merge tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman3-38/+44
into next/soc From Shawn Guo: It contains mxs soc changes for 3.12. - Run savedefconfig on mxs_defconfig to clean it up - Fix on mxs_restart() routine for interrupt context calling - A few other random updates and cleanups * tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs: pm: Include "pm.h" ARM: mxs: Simplify detection of CrystalFontz boards ARM: mach-mxs: Remove "TO" string from revision field ARM: mxs: Fix BUG() when invoking mxs_restart() from interrupt context ARM: mxs: Allow DT clock providers ARM: mxs_defconfig: Cleanup mxs_defconfig
2013-08-23Merge tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman36-3231/+4200
into next/soc From Shawn Guo: It contains the imx device tree updates for 3.12. - New pinctrl entry additions for various peripherals - Devices enabling for imx6, imx5 and imx27 boards - Add missing device nodes like iim, owire, audmux and sram, etc. - Various updates on boards like phytec, wandboard and sabresd - Consolidate pad macros between imx6q and imx6dl * tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (92 commits) ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ARM: dts: i.MX27: Increase "clock-latency" value ARM: dts: i.MX27: Add label to CPU node ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC ... Signed-off-by: Kevin Hilman <[email protected]>
2013-08-23Merge branches 'hwmod_devel_v3.12', 'prcm_devel_v3.12' and ↵Paul Walmsley5-30/+73
'am33xx_devel_v3.12' into prcm_a_for_v3.12
2013-08-23Merge tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman19-143/+487
into next/soc From Shawn Guo: It contains a bunch of imx soc updates for 3.12. - Add more ethernet phy fixups for imx6 boards - Add some missing imx6q clocks into clock driver - Add new clock types fixup mux and div to work around some ugly hardware defect - Consolidate L2 cache initialization function, so that it can be used on more i.MX SoCs - Replace magic numbers in mach-imx6q.c with well defined macros - Small fixes for imx6q and pllv3 clock drivers - Some random updates on imx defconfig files * tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (33 commits) phy: micrel: Add definitions for common Micrel PHY registers ARM: imx: Re-select CONFIG_SND_SOC_IMX_MC13783 option ARM: imx: Move anatop related from board file to anatop driver ARM: imx_v6_v7_defconfig: Enable wireless support ARM: imx_v4_v5_defconfig: Cleanup imx_v4_v5_defconfig ARM: imx_v6_v7_defconfig: Add SATA support ARM: imx_v6_v7_defconfig: Cleanup imx_v6_v7_defconfig ARM: mx53: Allow suspend/resume ARM: mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level ARM: imx_v6_v7_defconfig: Select CONFIG_TOUCHSCREEN_EGALAX ARM: imx6q: add vdoa gate clock ARM: imx6q: add the missing cko output selection ARM: imx6q: add cko2 clocks ARM: imx6q: add spdif gate clock ARM: imx: clk-pllv3: improve the timeout waiting method ARM: imx6: change some clocks to fixup clocks ARM: imx: add common clock support for fixup mux ARM: imx: add common clock support for fixup div ARM: imx: Select MIGHT_HAVE_CACHE_L2X0 ARM: imx: fix imx_init_l2cache storage class ...
2013-08-23ARM: OMAP: AM33xx: clock: Add RNG clock dataLokesh Vutla1-0/+5
Add clock data for RNG module on AM33xx SoC. Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23m68k/atari: ARAnyM - Always use physical addresses in NatFeat callsGeert Uytterhoeven4-15/+18
Pointers passed to ARAnyM NatFeat calls should be physical addresses, not virtual addresses. This worked before because on Atari, physical and virtual kernel addresses are the same, as long as normal kernel memory is concerned. Correct the few remaining places where virtual addresses were used. Signed-off-by: Geert Uytterhoeven <[email protected]>
2013-08-23m68k: Ignore disabled HSYNC interrupt on Atari for irqs_disabled()Geert Uytterhoeven1-0/+4
When running a multi-platform kernel on Atari, warning messages like the following may be printed: WARNING: at /root/linux-3.10.1/init/main.c:698 do_one_initcall+0x12e/0x13a() initcall param_sysfs_init+0x0/0x1a4 returned with disabled interrupts This is caused by the different definitions of ALLOWINT for Atari and other platforms: #if defined(MACH_ATARI_ONLY) #define ALLOWINT (~0x500) #else #define ALLOWINT (~0x700) #endif On Atari, we want to disable the high-frequency HSYNC interrupt: - On Atari-only kernels, this is handled completely through ALLOWINT, - On multi-platform kernels, this is handled by disabling the HSYNC interrupt from the interrupt handler. However, as in the latter case arch_irqs_disabled_flags() didn't ignore the disabling of the HSYNC interrupt, irqs_disabled() would detect false positives. Ignore the HSYNC interrupt when running on Atari to fix this. For single-platform kernels this test is optimized away by the compiler. Reported-by: Thorsten Glaser <[email protected]> Signed-off-by: Geert Uytterhoeven <[email protected]> Tested-by: Thorsten Glaser <[email protected]>
2013-08-23ARM: OMAP: TI81XX: add always-on powerdomain for TI81XXAida Mynzhasova2-0/+9
This patch adds alwon powerdomain support for TI81XX, which is required for stable functioning of a big number of TI81XX subsystems. Signed-off-by: Aida Mynzhasova <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
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