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2011-03-18MN10300: Fix ASB2364 FPGA register defsDavid Howells1-1/+1
Fix the definition of the ASB2364 FPGA IRQ detect registers. They accidentally got defined to be the same as the mask registers when the patches were being ported to the upstream kernel. Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Select GENERIC_HARDIRQS_NO_DEPRECATEDThomas Gleixner3-5/+6
All chips converted. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Select HAVE_GENERIC_HARDIRQS rather than GENERIC_HARDIRQSDavid Howells1-1/+1
Select HAVE_GENERIC_HARDIRQS rather than GENERIC_HARDIRQS in MN10300's main Kconfig file to avoid this warning: warning: (MN10300) selects GENERIC_HARDIRQS which has unmet direct dependencies (HAVE_GENERIC_HARDIRQS) Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Convert ASB2364 FPGA irq_chip to new functionsThomas Gleixner1-13/+13
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Convert ipi irq_chip to new functionsThomas Gleixner1-8/+22
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Convert serial irq_chip to new functionsThomas Gleixner1-5/+10
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Convert cpu irq_chips to new functionsThomas Gleixner1-29/+33
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Remove unused mn10300_intc_* functionsThomas Gleixner2-30/+0
No users. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Remove stale irq_chip.end - V2Thomas Gleixner1-1/+0
irq_chip.end is obsolete with the removal of __do_IRQ(). Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Use clockevents_calc_mult_shift()Thomas Gleixner3-26/+3
Use clockevents_calc_mult_shift() instead of the homebrewn function in mn10300/kernel/time.c. Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: John Stultz <[email protected]> Cc: Koichi Yasutake <[email protected]> Cc: Mark Salter <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Use clocksource_register_hz()Thomas Gleixner3-21/+1
clocksource_register_hz() calculates the shift/mult pair for the clocksource. Remove the mn10300 duplicate implementation. Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: John Stultz <[email protected]> Cc: Koichi Yasutake <[email protected]> Cc: Mark Salter <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18MN10300: Remove stale codeThomas Gleixner3-67/+2
mn10300 implements clocksource and clockevents and selects them unconditionally in Kconfig. Remove the stale code which seems to be a leftover of the conversion. Cleanup the configuration switches as well. Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: John Stultz <[email protected]> Cc: Koichi Yasutake <[email protected]> Cc: Mark Salter <[email protected]> Signed-off-by: David Howells <[email protected]>
2011-03-18Merge branch 'next' of ↵Linus Torvalds93-1280/+2097
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (62 commits) powerpc/85xx: Fix signedness bug in cache-sram powerpc/fsl: 85xx: document cache sram bindings powerpc/fsl: define binding for fsl mpic interrupt controllers powerpc/fsl_msi: Handle msi-available-ranges better drivers/serial/ucc_uart.c: Add of_node_put to avoid memory leak powerpc/85xx: Fix SPE float to integer conversion failure powerpc/85xx: Update sata controller compatible for p1022ds board ATA: Add FSL sata v2 controller support powerpc/mpc8xxx_gpio: simplify searching for 'fsl, qoriq-gpio' compatiable powerpc/8xx: remove obsolete mgsuvd board powerpc/82xx: rename and update mgcoge board support powerpc/83xx: rename and update kmeter1 powerpc/85xx: Workaroudn e500 CPU erratum A005 powerpc/fsl_pci: Add support for FSL PCIe controllers v2.x powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e powerpc/pseries: Disable MSI using new interface if possible powerpc: Enable GENERIC_HARDIRQS_NO_DEPRECATED. powerpc: core irq_data conversion. powerpc: sysdev/xilinx_intc irq_data conversion. powerpc: sysdev/uic irq_data conversion. ... Fix up conflicts in arch/powerpc/sysdev/fsl_msi.c (due to getting rid of of_platform_driver in arch/powerpc)
2011-03-18x86: Flush TLB if PGD entry is changed in i386 PAE modeShaohua Li2-10/+4
According to intel CPU manual, every time PGD entry is changed in i386 PAE mode, we need do a full TLB flush. Current code follows this and there is comment for this too in the code. But current code misses the multi-threaded case. A changed page table might be used by several CPUs, every such CPU should flush TLB. Usually this isn't a problem, because we prepopulate all PGD entries at process fork. But when the process does munmap and follows new mmap, this issue will be triggered. When it happens, some CPUs keep doing page faults: http://marc.info/?l=linux-kernel&m=129915020508238&w=2 Reported-by: Yasunori Goto<[email protected]> Tested-by: Yasunori Goto<[email protected]> Reviewed-by: Rik van Riel <[email protected]> Signed-off-by: Shaohua Li<[email protected]> Cc: Mallick Asit K <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Andrew Morton <[email protected]> Cc: linux-mm <[email protected]> Cc: stable <[email protected]> LKML-Reference: <1300246649.2337.95.camel@sli10-conroe> Signed-off-by: Ingo Molnar <[email protected]>
2011-03-18x86, dumpstack: Correct stack dump info when frame pointer is availableNamhyung Kim9-30/+33
Current stack dump code scans entire stack and check each entry contains a pointer to kernel code. If CONFIG_FRAME_POINTER=y it could mark whether the pointer is valid or not based on value of the frame pointer. Invalid entries could be preceded by '?' sign. However this was not going to happen because scan start point was always higher than the frame pointer so that they could not meet. Commit 9c0729dc8062 ("x86: Eliminate bp argument from the stack tracing routines") delayed bp acquisition point, so the bp was read in lower frame, thus all of the entries were marked invalid. This patch fixes this by reverting above commit while retaining stack_frame() helper as suggested by Frederic Weisbecker. End result looks like below: before: [ 3.508329] Call Trace: [ 3.508551] [<ffffffff814f35c9>] ? panic+0x91/0x199 [ 3.508662] [<ffffffff814f3739>] ? printk+0x68/0x6a [ 3.508770] [<ffffffff81a981b2>] ? mount_block_root+0x257/0x26e [ 3.508876] [<ffffffff81a9821f>] ? mount_root+0x56/0x5a [ 3.508975] [<ffffffff81a98393>] ? prepare_namespace+0x170/0x1a9 [ 3.509216] [<ffffffff81a9772b>] ? kernel_init+0x1d2/0x1e2 [ 3.509335] [<ffffffff81003894>] ? kernel_thread_helper+0x4/0x10 [ 3.509442] [<ffffffff814f6880>] ? restore_args+0x0/0x30 [ 3.509542] [<ffffffff81a97559>] ? kernel_init+0x0/0x1e2 [ 3.509641] [<ffffffff81003890>] ? kernel_thread_helper+0x0/0x10 after: [ 3.522991] Call Trace: [ 3.523351] [<ffffffff814f35b9>] panic+0x91/0x199 [ 3.523468] [<ffffffff814f3729>] ? printk+0x68/0x6a [ 3.523576] [<ffffffff81a981b2>] mount_block_root+0x257/0x26e [ 3.523681] [<ffffffff81a9821f>] mount_root+0x56/0x5a [ 3.523780] [<ffffffff81a98393>] prepare_namespace+0x170/0x1a9 [ 3.523885] [<ffffffff81a9772b>] kernel_init+0x1d2/0x1e2 [ 3.523987] [<ffffffff81003894>] kernel_thread_helper+0x4/0x10 [ 3.524228] [<ffffffff814f6880>] ? restore_args+0x0/0x30 [ 3.524345] [<ffffffff81a97559>] ? kernel_init+0x0/0x1e2 [ 3.524445] [<ffffffff81003890>] ? kernel_thread_helper+0x0/0x10 -v5: * fix build breakage with oprofile -v4: * use 0 instead of regs->bp * separate out printk changes -v3: * apply comment from Frederic * add a couple of printk fixes Signed-off-by: Namhyung Kim <[email protected]> Acked-by: Peter Zijlstra <[email protected]> Acked-by: Frederic Weisbecker <[email protected]> Cc: Soren Sandmann <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Arnaldo Carvalho de Melo <[email protected]> Cc: Robert Richter <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2011-03-18x86: Clean up csum-copy_64.S a bitIngo Molnar1-120/+120
The many stray whitespaces and other uncleanlinesses made this code almost unreadable to me - so fix those. No changes to the code. Signed-off-by: Ingo Molnar <[email protected]>
2011-03-18x86: Fix common misspellingsLucas De Marchi50-67/+67
They were generated by 'codespell' and then manually reviewed. Signed-off-by: Lucas De Marchi <[email protected]> Cc: [email protected] LKML-Reference: <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2011-03-18Merge branch 'linus' into x86/urgentIngo Molnar213-3965/+5356
Merge reason: Merge upstream commits to avoid conflicts in upcoming patches. Signed-off-by: Ingo Molnar <[email protected]>
2011-03-18Blackfin: ip0x: fix unused variable warningMike Frysinger1-2/+0
The previous commit that changed this code to the common GPIO layers forgot to delete the local and now unused "i" variable. Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: punt unused HDMA masksMike Frysinger5-93/+0
No code uses these, and the short define names are polluting the global namespace where they collide with things like common irq files. So just punt the damned things. If in the future we need HDMA support, we can make a standalone header for these things. Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: wire up new syscallsMike Frysinger2-1/+7
Hook up name_to_handle_at, open_by_handle_at, and clock_adjtime. Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin/ipipe: restore pipeline bits in irqflagsPhilippe Gerum1-10/+77
This patch fixes the Blackfin irqflags to make them I-pipe aware anew, after the introduction of the hard_local_irq_*() API. Signed-off-by: Philippe Gerum <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin/ipipe: fix deferred pipeline sync for the root stagePhilippe Gerum2-3/+14
This patch makes sure to sync the pipeline for the root stage only from the outer interrupt level, when resuming kernel code after an interrupt. This fixes a bug causing EVT15 to be spuriously popped off upon nested interrupts, which in turn would cause the preempted kernel code to resume without supervisor privileges. Signed-off-by: Philippe Gerum <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin/ipipe: upgrade to I-pipe mainlinePhilippe Gerum4-114/+117
This patch introduces Blackfin-specific bits to support the current tip of the interrupt pipeline development, mainly: - 2/3-level interrupt maps (sparse IRQs) - generic virq handling - sysinfo v2 format for ipipe_get_sysinfo() Signed-off-by: Philippe Gerum <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: cpufreq: fix typosMichael Hennerich1-3/+3
No functional changes here. Signed-off-by: Michael Hennerich <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: enable GENERIC_HARDIRQS_NO_DEPRECATEDThomas Gleixner1-0/+1
All chips converted. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: SMP: convert to irq chip functionsMike Frysinger1-1/+5
Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: use accessor functions in show_interrupts()Thomas Gleixner1-4/+6
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: use proper wrapper functions for modifying irq statusThomas Gleixner4-4/+4
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: convert gpio irq_chip to new functionsThomas Gleixner1-44/+48
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: convert mac irq_chip to new functionsThomas Gleixner1-7/+11
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: convert error irq_chip to new functionsThomas Gleixner1-7/+7
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: convert internal irq_chip to new functionsThomas Gleixner1-13/+28
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: convert core irq_chip to new functionsThomas Gleixner1-11/+11
Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: use proper wrappers for irq_descThomas Gleixner1-9/+5
Fixup the open coded access to irq_desc and use the proper wrappers. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: optimize startup codeMike Frysinger1-69/+41
Take advantage of more Blackfin-specific insns, and only initialize registers required by the ABI. Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: SMP: work around anomaly 05000491Sonic Zhang8-12/+74
In order to safely work around anomaly 05000491, we have to execute IFLUSH from L1 instruction sram. The trouble with multi-core systems is that all L1 sram is visible only to the active core. So we can't just place the functions into L1 and call it directly. We need to setup a jump table and place the entry point in external memory. This will call the right func based on the active core. In the process, convert from the manual relocation of a small bit of code into Core B's L1 to the more general framework we already have in place for loading arbitrary pieces of code into L1. Signed-off-by: Sonic Zhang <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: SMP: implement cpu_freq supportGraf Yang6-34/+70
Re-use some of the existing cpu hotplugging code in the process. Signed-off-by: Graf Yang <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: split optimization settings moreMike Frysinger3-15/+47
We need to place icache flush funcs into L1 inst sram to work around a hardware anomaly. But this currently breaks SMP support as the L1 inst sram is per-core and cannot be called directly. So in preparation for making that work, split the two options. Further, split out the SMP depend so that we can allow some for SMP. Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: SMP: disable preempt with smp_processor_id to send messagesSonic Zhang1-6/+8
The smp_processor_id() API requires that preempt be disabled when calling it, so make sure it is when we go to send messages to other processors. Signed-off-by: Sonic Zhang <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: SMP: delay enabling caches until CPU is initializedsteven miao1-2/+2
Defer bfin_setup_caches(cpu) to avoid unexpected faults due to the cpu state not yet being fully initialized. Signed-off-by: steven miao <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: SMP: use standard cache functionsMike Frysinger1-3/+3
Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: SMP: PERCPU section should be PAGE alignedsteven miao1-1/+1
Common code checks the alignment of some of the variables and calls BUG() if they aren't page aligned. Signed-off-by: steven miao <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: ADI boards: enable pseudo debug insns supportMike Frysinger11-0/+11
We use these insns when testing, so enable them by default for all of our development boards. Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: kgdb: drop dead KGDB_THR_PROC_SWAP for SMP systemsSonic Zhang1-4/+0
Common code no longer defines this, so stop using it. Signed-off-by: Sonic Zhang <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: dnp5370: drop MMC card detect supportAndreas Schallenberg1-20/+0
The board doesn't actually have a pin hooked up to do card detection, so punt the code for it. Signed-off-by: Andreas Schallenberg <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: add bfin_write_{or,and} helpersMike Frysinger1-2/+14
Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: bf548-ezkit: add CAN1 supportAaron Wu1-7/+48
Signed-off-by: Aaron Wu <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: bf54x: add kconfig for UART2/3 DMA channel assignmentssteven miao4-21/+102
The BF54x lacks dedicated DMA channels for the UART peripherals and need to be muxed between others. So add a kconfig option so people can select which channels the UARTs will use so they can pick between SPORTs and the less commonly used EPPI/PIXC peripherals. Signed-off-by: steven miao <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-03-18Blackfin: SMP: avoid section mismatch warningsSonic Zhang1-1/+1
Since coreb_trampoline_start() calls coreb_start(), they need to be in the same section. Signed-off-by: Sonic Zhang <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
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