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into arm/dt
ARM64: DT: Hisilicon SoCs DT updates for 5.2
* Hi3660 SoC and related boards:
- Added DMA support for the uart nodes
- Added the asp DMA controller node
- Replaced dma-min-chan with dma-channel-mask to follow the binding
* Hi3670 SoC and related boards:
- Reused Hi3660 reset to support Hi3670, updated the binding
document and added dts node
- Reused Hi3660 MMC controller to support Hi3670, updated the
binding document and added related nodes to support SD and WiFi
for the SoC and hikey970 board
- Added UFS controller node
* tag 'hisi-arm64-dt-for-5.2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: hi3670: Add UFS controller support
arm64: dts: hi3660: Fixup unofficial dma-min-chan to dma-channel-mask
arm64: dts: hi3660: Add hisi asp dma device
arm64: dts: hi3660: Add dma to uart nodes
arm64: dts: hisilicon: hikey970: Add SD and WiFi support
arm64: dts: hisilicon: hi3670: Add MMC controller support
dt-bindings: mmc: Add HI3670 MMC controller binding
arm64: dts: hisilicon: hi3670: Add reset controller support
dt-bindings: reset: Add HI3670 reset controller binding
Signed-off-by: Olof Johansson <[email protected]>
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arm/dt
arm64: dts: zynqmp: DT changes for v5.2
- Align xlnx-zynqmp-clk.h file name and separate
binding for clock driver
- Add TI quirks to zynqmp boards
* tag 'zynqmp-dt-for-v5.2' of https://github.com/Xilinx/linux-xlnx:
arm64: zynqmp: dt: Add TI PHY quirk
dt-bindings: xilinx: Separate clock binding from firmware doc
include: dt-binding: clock: Rename zynqmp header file
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.2
1. Use proper clock rates for GSCALER module on TM2 boards.
2. Add clocks for local paths on DECON and GSCALER modules of
Exynos5433.
3. Add Slim SecuritySubSystem to Exynos5433.
* tag 'samsung-dt64-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add SlimSSS to Exynos5433
arm64: dts: exynos: add DSD/GSD clocks to DECONs and GSCALERs of Exynos5433
arm64: dts: exynos: configure GSCALER related clocks on TM2
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.2
1. Use proper ADC on Exynos4412.
2. Extend the Exynos5420 Arndale Octa board with: CPU cooling maps,
unused regulators, ADC and UHS-I SD card support. Beside that adjust
regulators to proper level and add always-on when needed.
3. Extend the Exynos5260: high speed I2C and proper external interrupts.
Also fix shared external interrupt line and use better PLL for MMC
clocks.
4. Fix audio recording (broken around v5.1) and microphone recording
(since v4.14) on Exynos5422 Odroid XU3 boards.
5. Minor cleanups (stdout-path and bootargs).
* tag 'samsung-dt-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Remove console argument from bootargs
ARM: dts: exynos: Use stdout-path property instead of console in bootargs
ARM: dts: exynos: Fix spelling mistake of EXYNOS5420
ARM: dts: exynos: Fix audio (microphone) routing on Odroid XU3
ARM: dts: exynos: Always enable necessary APIO_1V8 and ABB_1V8 regulators on Arndale Octa
ARM: dts: exynos: Extend the eMMC node on Arndale Octa
ARM: dts: exynos: Add support for UHS-I SD cards on Arndale Octa
ARM: dts: exynos: Adjust ldo23 and ldo27 to lower levels on Arndale Octa
ARM: dts: exynos: Fix audio routing on Odroid XU3
ARM: dts: exynos: Enable ADC on Arndale Octa
ARM: dts: exynos: Fix interrupt for shared EINTs on Exynos5260
ARM: dts: exynos: Add interrupts for dedicated EINTs on Exynos5260
ARM: dts: exynos: Add high speed I2C ports for Exynos5260
ARM: dts: exynos: Use bustop PLL as the source for MMC clocks on Exynos5260
ARM: dts: exynos: Order nodes alphabetically in Arndale Octa
ARM: dts: exynos: Add CPU cooling on Arndale Octa
ARM: dts: exynos: Add unused PMIC regulators on Arndale Octa board
ARM: dts: exynos: Use stdout path property on Arndale Octa board
ARM: dts: exynos: Document regulator used by ADC on Odroid U3
ARM: dts: exynos: Use ADC for Exynos4x12 on Exynos4412
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.2, round 1
Highlights:
----------
MPU part:
- Add initial support of stm32mp157a-dk1 board:
This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
and 512MB of DDR3. Several connections are available on this boards:
4*USB2.0, 1*USB2.0 typeC, SDcard, RJ45, HDMI, Arduino connector, ...
- Add initial support of stm32mp157c-dk2 board:
This board is a "super-set" of stm32mp157a-dk1. It embeds a STM32MP157c SOC
with AC package (TFBGA361, 148 ios) and 512MB of DDR3. Same connections
than stm32mp157a-dk1 board are available. Display panel (otm8009a) and
Murata wifi/BT combo is added.
- Add and enable SD card support (MMCI variant) on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
- Add and enable PMIC support (STPMIC1 chip) on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
- Add and enable IPCC mailbox support on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
- Add sysconfig clock support on stm32mp157c.
- Add romem and temperature calibration support on stm32mp157c.
- Add SPDIFRX support on stm32mp157c.
- Enable CEC on stm32mp157a-dk1/dk2.
MCU part:
- Add and enable SD card support (MMCI variant) on stm32h743 eval and disco
boards.
- Add romem and temperature calibration support on stm32f429
(and so stm32f469).
- Enable stm32f769 clock driver
* tag 'stm32-dt-for-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits)
ARM: dts: stm32: enable cec on stm32mp157a-dk1 board
ARM: dts: stm32: add cec pins muxing on stm32mp157
ARM: dts: stm32: add ltdc pins muxing on stm32mp157
ARM: dts: stm32: add I2C sleep pins muxing on stm32mp157
ARM: dts: stm32: add power supply of otm8009a on stm32mp157c-dk2
ARM: dts: stm32: Enable STM32F769 clock driver
ARM: dts: stm32: add stpmic1 support on stm32mp157a dk1 board
ARM: dts: stm32: add stpmic1 support on stm32mp157c ed1 board
ARM: dts: stm32: add spdfirx pins to stm32mp157c
ARM: dts: stm32: add spdifrx support on stm32mp157c
ARM: dts: stm32: Add romem and temperature calibration on stm32f429
ARM: dts: stm32: Add romem and temperature calibration on stm32mp157c
ARM: dts: stm32: Add clock on stm32mp157c syscfg
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157a-dk1
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157c-ed1
ARM: dts: stm32: add IPCC mailbox support on STM32MP157c
ARM: dts: stm32: add sdmmc1 support on stm32mp157a dk1 board
ARM: dts: stm32: add sdmmc1 support on stm32mp157c ed1 board
ARM: dts: stm32: add sdmmc1 support on stm32mp157c
ARM: dts: stm32: add sdmmc1 support on stm32h743i disco board
...
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt
ASPEED device tree updates for 5.2
- RTC and GFX DRM driver went upstream this cycle
- Miscellaneous board updates for Facebook and IBM BMCs
* tag 'aspeed-5.2-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add RTC node
ARM: dts: aspeed: witherspoon: Update BMC partitioning
ARM: dts: aspeed: cmm: enable iio-hwmon-adc
ARM: dts: aspeed: tiogapass: Enable VUART
ARM: dts: aspeed-g5: Add video engine
ARM: dts: aspeed: Enable the GFX IP
ARM: dts: aspeed-g5: Add resets and clocks to GFX node
ARM: dts: aspeed: witherspoon: Enable vhub
ARM: dts: aspeed: palmetto: Fix flash_memory region
ARM: dts: aspeed: ast2500: Update flash layout
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt
Renesas ARM64 Based SoC DT Updates for v5.2
* R-Car Gen3 SoC based Salvator-X and Salvator-XS boards
- Add GPIO keys support
- Sort rwdt node alphabetically
* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
- Use extended audio DMAC register
* R-Car M3-W (r8a7796) SoC
- Remove unneeded sound #address/size-cells
* R-Car M3-N (r8a77965) SoC
- Add SSIU support for audio
* R-Car E3 (r8a77990) and RZ/G2E (r8a774c0) SoCs
- Remove invalid compatible value for CSI40
* R-Car E3 (r8a77990) SoC
- Cprrect SPDX license identifier style
* R-Car E3 (r8a77990) based Ebisu board
- Add BD9571 PMIC with DDR0 backup power config
- Correct adv7482 hexadecimal register address
- Add GPIO expander
* R-Car E3 (r8a77990) based Ebisu and D3 (r8a77995) based Draak boards
- Update bootargs to bring them into line with other R-Car Gen3 boards
- Enable LVDS1 encoder
* R-Car D3 (r8a77995) based Draak board
- Correct EthernetAVB phy mode
- Enable CAN0 and CAN1
* RZ/G2E (r8a774c0) SoC
- Add CANFD support
- Correct CPU node style
* RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1) SoCs
- Add clkp2 clock to CAN nodes
* RZ/G2E (r8a774c0) based EK874 board
- Add LED, CAN and RTC support
* tag 'renesas-arm64-dt-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (26 commits)
arm64: dts: renesas: salvator-common: Add GPIO keys support
arm64: dts: renesas: use extended audio dmac register
arm64: dts: renesas: r8a77995: draak: Fix EthernetAVB phy mode to rgmii
arm64: dts: renesas: salvator-common: Sort node label
arm64: dts: renesas: Update Ebisu and Draak bootargs
arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes
arm64: dts: renesas: r8a774c0: Add CANFD support
arm64: dts: renesas: r8a774a1: Add clkp2 clock to CAN nodes
arm64: dts: renesas: ebisu: Add PMIC DDR0 Backup Power config
arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC
arm64: dts: renesas: r8a77990: Remove invalid compatible value for CSI40
arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40
arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1
arm64: dts: renesas: r8a774c0-cat874: Add RWDT support
arm64: dts: renesas: ebisu: Enable VIN5
arm64: dts: renesas: r8a774c0-cat874: Add LEDs support
arm64: dts: renesas: r8a774c0-cat874: add RTC support
arm64: dts: renesas: cat875: Add CAN support
arm64: dts: renesas: r8a774c0: Fix cpu nodes style
arm64: dts: renesas: r8a77965: add SSIU support for sound
...
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Core new soc features are hdmi-cec for rk3328, scheduler capacity-values
and emmc cleanups for rk3399. New boards are the OrangePi (rk3399) and
NanoPi NEO4. Both the OrangePi as well as the NanoPC/Pie family also
directly got some additional features added after the boards itself.
The Rock960 family (rock960+ficus) got their power-tree cleaned to match
the schematics and also got hdmi-audio and their gpu enabled.
Mali support also got enabled on the RockPi4 and finally both
rk3328-rock64 and rk3328-roc-cc got some additional features.
* tag 'v5.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (23 commits)
arm64: dts: rockchip: Decrease emmc-phy's drive impedance on rk3399-puma
arm64: dts: rockchip: Define drive-impedance-ohm for RK3399's emmc-phy.
arm64: dts: rockchip: Disable DCMDs on RK3399's eMMC controller.
arm64: dts: rockchip: Add nanopi4 ethernet phy
arm64: dts: rockchip: Add PWM fan for NanoPC-T4
arm64: dts: rockchip: Add the fusb typec manager to rk3399-orangepi
arm64: dts: rockchip: Specify vid supply for the rk3399-orangepi compass (AK09911)
arm64: dts: rockchip: Fix clock names and add missing supplies for bluetooth on rk3399-orangepi
arm64: dts: rockchip: Add 12V DCIN regulator to rk3399-ficus
arm64: dts: rockchip: Rename vcc_sys into vcc5v0_sys on rk3399-rock960
arm64: dts: rockchip: Add Nanopi NEO4 initial support
arm64: dts: rockchip: enable hdmi audio out for rk3399-rockpro64
arm64: dts: rockchip: Add support for the Orange Pi RK3399 board.
arm64: dts: rockchip: enable mali on rock960 boards
arm64: dts: rockchip: enable mali on Rock Pi 4
arm64: dts: rockchip: add rk3328-roc-cc cpu-supply entries for all cpu nodes
arm64: dts: rockchip: give some life to the rk3328-roc-cc leds
arm64: dts: rockchip: add #sound-dai-cells to HDMI of rk3328
arm64: dts: rockchip: add ir-receiver node on rk3328-rock64
arm64: dts: rockchip: add leds node on rk3328-rock64
...
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Quite a bit of love for the rk3288-veyron chromeos devices and a number
of cleanups for rk3288 from that area, hdmi support for the old rk3066
a small rv1108-eglin-r1 cleanup and wifi+hdmi-cec for the tinker board.
* tag 'v5.2-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable vop0 and hdmi nodes to rk3066a-mk808
ARM: dts: rockchip: add rk3066 hdmi nodes
ARM: dts: rockchip: Add device tree for rk3288-veyron-mighty
dt-bindings: ARM: dts: rockchip: Add bindings for rk3288-veyron-mighty
ARM: dts: rockchip: Add vdd_logic to rk3288-veyron
ARM: dts: rockchip: Add dvs-gpios to rk3288-veyron-jerry
ARM: dts: rockchip: Add rk3288-veyron-jerry rev 10-15
dt-bindings: ARM: dts: rockchip: Add rk3288-veyron-jerry rev 10-15
ARM: dts: rockchip: Fix gic/efuse sort ordering for rk3288
ARM: dts: rockchip: Enable WiFi on rk3288-tinker
ARM: dts: rockchip: add grf reference in rk3288 tsadc node
ARM: dts: rockchip: Enable HDMI CEC on rk3288-tinker-s
ARM: dts: rockchip: remove disable-wp from rv1108-elgin-r1 emmc node
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: Amlogic updates for v5.2
- add GPIO line names for odroid-c1 boards
- support internal clock measure driver
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: add the GPIO line names
ARM: dts: meson8b: add the internal clock measurer
ARM: dts: meson8: add the internal clock measurer
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: Amlogic updates for v5.2
Highlights
- new board: SEI Robotics 510, based on S905X2 SoC (G12A)
- enable more periphearls for S905X2 based boards
* tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: meson-g12a: Add CMA reserved memory
arm64: dts: meson-g12a-x96-max: Enable BT Module
arm64: dts: meson-g12a-x96-max: add regulators
arm64: dts: meson-g12a-sei510: add regulators
arm64: dts: meson-g12a-x96-max: add uart_AO pinctrl
arm64: dts: meson-g12a-sei510: add uart_AO pinctrl
arm64: dts: meson-g12a-u200: add uart_AO pinctrl
arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
arm64: dts: meson: g12a: add reset controller
arm64: dts: meson: g12a: add uart_ao_a pinctrl
arm64: dts: meson: g12a: add pinctrl support controllers
arm64: dts: meson: g12a: Add AO Clock + Reset Controller support
arm64: dts: meson-gxm-nexbox-a1: Enable USB
arm64: dts: meson: g12a: add efuse
arm64: dts: meson: g12a: add secure monitor
arm64: dts: meson-gxl-s905d-phicomm-n1: add status LED
arm64: dts: meson-g12a: Add AO Secure node
arm64: dts: Add SEI Robotics SEI510 Board
vendor-prefixes: Add prefix for Shenzhen SEI Robotics Co., Ltd
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/defconfig
ARM: defconfig: Amlogic updates for v5.2
- multi_v7_defconfig: enable the Amlogic Meson ADC and eFuse drivers
* tag 'amlogic-defconfig' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: multi_v7_defconfig: enable the Amlogic Meson ADC and eFuse drivers
Signed-off-by: Olof Johansson <[email protected]>
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Pull ARM fixes from Russell King:
"A small number of ARM fixes
- Fix function tracer and unwinder dependencies so that we don't end
up building kernels that will crash
- Fix ARMv7M nommu initialisation (missing register initialisation)
- Fix EFI decompressor entry (ensuring barrier instructions are
enabled prior to use)"
* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache
ARM: 8856/1: NOMMU: Fix CCR register faulty initialization when MPU is disabled
ARM: fix function graph tracer and unwinder dependencies
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git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
"A one-liner to make our Radix MMU support depend on HUGETLB_PAGE. We
use some of the hugetlb inlines (eg. pud_huge()) when operating on the
linear mapping and if they're compiled into empty wrappers we can
corrupt memory.
Then two fixes to our VFIO IOMMU code. The first is not a regression
but fixes the locking to avoid a user-triggerable deadlock.
The second does fix a regression since rc1, and depends on the first
fix. It makes it possible to run guests with large amounts of memory
again (~256GB).
Thanks to Alexey Kardashevskiy"
* tag 'powerpc-5.1-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/mm_iommu: Allow pinning large regions
powerpc/mm_iommu: Fix potential deadlock
powerpc/mm/radix: Make Radix require HUGETLB_PAGE
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Daniel Borkmann says:
====================
pull-request: bpf-next 2019-04-28
The following pull-request contains BPF updates for your *net-next* tree.
The main changes are:
1) Introduce BPF socket local storage map so that BPF programs can store
private data they associate with a socket (instead of e.g. separate hash
table), from Martin.
2) Add support for bpftool to dump BTF types. This is done through a new
`bpftool btf dump` sub-command, from Andrii.
3) Enable BPF-based flow dissector for skb-less eth_get_headlen() calls which
was currently not supported since skb was used to lookup netns, from Stanislav.
4) Add an opt-in interface for tracepoints to expose a writable context
for attached BPF programs, used here for NBD sockets, from Matt.
5) BPF xadd related arm64 JIT fixes and scalability improvements, from Daniel.
6) Change the skb->protocol for bpf_skb_adjust_room() helper in order to
support tunnels such as sit. Add selftests as well, from Willem.
7) Various smaller misc fixes.
====================
Signed-off-by: David S. Miller <[email protected]>
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There are several identical spelling mistakes in warning messages,
fix these.
Signed-off-by: Colin Ian King <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar:
- Fix an early boot crash in the RSDP parsing code by effectively
turning off the parsing call - we ran out of time but want to fix the
regression. The more involved fix is being worked on.
- Fix a crash that can trigger in the kmemlek code.
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/mm: Fix a crash with kmemleak_scan()
x86/boot: Disable RSDP parsing temporarily
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fix from Ingo Molnar:
"A cstate event enumeration fix for Kaby/Coffee Lake CPUs"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel: Update KBL Package C-state events to also include PC8/PC9/PC10 counters
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The not-so-recent change to move VMX's VM-Exit handing to a dedicated
"function" unintentionally exposed KVM to a speculative attack from the
guest by executing a RET prior to stuffing the RSB. Make RSB stuffing
happen immediately after VM-Exit, before any unpaired returns.
Alternatively, the VM-Exit path could postpone full RSB stuffing until
its current location by stuffing the RSB only as needed, or by avoiding
returns in the VM-Exit path entirely, but both alternatives are beyond
ugly since vmx_vmexit() has multiple indirect callers (by way of
vmx_vmenter()). And putting the RSB stuffing immediately after VM-Exit
makes it much less likely to be re-broken in the future.
Note, the cost of PUSH/POP could be avoided in the normal flow by
pairing the PUSH RAX with the POP RAX in __vmx_vcpu_run() and adding an
a POP to nested_vmx_check_vmentry_hw(), but such a weird/subtle
dependency is likely to cause problems in the long run, and PUSH/POP
will take all of a few cycles, which is peanuts compared to the number
of cycles required to fill the RSB.
Fixes: 453eafbe65f7 ("KVM: VMX: Move VM-Enter + VM-Exit handling to non-inline sub-routines")
Reported-by: Rick Edgecombe <[email protected]>
Signed-off-by: Rick Edgecombe <[email protected]>
Co-developed-by: Sean Christopherson <[email protected]>
Signed-off-by: Sean Christopherson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
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Since ARMv8.1 supplement introduced LSE atomic instructions back in 2016,
lets add support for STADD and use that in favor of LDXR / STXR loop for
the XADD mapping if available. STADD is encoded as an alias for LDADD with
XZR as the destination register, therefore add LDADD to the instruction
encoder along with STADD as special case and use it in the JIT for CPUs
that advertise LSE atomics in CPUID register. If immediate offset in the
BPF XADD insn is 0, then use dst register directly instead of temporary
one.
Signed-off-by: Daniel Borkmann <[email protected]>
Acked-by: Jean-Philippe Brucker <[email protected]>
Acked-by: Will Deacon <[email protected]>
Signed-off-by: Alexei Starovoitov <[email protected]>
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Prefetch-with-intent-to-write is currently part of the XADD mapping in
the AArch64 JIT and follows the kernel's implementation of atomic_add.
This may interfere with other threads executing the LDXR/STXR loop,
leading to potential starvation and fairness issues. Drop the optional
prefetch instruction.
Fixes: 85f68fe89832 ("bpf, arm64: implement jiting of BPF_XADD")
Reported-by: Will Deacon <[email protected]>
Signed-off-by: Daniel Borkmann <[email protected]>
Acked-by: Jean-Philippe Brucker <[email protected]>
Acked-by: Will Deacon <[email protected]>
Signed-off-by: Alexei Starovoitov <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- keep the tail of an unaligned initrd reserved
- adjust ftrace_make_call() to deal with the relative nature of PLTs
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64/module: ftrace: deal with place relative nature of PLTs
arm64: mm: Ensure tail of unaligned initrd is reserved
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This flag was historically used to indicate that a clk is a "basic" type
of clk like a mux, divider, gate, etc. This never turned out to be very
useful though because it was hard to cleanly split "basic" clks from
other clks in a system. This one flag was a way for type introspection
and it just didn't scale. If anything, it was used by the TI clk driver
to indicate that a clk_hw wasn't contained in the SoC specific clk
structure. We can get rid of this define now that TI is finding those
clks a different way.
Cc: Tero Kristo <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hogan <[email protected]>
Cc: <[email protected]>
Cc: Thierry Reding <[email protected]>
Cc: Kevin Hilman <[email protected]>
Cc: <[email protected]>
Cc: <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Ensure we are always able to detect whether or not the CPU is affected
by SSB, so that we can later advertise this to userspace.
Signed-off-by: Jeremy Linton <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
[will: Use IS_ENABLED instead of #ifdef]
Signed-off-by: Will Deacon <[email protected]>
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Track whether all the cores in the machine are vulnerable to Spectre-v2,
and whether all the vulnerable cores have been mitigated. We then expose
this information to userspace via sysfs.
Signed-off-by: Jeremy Linton <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
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Ensure we are always able to detect whether or not the CPU is affected
by Spectre-v2, so that we can later advertise this to userspace.
Signed-off-by: Jeremy Linton <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
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The SMCCC ARCH_WORKAROUND_1 service can indicate that although the
firmware knows about the Spectre-v2 mitigation, this particular
CPU is not vulnerable, and it is thus not necessary to call
the firmware on this CPU.
Let's use this information to our benefit.
Signed-off-by: Marc Zyngier <[email protected]>
Signed-off-by: Jeremy Linton <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
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We currently have a list of CPUs affected by Spectre-v2, for which
we check that the firmware implements ARCH_WORKAROUND_1. It turns
out that not all firmwares do implement the required mitigation,
and that we fail to let the user know about it.
Instead, let's slightly revamp our checks, and rely on a whitelist
of cores that are known to be non-vulnerable, and let the user know
the status of the mitigation in the kernel log.
Signed-off-by: Marc Zyngier <[email protected]>
Signed-off-by: Jeremy Linton <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Suzuki K Poulose <[email protected]>
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
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We implement page table isolation as a mitigation for meltdown.
Report this to userspace via sysfs.
Signed-off-by: Jeremy Linton <[email protected]>
Reviewed-by: Suzuki K Poulose <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
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spectre-v1 has been mitigated and the mitigation is always active.
Report this to userspace via sysfs
Signed-off-by: Mian Yousaf Kaukab <[email protected]>
Signed-off-by: Jeremy Linton <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
Acked-by: Suzuki K Poulose <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
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There are various reasons, such as benchmarking, to disable spectrev2
mitigation on a machine. Provide a command-line option to do so.
Signed-off-by: Jeremy Linton <[email protected]>
Reviewed-by: Suzuki K Poulose <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
Cc: Jonathan Corbet <[email protected]>
Cc: [email protected]
Signed-off-by: Will Deacon <[email protected]>
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Returning an error code from futex_atomic_cmpxchg_inatomic() indicates
that the caller should not make any use of *uval, and should instead act
upon on the value of the error code. Although this is implemented
correctly in our futex code, we needlessly copy uninitialised stack to
*uval in the error case, which can easily be avoided.
Signed-off-by: Will Deacon <[email protected]>
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Our futex implementation makes use of LDXR/STXR loops to perform atomic
updates to user memory from atomic context. This can lead to latency
problems if we end up spinning around the LL/SC sequence at the expense
of doing something useful.
Rework our futex atomic operations so that we return -EAGAIN if we fail
to update the futex word after 128 attempts. The core futex code will
reschedule if necessary and we'll try again later.
Cc: <[email protected]>
Fixes: 6170a97460db ("arm64: Atomic operations")
Signed-off-by: Will Deacon <[email protected]>
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Rather embarrassingly, our futex() FUTEX_WAKE_OP implementation doesn't
explicitly set the return value on the non-faulting path and instead
leaves it holding the result of the underlying atomic operation. This
means that any FUTEX_WAKE_OP atomic operation which computes a non-zero
value will be reported as having failed. Regrettably, I wrote the buggy
code back in 2011 and it was upstreamed as part of the initial arm64
support in 2012.
The reasons we appear to get away with this are:
1. FUTEX_WAKE_OP is rarely used and therefore doesn't appear to get
exercised by futex() test applications
2. If the result of the atomic operation is zero, the system call
behaves correctly
3. Prior to version 2.25, the only operation used by GLIBC set the
futex to zero, and therefore worked as expected. From 2.25 onwards,
FUTEX_WAKE_OP is not used by GLIBC at all.
Fix the implementation by ensuring that the return value is either 0
to indicate that the atomic operation completed successfully, or -EFAULT
if we encountered a fault when accessing the user mapping.
Cc: <[email protected]>
Fixes: 6170a97460db ("arm64: Atomic operations")
Signed-off-by: Will Deacon <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into for-next/mitigations
Pull in core support for the "mitigations=" cmdline option from Thomas
Gleixner via -tip, which we can build on top of when we expose our
mitigation state via sysfs.
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In order to be able to sign the bzImage independent of the block size
of the IPL device, align the bzImage to 4096 bytes.
Signed-off-by: Martin Schwidefsky <[email protected]>
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PR: Adjusted to the use in kexec_file later.
Signed-off-by: Martin Schwidefsky <[email protected]>
Signed-off-by: Philipp Rudo <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
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Read the IPL Report block provided by secure-boot, add the entries
of the certificate list to the system key ring and print the list
of components.
PR: Adjust to Vasilys bootdata_preserved patch set. Preserve ipl_cert_list
for later use in kexec_file.
Signed-off-by: Martin Schwidefsky <[email protected]>
Signed-off-by: Philipp Rudo <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
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To transport the information required for secure boot a new IPL report
will be created at boot time. It will be written to memory right after
the IPL parameter block. To work with the IPL report a couple of
additional structure definitions are added the the uapi/ipl.h header.
Signed-off-by: Martin Schwidefsky <[email protected]>
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The IPL parameter block is used as an interface between Linux and
the machine to query and change the boot device and boot options.
To be able to create IPL parameter block in user space and pass it
as segment to kexec provide an uapi header with proper structure
definitions for the block.
Signed-off-by: Martin Schwidefsky <[email protected]>
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The ipl_info union in struct ipl_parameter_block has the same name as
the struct ipl_info. This does not help while reading the code and the
union in struct ipl_parameter_block does not need to be named. Drop
the name from the union.
Reviewed-by: Hendrik Brueckner <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
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Move flush_tlb_info variables off the stack. This allows to align
flush_tlb_info to cache-line and avoid potentially unnecessary cache
line movements. It also allows to have a fixed virtual-to-physical
translation of the variables, which reduces TLB misses.
Use per-CPU struct for flush_tlb_mm_range() and
flush_tlb_kernel_range(). Add debug assertions to ensure there are
no nested TLB flushes that might overwrite the per-CPU data. For
arch_tlbbatch_flush() use a const struct.
Results when running a microbenchmarks that performs 10^6 MADV_DONTEED
operations and touching a page, in which 3 additional threads run a
busy-wait loop (5 runs, PTI and retpolines are turned off):
base off-stack
---- ---------
avg (usec/op) 1.629 1.570 (-3%)
stddev 0.014 0.009
Signed-off-by: Nadav Amit <[email protected]>
Acked-by: Peter Zijlstra <[email protected]>
Cc: Andy Lutomirski <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: Brian Gerst <[email protected]>
Cc: Dave Hansen <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Rik van Riel <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>
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Signed-off-by: Ingo Molnar <[email protected]>
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We do track the current steal time of the host CPUs. Let us use
this value to disable halt polling if the steal time goes beyond
a configured value.
Signed-off-by: Christian Borntraeger <[email protected]>
Acked-by: Paolo Bonzini <[email protected]>
Reviewed-by: Cornelia Huck <[email protected]>
Signed-off-by: Christian Borntraeger <[email protected]>
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Alexei Starovoitov says:
====================
pull-request: bpf 2019-04-25
The following pull-request contains BPF updates for your *net* tree.
The main changes are:
1) the bpf verifier fix to properly mark registers in all stack frames, from Paul.
2) preempt_enable_no_resched->preempt_enable fix, from Peter.
3) other misc fixes.
====================
Signed-off-by: David S. Miller <[email protected]>
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Add 'xo_board' as ref clock for the DSI PHY, it was previously
hardcoded in the PLL 'driver' for the 28nm 8960 PHY.
Signed-off-by: Matthias Kaehlcke <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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The thermal core restricts names of thermal zones to under 20
characters. Fix the names for a couple of msm8998 thermal zones.
Signed-off-by: Amit Kucheria <[email protected]>
Tested-by: Marc Gonzalez <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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msm8998 has 22 sensors connected in total, 14 on the 1st controller, 8
on the 2nd controller. Increase the number to allow sensors with ID 12
and 13 to be registered.
Signed-off-by: Amit Kucheria <[email protected]>
Tested-by: Marc Gonzalez <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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The msm8998-mtp doesn't have TSENS-based sensors wired up for skin and
battery thermal zones. TSENS sensors should be common across all boards
using the SoC and shouldn't be board-specific as these entries.
They also show the following error when trying to read the temperature
cat: read error: Invalid argument
Remove these board-specific erroneous thermal zones.
Fixes: 4449b6f248d9 ("arm64: dts: qcom: msm8998: Add tsens and thermal-zones")
Signed-off-by: Amit Kucheria <[email protected]>
Tested-by: Marc Gonzalez <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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Two easy cases of overlapping changes.
Signed-off-by: David S. Miller <[email protected]>
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