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Since the locks are used from interrupt context we need the
irqsave/irqrestore versions of the locking functions.
Signed-off-by: David Daney <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Chris Dearman <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Chris Dearman <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Chris Dearman <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Chris Dearman ([email protected])
Signed-off-by: Ralf Baechle <[email protected]>
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This patch ensures that the sign bit is always updated for NaN operands.
Signed-off-by: Chris Dearman <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Chris Dearman <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Based on original patch by Chris Dearman <[email protected]>.
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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This fixes the remaining problems introduced by
f197465384bf7ef1af184c2ed1a4e268911a91e3 (incorrect access length &
byteswapping in bigendian mode)
Signed-off-by: Chris Dearman <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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On an SMP system with cache aliases, the following sequence of events may
happen:
1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a
temporary mapping in the fixmap region
2) copy_page() starts on CPU0
3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page()
4) CPU0 takes the interrupt, interrupting copy_page()
5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again
6) The second invocation of kmap_coherent() on CPU0 tries to use the
same fixmap virtual address that was being used by copy_user_highpage()
7) CPU0 throws a machine check exception for the TLB address conflict
Fixed by creating an extra set of fixmap entries for use in interrupt
handlers. This prevents fixmap VA conflicts between copy_user_highpage()
running in user context, and local_r4k_flush_cache_page() invoked from an
SMP IPI.
Signed-off-by: Kevin Cernekee <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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This patch checks if the watchdog enable bit is set in the DCL register
meaning that the hardware watchdog actually works and if so, register the
ar7_wdt platform_device.
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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This patch prepares the board code to register a bcm63xx_wdt
platform_device that we are going to use in a subsequent patch.
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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This patch removes the calls to bcm63xx_uart_register in board_bcm963xx.c
and make bcm63xx_uart_register an initfunc. Allows us to remove
bcm63xx_dev_uart.h which was there to make checkpatch.pl happy.
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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This patch fixes the following warning, which becomes an error due to
-Werror to be turned on:
CC arch/mips/alchemy/common/gpiolib-au1000.o
cc1: warnings being treated as errors
arch/mips/alchemy/common/gpiolib-au1000.c: In function 'au1100_gpio2_to_irq':
/home/florian/dev/kernel/linux-queue/arch/mips/include/asm/mach-au1x00/gpio-au1000.h:107: warning: control reaches end of non-void function
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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This patch fixes a lockup on BCM6345 where setting the PLL soft reset bit
will also lock the other blocks including UART. Instead of setting only
the PLL soft reset bit in the software reset register, set this bit but do
not touch the others.
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Error was introduced by commit 0385d1f3d394c6814be0b165c153fc3fc254469a.
Signed-off-by: Ralf Roesch <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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As the commit 3ee4c147 shows, we need to "Add IRQF_TIMER flag for timer
interrupts", Atsushi Nemoto have reported that some other timer interrupts
should be considered, Here it is.
Acked-by: Thomas Gleixner <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
Signed-off-by: Wu Zhangjin <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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An o32 aplication passes a 64-bit value in a pair of registers; a 64-bit
kernel expects a 64-bit argument in a single register.
Signed-off-by: Chen Jie <[email protected]>
Signed-off-by: Hu Hongbing <[email protected]>
Signed-off-by: Wu Zhangjin <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
Reported-by: Josip Rodin <[email protected]>
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Along the lines of d6c585a4342a2ff627a29f9aea77c5ed4cd76023, add IRQF_TIMER
flag for all timer interrupts This ensures that timer interrupts won't be
disabled on suspend and not threaded for PREEMPT_RT.
Signed-off-by: Wu Zhangjin <[email protected]>
Acked-by: Thomas Gleixner <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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That code is executed with irq disabled already, so, remove the redundant
local_irq_disable() here.
Signed-off-by: Wu Zhangjin <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Broken by 182a85f8a119c789610a9d464f4129ded9f3c107.
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: David Daney <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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We've silently been relying on the hardware chopping off excess, reserved
ASID bits for no better reason that it saving an instruction. Because we
already have:
#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK)
in <asm/mmu_context.h>.
We can use a cleanup to avoid writing non-zero bits into the reserved
entryhi bits. This avoid triggering some debugging assertion in the
Cavium simulator.
Signed-off-by: Ralf Baechle <[email protected]>
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Some firmware may pass well over 256 bytes these days.
Signed-off-by: Ralf Baechle <[email protected]>
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Trivial typo.
Signed-off-by: Dave Jones <[email protected]>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <[email protected]>
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This is the fix for proper reboot of Realview ARM1176PB board
when issuing the reboot command. Setting the eighth bit of
control register SYS_RESETCTL to 1 to force a soft reset.
arch_reset() is modified for realview machines to call machine
specific reset function pointers.
Signed-off-by: Philby John <[email protected]>
Acked-by: Catalin Marinas <[email protected]>
Signed-off-by: Russell King <[email protected]>
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* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6:
tty: Mark generic_serial users as BROKEN
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* 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6:
[S390] smp: fix sigp sense handling
[S390] smp: fix sigp stop handling
[S390] cputime: fix overflow on 31 bit systems
[S390] call home: fix string length handling
[S390] call home: fix error handling in init function
[S390] smp: fix prefix handling of offlined cpus
[S390] s/r: cmm resume fix
[S390] call home: fix local buffer usage in proc handler
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There isn't much else I can do with these. I can find no hardware for any
of them and no users. The code is broken.
Signed-off-by: Alan Cox <[email protected]>
Cc: stable <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Signed-off-by: Benjamin Herrenschmidt <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen
* 'bugfix' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen:
xen: set up mmu_ops before trying to set any ptes
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Errata 411920 indicates that any "invalidate entire instruction cache"
operation can fail if the right conditions are present. This is not
limited just to those operations in flush.c, but elsewhere. Place the
workaround in the already existing __flush_icache_all() function
instead.
Signed-off-by: Russell King <[email protected]>
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When SPARSEMEM_EXTREME is enabled, memory_present() wants to use bootmem
to allocate data structures. However, we call memory_present() after
declaring memory to bootmem, but before we've reserved areas.
This leads to sparsemem data structures being overwritten later in the
kernel's initialization (when slab initializes.)
Signed-off-by: Russell King <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: Fix hugetlbfs dependencies for SH-3 && MMU configurations.
sh: Document uImage.bin target in archhelp.
sh: add uImage.bin target
sh: rsk7203 CONFIG_MTD=n fix
sh: Check for return_to_handler when unwinding the stack
sh: Build fix: define more __movmem* symbols
sh: __irq_entry annotate do_IRQ().
Fix up sh/powerpc conflicts in fs/Kconfig
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git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc/ppc64: Use preempt_schedule_irq instead of preempt_schedule
powerpc: Minor cleanup to lib/Kconfig.debug
powerpc: Minor cleanup to sound/ppc/Kconfig
powerpc: Minor cleanup to init/Kconfig
powerpc: Limit memory hotplug support to PPC64 Book-3S machines
powerpc: Limit hugetlbfs support to PPC64 Book-3S machines
powerpc: Fix compile errors found by new ppc64e_defconfig
powerpc: Add a Book-3E 64-bit defconfig
powerpc/booke: Fix xmon single step on PowerPC Book-E
powerpc: Align vDSO base address
powerpc: Fix segment mapping in vdso32
powerpc/iseries: Remove compiler version dependent hack
powerpc/perf_events: Fix priority of MSR HV vs PR bits
powerpc/5200: Update defconfigs
drivers/serial/mpc52xx_uart.c: Use UPIO_MEM rather than SERIAL_IO_MEM
powerpc/boot/dts: drop obsolete 'fsl5200-clocking'
of: Remove nested function
mpc5200: support for the MAN mpc5200 based board mucmc52
mpc5200: support for the MAN mpc5200 based board uc101
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
omap4: Fix UART4 platform data on omap4
omap4: Allow omap_serial_early_init() for OMAP4430 board
omap3: PM: enable UART3 module wakeups
omap2: Fix console serial port number for n8x0
omap2: Fix detection of n8x0
omap1: Fix DSP public peripherals support for ams-delta
omap1: Fix redundant UARTs pin muxing that can break other hardware support
omap: iommu: fix wrong condition check for SUPERSECTION
omap: SDMA: Fix omap_stop_dma() API for channel linking
omap: Fix omap-keypad by restoring old keypad.h without breaking omap2 boards that use matrix_keypad
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* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits)
ARM: Fix lubbock defconfig build
ARM: 5769/1: CPU_ARM920T: remove dead Maverick EP9312 URL
ARM: 5768/1: ep93xx: remove dead code in ep93xx_gpio_ab_irq_handler()
ARM: 5767/1: ep93xx: remove ep93xx_init_time() prototype
ARM: 5765/1: Updated U300 defconfig
ARM: 5766/1: Fix watchdog enabling for AT91SAM9G45
ARM: 5764/1: bcmring: add oprofile pmu support
[ARM] pxa/spitz: add gpio button support (fixes regression)
[ARM] pxa/cm-x300: fix mmc numbering
ARM: 5763/1: ARM: SMP: Fix the BUG with CONFIG_PREEMPT enabled
ARM: 5760/1: ep93xx: fix build error in edb93xx.c
ARM: 5759/1: Add register information of threads to coredump
ARM: 5757/1: Thumb-2: Correct "mov.w pc, lr" instruction which is unpredictable
MXC: fix reset for mx31, mx35 and mx27 SoCs
fix pcm037_eet compilation with the new SPI driver
fix compilation of i.MX31 platforms
pcm970 mmc: Fix ro switch
pcm038: Add SPI/MC13783 support
mx25: Add missing copyright / license header
mx25pdk: remove nand support as it is not present in current tree
...
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
sched: Do less agressive buddy clearing
sched: Disable SD_PREFER_LOCAL for MC/CPU domains
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, UV: Set DELIVERY_MODE=4 for vector=NMI_VECTOR in uv_hub_send_ipi()
x86, UV: Fix and clean up bau code to use uv_gpa_to_pnode()
x86: Don't print number of MCE banks for every CPU
x86, UV: Fix information in __uv_hub_info structure
x86: Document linker script ASSERT() quirk
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syscallno is unsigned
Signed-off-by: Roel Kluin <[email protected]>
Signed-off-by: David Howells <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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sigp sense only returns the status of a cpu if it is non zero. If the
status of the sensed cpu is all zeros condition code 0 (accpeted) is
set and no status bits are returned.
The current code however assumes that a status was returned and tests
bits in it. This means uninitalized data is accessed with random
results.
Worst case is that the code that checks if cpu is offline on cpu
hotplug assumes that the target cpu is offline while it is still
running. This leads potentially to memory corruption since resources
that are still needed by the target cpu will be freed and could be
resused while still in use.
Signed-off-by: Heiko Carstens <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
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According to the architecture a cpu must not necessarily enter stopped
state after completion of a sigp instruction with "stop" order code.
So remove the BUG() statement after self sending sigp stop to avoid
that it ever gets reached.
Also add a sigp busy check to make sure that the order gets delivered.
Signed-off-by: Heiko Carstens <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
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The cputime_to_msecs / cputime_to_clock_t and cputime64_to_clock_t
cause fixpoint divide exceptions if the cputime is too large.
On a machine that collected 49.7 days worth of idle time reading
from /proc/stat will generate oopses like this:
Kernel BUG at 001b0c92 [verbose debug info unavailable]
fixpoint divide exception: 0009 [#13] SMP
Modules linked in: ipv6
CPU: 1 Tainted: G D 2.6.27.10 #5
Process cat (pid: 21352, task: 1fb34138, ksp: 1d2a3d98)
Krnl PSW : 070c2000 801b0c92 (show_stat+0x2ca/0x68c)
R:0 T:1 IO:1 EX:1 Key:0 M:1 W:0 P:0 AS:0 CC:2 PM:0
Krnl GPRS: 00000001 00001388 00000bb8 0015d2a1
00000000 00000000 000003e8 0001fd91
00000000 00000000 0000129d eecd2ff0
1cc533b9 0036f780 801b0bce 1d2a3cc0
Krnl Code: 801b0c86: f18890abf198 mvo 171(9,%r9),408(9,%r15)
801b0c8c: 98abf170 lm %r10,%r11,368(%r15)
801b0c90: 1da1 dr %r10,%r1
>801b0c92: 90abf170 stm %r10,%r11,368(%r15)
801b0c96: 98abf190 lm %r10,%r11,400(%r15)
801b0c9a: 1da1 dr %r10,%r1
801b0c9c: 90abf190 stm %r10,%r11,400(%r15)
801b0ca0: 18a3 lr %r10,%r3
Call Trace:
([<00000000001b09f4>] show_stat+0x2c/0x68c)
[<000000000018dcee>] seq_read+0xb2/0x364
[<00000000001a9980>] proc_reg_read+0x68/0x98
[<00000000001705ee>] vfs_read+0x6e/0xe8
[<0000000000170732>] sys_read+0x36/0x78
[<000000000010f750>] sysc_do_restart+0x12/0x16
[<0000000077f3ad6a>] 0x77f3ad6a
<4>---[ end trace 1436ea9559d3de9e ]---
Reported-by: Mike Frysinger <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
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Offlined cpus still have valid prefix register contents. Dumpers
will store the register contents of a cpu to the location where its
prefix register points to.
For offlined cpus the area (lowcore) has been freed and the dumper
would write the uninteresting contents of the offline cpu to a memory
location which might be in use by some other component and destroy
valueable information.
To fix this set the prefix register of offline cpus to absolute
address zero again. This prevents the current dumpers to write to
random memory locations.
Signed-off-by: Heiko Carstens <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
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