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Signed-off-by: Marin Mitov <[email protected]>
Cc: Joerg Roedel <[email protected]>
Cc: Jesse Brandeburg <[email protected]>
LKML-Reference: <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
======================================================
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* master.kernel.org:/home/rmk/linux-2.6-arm: (25 commits)
ARM: 5728/1: Proper prefetch abort handling on ARMv6 and ARMv7
ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
ARM: 5740/1: fix valid_phys_addr_range() range check
ARM: 5739/1: ARM: allow empty ATAG_CORE
ARM: 5735/1: sa1111: CodingStyle cleanups
ARM: 5738/1: Correct TCM documentation
ARM: 5734/1: arm: fix compilation of entry-common.S for older CPUs
ARM: 5733/1: fix bcmring compile error
ARM: 5732/1: remove redundant include file
ARM: 5731/2: Fix U300 generic GPIO, remove ifdefs from MMCI v3
ARM: Ensure do_cache_op takes mmap_sem
ARM: Fix __cpuexit section mismatch warnings
ARM: Don't allow highmem on SMP platforms without h/w TLB ops broadcast
ARM: includecheck fix: mach-davinci, board-dm365-evm.c
ARM: Remove unused CONFIG SA1100_H3XXX
ARM: Fix warning: unused variable 'highmem'
ARM: Fix warning: #warning syscall migrate_pages not implemented
ARM: Fix SA11x0 clocksource warning
ARM: Fix SA1100 Neponset serial section mismatch
ARM: Fix SA1100 Assabet/Neponset PCMCIA section mismatch warnings
...
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Currently, on ARMv6 and ARMv7, if an application tries to execute
code (or garbage) on non-executable page it hangs. It caused by
incorrect prefetch abort handling. Now every prefetch abort
processes as a translation fault.
To fix this we have to analyze instruction fault status register
to figure out reason why we've got the abort and process it
accordingly.
To make IFSR different from DFSR we set bit 31 which is reserved in
both IFSR and DFSR.
This patch also tries to protect from future hangs on unexpected
exceptions. An application will be killed if unexpected exception
type was received.
Signed-off-by: Kirill A. Shutemov <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.
Now we have three prefetch abort model:
* legacy - for CPUs before ARMv6. They doesn't provide neither
IFSR nor IFAR. We simulate IFSR with section translation fault
status for them to generalize code;
* ARMv6 - provides IFSR, but not IFAR;
* ARMv7 - provides both IFSR and IFAR.
Signed-off-by: Kirill A. Shutemov <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Commit 1522ac3ec95ff0230e7aa516f86b674fdf72866c
("Fix virtual to physical translation macro corner cases")
breaks the end of memory check in valid_phys_addr_range().
The modified expression results in the apparent /dev/mem size
being 2 bytes smaller than what it actually is.
This patch reworks the expression to correctly check the address,
while maintaining use of a valid address to __pa().
Signed-off-by: Greg Ungerer <[email protected]>
Signed-off-by: Russell King <[email protected]>
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From: David Brown <[email protected]>
The ATAG_CORE is allowed to be empty. Although this is handled
by parse_tag_core(), __vet_atags during startup rejects this tag
unless it contains data. Allow the initial tag to be either the
full size, or empty.
Signed-off-by: David Brown <[email protected]>
Signed-off-by: Russell King <[email protected]>
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EXPORT_* macros should follow immediately after the closing function
brace line.
Signed-off-by: H Hartley Sweeten <[email protected]>
Acked-by: Kristoffer Ericson <[email protected]>
Signed-off-by: Russell King <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/djbw/xscaleiop
Conflicts:
MAINTAINERS
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The current bound checks for copy_from_user in the MTRR driver are
not as obvious as they could be, and gcc agrees with that.
This patch simplifies the boundary checks to the point that gcc can
now prove to itself that the copy_from_user() is never going past
its bounds.
Signed-off-by: Arjan van de Ven <[email protected]>
Cc: Yinghai Lu <[email protected]>
Cc: Linus Torvalds <[email protected]>
LKML-Reference: <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
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Make decoding of MCEs happen only on AMD hardware by registering a
non-default callback only on CPU families which support it.
While looking at the interaction of decode_mce() with the other MCE
code i also noticed a few other things and made the following
cleanups/fixes:
- Fixed the mce_decode() weak alias - a weak alias is really not
good here, it should be a proper callback. A weak alias will be
overriden if a piece of code is built into the kernel - not
good, obviously.
- The patch initializes the callback on AMD family 10h and 11h.
- Added the more correct fallback printk of:
No support for human readable MCE decoding on this CPU type.
Transcribe the message and run it through 'mcelog --ascii' to decode.
On CPUs that dont have a decoder.
- Made the surrounding code more readable.
Note that the callback allows us to have a default fallback -
without having to check the CPU versions during the printout
itself. When an EDAC module registers itself, it can install the
decode-print function.
(there's no unregister needed as this is core code.)
version -v2 by Borislav Petkov:
- add K8 to the set of supported CPUs
- always build in edac_mce_amd since we use an early_initcall now
- fix checkpatch warnings
Signed-off-by: Borislav Petkov <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Andi Kleen <[email protected]>
LKML-Reference: <20091001141432.GA11410@aftab>
Signed-off-by: Ingo Molnar <[email protected]>
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Add better support for omitting either the card detect or the write
protect GPIOs if the board does not support it. Add the fields
no_wprotect and no_detect to the platform data which when set indicate the
absence of the respective GPIOs.
Note, this also fixes a minor bug where it tries to free IRQ0 if there is
no detect gpio available.
Signed-off-by: Ben Dooks <[email protected]>
Cc: <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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Add a selection for the data transfer mode of the s3cmci driver, allowing
for either a configuration or rumtime selection of the use of the DMA or
PIO transfer code.
The PIO only mode is 476 bytes smaller than the driver with both methods
compiled in.
Signed-off-by: Ben Dooks <[email protected]>
Cc: <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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Just like ip_fast_csum, the assembly snippet in csum_ipv6_magic needs a
memory clobber, as it is only passed the address of the buffer, not a
memory reference to the buffer itself.
This caused failures in Hurd's pfinetv4 when we tried to compile it with
gcc-4.3 (bogus checksums).
Signed-off-by: Samuel Thibault <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: "H. Peter Anvin" <[email protected]>
Acked-by: "David S. Miller" <[email protected]>
Cc: Andi Kleen <[email protected]>
Cc: <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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Fix some build failures when using gcc-4.x for MN10300.
Firstly, __get_user() fails to build because the pointer points to a const and
__gu_val ends up being read-only:
In file included from include/linux/mempolicy.h:62,
from init/main.c:50:
include/linux/pagemap.h: In function 'fault_in_pages_readable':
include/linux/pagemap.h:394: error: read-only variable '__gu_val' used as 'asm' output
include/linux/pagemap.h:394: error: read-only variable '__gu_val' used as 'asm' output
include/linux/pagemap.h:394: error: read-only variable '__gu_val' used as 'asm' output
include/linux/pagemap.h:400: error: read-only variable '__gu_val' used as 'asm' output
include/linux/pagemap.h:400: error: read-only variable '__gu_val' used as 'asm' output
include/linux/pagemap.h:400: error: read-only variable '__gu_val' used as 'asm' output
make[1]: *** [init/main.o] Error 1
Secondly, gcc-4 doesn't allow casts of lvalues:
UPD include/linux/compile.h
arch/mn10300/kernel/rtc.c: In function 'calibrate_clock':
arch/mn10300/kernel/rtc.c:170: error: lvalue required as left operand of assignment
arch/mn10300/kernel/rtc.c:172: error: lvalue required as left operand of assignment
make[1]: *** [arch/mn10300/kernel/rtc.o] Error 1
These are seen with gcc 4.2.1.
Signed-off-by: Mark Salter <[email protected]>
Signed-off-by: David Howells <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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Revert 45d80eea87c9f8292d2d33173d6866c0ec57238a ("m68k: convert to
asm-generic/hardirq.h") - it fails to compile due to an inclusion tangle:
In file included from include/linux/irq.h:12,
from include/asm-generic/hardirq.h:6,
from /usr/src/devel/arch/m68k/include/asm/hardirq_mm.h:6,
from /usr/src/devel/arch/m68k/include/asm/hardirq.h:4,
from include/linux/hardirq.h:10,
from /usr/src/devel/arch/m68k/include/asm/system_mm.h:69,
from /usr/src/devel/arch/m68k/include/asm/system.h:4,
from include/linux/list.h:7,
from include/linux/preempt.h:11,
from include/linux/spinlock.h:50,
from include/linux/seqlock.h:29,
from include/linux/time.h:8,
from include/linux/timex.h:56,
from include/linux/sched.h:56,
from arch/m68k/kernel/asm-offsets.c:14:
include/linux/smp.h:17: error: field 'list' has incomplete type
Cc: Christoph Hellwig <[email protected]>
Cc: Geert Uytterhoeven <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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[[email protected]: fix KVM]
Signed-off-by: Alexey Dobriyan <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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From: Christoph Hellwig <[email protected]>
[[email protected]: /arch/sparc/include/asm/irq_32.h: move NR_IRQS definition]
Signed-off-by: Christoph Hellwig <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
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Commit 181f817eaaca4c1f introduced some new code to entry-common.S
Sadly, this new code uses 'bx' instruction which is available only on
ARMv5 and higher CPUs. This causes following compilation errors when
building kernel for StrongARM (ARMv4):
arch/arm/kernel/entry-common.S: Assembler messages:
arch/arm/kernel/entry-common.S:129: Error: selected processor does not
support `bx ip'
arch/arm/kernel/entry-common.S:138: Error: selected processor does not
support `bx ip'
Fix these errors by using 'mov pc' instead of 'bx'.
Signed-off-by: Dmitry Artamonow <[email protected]>
Acked-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Russell King <[email protected]>
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The movement of the MMCI header file made bcmring break. It turns
out it was including asm/mmc.h without using it so fixing the
problem boils down to removing the offending include.
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: Scott Branden <[email protected]>
Signed-off-by: Leo Hao Chen <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Remove duplicated #include('s) in arch/arm/mach-bcmring/core.c
Signed-off-by: Huang Weiyi <[email protected]>
Signed-off-by: Leo Chen <[email protected]>
Signed-off-by: Russell King <[email protected]>
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The #ifdefs in the MMCI driver were erroneous and just masking
a bug in the U300 generic GPIO implementation. This removes the
ifdefs and fixes the U300 generic GPIO instead.
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King <[email protected]>
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While 32-bit processes can't directly access R8...R15, they can
gain access to these registers by temporarily switching themselves
into 64-bit mode.
Therefore, registers not preserved anyway by called C functions
(i.e. R8...R11) must be cleared prior to returning to user mode.
Signed-off-by: Jan Beulich <[email protected]>
Cc: <[email protected]>
LKML-Reference: <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
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Remove unused CONFIG FAST_CMPXCHG_LOCAL from Kconfig.
Reported-by: Robert P. J. Day <[email protected]>
Signed-off-by: Jaswinder Singh Rajput <[email protected]>
Acked-by: Christoph Lameter <[email protected]>
Cc: Pekka Enberg <[email protected]>
Cc: Matt Mackall <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: "Robert P. J. Day" <[email protected]>
Cc: [email protected]
LKML-Reference: <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
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Commit c953094 ("early_printk: Allow more than one early console")
introduced a regression in the parsing of the earlyprintk= kernel
arguments.
If you specify "earlyprintk=serial,ttyS0,115200" as a kernel
argument, the "serial,ttyS" should be parsed as a single argument
and not as "serial" and then "ttyS".
Also update the documentation to reflect you can specify the ttyS
directly without the "serial" argument.
Signed-off-by: Jason Wessel <[email protected]>
Cc: Len Brown <[email protected]>
Cc: Greg KH <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Johannes Weiner <[email protected]>
LKML-Reference: <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
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Conditionaly compile cmpxchg8b_emu.o and EXPORT_SYMBOL(cmpxchg8b_emu).
This reduces the kernel size a bit.
Signed-off-by: Eric Dumazet <[email protected]>
Cc: Arjan van de Ven <[email protected]>
Cc: Martin Schwidefsky <[email protected]>
Cc: John Stultz <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Linus Torvalds <[email protected]>
LKML-Reference: <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
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Just like ip_fast_csum, the assembly snippet in csum_ipv6_magic needs a
memory clobber, as it is only passed the address of the buffer, not a
memory reference to the buffer itself.
This caused failures in Hurd's pfinetv4 when we tried to compile it with
gcc-4.3 (bogus checksums).
Signed-off-by: Samuel Thibault <[email protected]>
Acked-by: David S. Miller <[email protected]>
Cc: Andi Kleen <[email protected]>
Cc: <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: H. Peter Anvin <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
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Try to avoid the 'alternates()' code when we can statically
determine that cmpxchg8b is fine. We already have that
CONFIG_x86_CMPXCHG64 (enabled by PAE support), and we could easily
also enable it for some of the CPU cases.
Note, this patch only adds CMPXCHG8B for the obvious Intel CPU's,
not for others. (There was something really messy about cmpxchg8b
and clone CPU's, so if you enable it on other CPUs later, do it
carefully.)
If we avoid that asm-alternative thing when we can assume the
instruction exists, we'll generate less support crud, and we'll
avoid the whole issue with that extra 'nop' for padding instruction
sizes etc.
LKML-Reference: <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
sched_clock: Fix atomicity/continuity bug by using cmpxchg64()
x86: Provide an alternative() based cmpxchg64()
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cmpxchg64() today generates, to quote Linus, "barf bag" code.
cmpxchg64() is about to get used in the scheduler to fix a bug there,
but it's a prerequisite that cmpxchg64() first be made non-sucking.
This patch turns cmpxchg64() into an efficient implementation that
uses the alternative() mechanism to just use the raw instruction on
all modern systems.
Note: the fallback is NOT smp safe, just like the current fallback
is not SMP safe. (Interested parties with i486 based SMP systems
are welcome to submit fix patches for that.)
Signed-off-by: Arjan van de Ven <[email protected]>
Acked-by: Linus Torvalds <[email protected]>
[ fixed asm constraint bug ]
Fixed-by: Eric Dumazet <[email protected]>
Cc: Martin Schwidefsky <[email protected]>
Cc: John Stultz <[email protected]>
Cc: Peter Zijlstra <[email protected]>
LKML-Reference: <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
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arch/mips/include/asm/unaligned.h: linux/unaligned/generic.h is included more than once.
Entirely legitimate but just noise.
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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It's not obvious what good it was supposed to do here anyway.
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Maxime Bizon <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Produce an error if request_irq() fails.
Signed-off-by: Roel Kluin <[email protected]>
Cc: "Ithamar R. Adema" <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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There are 16 individual channels (NUM_DBDMA_CHANS) to save/restore plus the
global ddma block config (the +1). The last register in a channel can be
skipped since it's read-only (at offset 0x18).
Signed-off-by: Roel Kluin <[email protected]>
Cc: Manuel Lauss <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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commit 48a048fed82a8e5fdd8618574f6d3de1a0d67a50
Author: Rusty Russell <[email protected]>
Date: Thu Sep 24 09:34:44 2009 -0600
apparently only passed the "looks good" level of QA ;-)
Signed-off-by: Ralf Baechle <[email protected]>
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This extends commit a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d to cover
MIPSxx-style board cache code.
Signed-off-by: Kevin Cernekee <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Build error introduced by d4f587c67fc39e0030ddd718675e252e208da4d7.
Signed-off-by: Mark Mason <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Patch 14275ccdb1e4b487cca745aba994699c426a31ee and
d5dedd4507d307eb3f35f21b6e16f336fdc0d82a are conflicting and the
conflict was resolved badly in merge
92241940be501f798cb21db344bbb3d1ec3c4f1c resulting in the BCM1480 changes
of 14275ccdb1e4b487cca745aba994699c426a31ee getting lost. Sort out the
damage.
Reported and initial patch by Mark Mason <[email protected]>.
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Maxime Bizon <[email protected]>
Acked-by: Greg Kroah-Hartman <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Uwe Kleine-König <[email protected]>
Cc: Yanhua <[email protected]>
Cc: Robert Richter <[email protected]>
Acked-by: Wu Zhangjin <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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The definition of the irq_ipi structure has two initializations of the
flags field. This combines them.
[Ralf: The issue was originally introduced by commit
be4894196d79455f420dd7bb78be7dc73bec115c (linux-mips.org) rsp.
033890b084adfa367c544864451d7730552ce8bf (kernel.org). The original
intention of the code was to initialize .flags with both flags ored together.
The broken C code as actually implemented will be compiled by an equally
broken gcc to use only the last initialization, that is IRQF_PERCPU
which means this turned into an SMTC bug for 2.6.23 and newer.]
The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@r@
identifier I, s, fld;
position p0,p;
expression E;
@@
struct I s =@p0 { ... .fld@p = E, ...};
@s@
identifier I, s, r.fld;
position r.p0,p;
expression E;
@@
struct I s =@p0 { ... .fld@p = E, ...};
@script:python@
p0 << r.p0;
fld << r.fld;
ps << s.p;
pr << r.p;
@@
if int(ps[0].line)!=int(pr[0].line) or int(ps[0].column)!=int(pr[0].column):
cocci.print_main(fld,p0)
// </smpl>
Signed-off-by: Julia Lawall <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Remove duplicated #include in arch/mips/kernel/smp.c.
Signed-off-by: Huang Weiyi <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Remove duplicated #include in arch/mips/bcm63xx/boards/board_bcm963xx.c.
Signed-off-by: Huang Weiyi <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:
percpu: make allocation failures more verbose
percpu: make pcpu_setup_first_chunk() failures more verbose
percpu: make embedding first chunk allocator check vmalloc space size
sparc64: implement page mapping percpu first chunk allocator
percpu: make pcpu_build_alloc_info() clear static buffers
percpu: fix unit_map[] verification in pcpu_setup_first_chunk()
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
omap: Fix wrong condition check in while loop for mailbox and iommu2
omap: rng: Use resource_size instead of manual calculation
omap: Fix MMC gpio_wp for BeagleBoard C2 and above
omap: Fix matrix_keymap_data usage
omap: Fix a OMAP_MPUIO_VBASE typo for 850
omap: Fix wrong jtag_id for 850
omap: iovmm: Fix compiler warning
omap: mailbox: Flush posted write when acking mailbox irq
omap: mailbox: Execute softreset at startup
omap: Add missing mux pin for EHCI phy reset line
omap: Fix 44xx compile
omap: Fix mcspi compile for 2420
omap: Fix compile for arch/arm/mach-omap2
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This reverts commit 22223c9b417be5fd0ab2cf9ad17eb7bd1e19f7b9, as
requested by Andi Kleen:
"Obviously kernels compiled with AMD support can still run on non AMD
systems, so messages like this can never be removed at compile time."
Requsted-by: Andi Kleen <[email protected]>
Cc: Borislav Petkov <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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