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2014-11-26arm64: Add FIX_HOLE to permanent fixed addressesLaura Abbott1-0/+1
Every other architecture with permanent fixed addresses has FIX_HOLE as the first entry. This seems to be designed as a debugging aid but there are a couple of side effects of not having FIX_HOLE: - If the first fixed address is 0, fix_to_virt -> virt_to_fix triggers a BUG_ON for the virtual address being equal to FIXADDR_TOP - fix_to_virt may return a value outside of FIXADDR_START and FIXADDR_TOP which may look like a bug to a developer. Match up with other architectures and make everything clearer by adding FIX_HOLE. Signed-off-by: Laura Abbott <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-26ARM: tegra: Move AHB Kconfig to drivers/ambaThierry Reding1-8/+1
This will allow the Kconfig option to be shared among 32-bit and 64-bit ARM. Signed-off-by: Thierry Reding <[email protected]>
2014-11-26amba: Add Kconfig fileThierry Reding2-6/+0
Rather than duplicate the ARM_AMBA Kconfig symbol in both 32-bit and 64-bit ARM architectures, move the common definition to drivers/amba where dependent drivers will be located. Signed-off-by: Thierry Reding <[email protected]>
2014-11-26arm: mvebu: normalize pinctrl entries for Armada SoCsArnaud Ebalard4-13/+13
There are currently 2 differents naming conventions used between the existing Armada SoC DT files for pinctrl entries (*_pin(s): *-pin(s) and pmx_*: pmx-*) with a vast majority of files using the former: $ grep _pin arch/arm/boot/dts/armada-*.dts* | wc -l 155 $ grep pmx arch/arm/boot/dts/armada-*.dts* | wc -l 13 In fact, only some Armada XP files are using the second variant. This patch normalizes those files (mainly ge0/1 entries) to use the first variant. Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/00114c3169e1d93259ff4150ed46ee36eae16b1e.1416670812.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-26arm: mvebu: fix wrongly named DS414 pinctrl entriesArnaud Ebalard1-3/+3
While renaming pinctrl entries during reviews of Synology DS414 support series, I missed three entries, as reported by Ben. This patch fixes those. Reported-by: Ben Peddell <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/608e4fd6e06e9c5289a84b9c38e81b2456dbcd79.1416670812.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-26ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375Gregory CLEMENT1-0/+5
Now that the USB cluster node has been added, use it as a PHY provider for the USB controller linked to it: the first EHCI and the xHCI. Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1415879269-29711-7-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]>
2014-11-26ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375Gregory CLEMENT1-0/+6
On Armada 375, the USB cluster allows to control the cluster composed of the USB2 and USB3 host controllers. Acked-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1415879269-29711-6-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]>
2014-11-26Merge tag 'tags/phy-dt-header' into mvebu/dt-usb_phyJason Cooper258-2111/+2040
shared header file which will be referenced from both PHY driver and its associated Device Tree node(s)
2014-11-26ARM: orion: convert the irq_reg_{readl,writel} calls to the new APIGregory CLEMENT1-4/+4
The commit "genirq: Generic chip: Change irq_reg_{readl,writel} arguments" modified the API. In the same tome the arch/arm/plat-orion/gpio.c file received a fix with the use of the old API: "ARM: orion: Fix for certain sequence of request_irq can cause irq storm". This commit fixes the use of the API. Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Olof Johansson <[email protected]> Link: https://lkml.kernel.org/r/1416928752-24529-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]>
2014-11-26Merge tag 'tags/mvebu-fixes-3.18' into irqchip/coreJason Cooper2-5/+33
mvebu fixes for v3.18 - Armada XP - Generalize i2c quirk - orion - Fix irq storm caused by specific sequence of request_irq
2014-11-25tty: bfin, define inlined structuresJiri Slaby1-4/+3
struct bfin_serial_port contains structs circ_buf, timer_list, and work_struct directly (not pointers). This means that these structures have to be defined completely to be inlined in struct bfin_serial_port. So instead of struct declarations, define the structures by including proper headers. They were pulled in by linux/serial_core.h or others until now. But experimenting with circ_buf removal from serial_core, struct circ_buf becomes undefined in bfin_serial: In file included from arch/blackfin/kernel/debug-mmrs.c:21:0: arch/blackfin/include/asm/bfin_serial.h:44:18: error: field 'rx_dma_buf' has incomplete type Signed-off-by: Jiri Slaby <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2014-11-26Merge tag 'tags/renesas-dt-du-for-v3.19' into drm/next/adv7511-baseLaurent Pinchart52-343/+370
Renesas ARM Based SoC DT DU Updates for v3.19 * Enable DU using DT on marzen/r8a7779, lager/r8a7790 and koelsch/r8a7791
2014-11-25x86/nmi: Fix use of unallocated cpumask_var_tSasha Levin1-3/+3
Commit "x86/nmi: Perform a safe NMI stack trace on all CPUs" has introduced a cpumask_var_t variable: +static cpumask_var_t printtrace_mask; But never allocated it before using it, which caused a NULL ptr deref when trying to print the stack trace: [ 1110.296154] BUG: unable to handle kernel NULL pointer dereference at (null) [ 1110.296169] IP: __memcpy (arch/x86/lib/memcpy_64.S:151) [ 1110.296178] PGD 4c34b3067 PUD 4c351b067 PMD 0 [ 1110.296186] Oops: 0002 [#1] PREEMPT SMP KASAN [ 1110.296234] Dumping ftrace buffer: [ 1110.296330] (ftrace buffer empty) [ 1110.296339] Modules linked in: [ 1110.296345] CPU: 1 PID: 10538 Comm: trinity-c99 Not tainted 3.18.0-rc5-next-20141124-sasha-00058-ge2a8c09-dirty #1499 [ 1110.296348] task: ffff880152650000 ti: ffff8804c3560000 task.ti: ffff8804c3560000 [ 1110.296357] RIP: __memcpy (arch/x86/lib/memcpy_64.S:151) [ 1110.296360] RSP: 0000:ffff8804c3563870 EFLAGS: 00010246 [ 1110.296363] RAX: 0000000000000000 RBX: ffffe8fff3c4a809 RCX: 0000000000000000 [ 1110.296366] RDX: 0000000000000008 RSI: ffffffff9e254040 RDI: 0000000000000000 [ 1110.296369] RBP: ffff8804c3563908 R08: 0000000000ffffff R09: 0000000000ffffff [ 1110.296371] R10: 0000000000000000 R11: 0000000000000006 R12: 0000000000000000 [ 1110.296375] R13: 0000000000000000 R14: ffffffff9e254040 R15: ffffe8fff3c4a809 [ 1110.296379] FS: 00007f9e43b0b700(0000) GS:ffff880107e00000(0000) knlGS:0000000000000000 [ 1110.296382] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b [ 1110.296385] CR2: 0000000000000000 CR3: 00000004e4334000 CR4: 00000000000006a0 [ 1110.296400] Stack: [ 1110.296406] ffffffff81b1e46c 0000000000000000 ffff880107e03fb8 000000000000000b [ 1110.296413] ffff880107dfffc0 ffff880107e03fc0 0000000000000008 ffffffff93f2e9c8 [ 1110.296419] 0000000000000000 ffffda0020fc07f7 0000000000000008 ffff8804c3563901 [ 1110.296420] Call Trace: [ 1110.296429] ? memcpy (mm/kasan/kasan.c:275) [ 1110.296437] ? arch_trigger_all_cpu_backtrace (include/linux/bitmap.h:215 include/linux/cpumask.h:506 arch/x86/kernel/apic/hw_nmi.c:76) [ 1110.296444] arch_trigger_all_cpu_backtrace (include/linux/bitmap.h:215 include/linux/cpumask.h:506 arch/x86/kernel/apic/hw_nmi.c:76) [ 1110.296451] ? dump_stack (./arch/x86/include/asm/preempt.h:95 lib/dump_stack.c:55) [ 1110.296458] do_raw_spin_lock (./arch/x86/include/asm/spinlock.h:86 kernel/locking/spinlock_debug.c:130 kernel/locking/spinlock_debug.c:137) [ 1110.296468] _raw_spin_lock (include/linux/spinlock_api_smp.h:143 kernel/locking/spinlock.c:151) [ 1110.296474] ? __page_check_address (include/linux/spinlock.h:309 mm/rmap.c:630) [ 1110.296481] __page_check_address (include/linux/spinlock.h:309 mm/rmap.c:630) [ 1110.296487] ? preempt_count_sub (kernel/sched/core.c:2615) [ 1110.296493] try_to_unmap_one (include/linux/rmap.h:202 mm/rmap.c:1146) [ 1110.296504] ? anon_vma_interval_tree_iter_next (mm/interval_tree.c:72 mm/interval_tree.c:103) [ 1110.296514] rmap_walk (mm/rmap.c:1653 mm/rmap.c:1725) [ 1110.296521] ? page_get_anon_vma (include/linux/rcupdate.h:423 include/linux/rcupdate.h:935 mm/rmap.c:435) [ 1110.296530] try_to_unmap (mm/rmap.c:1545) [ 1110.296536] ? page_get_anon_vma (mm/rmap.c:437) [ 1110.296545] ? try_to_unmap_nonlinear (mm/rmap.c:1138) [ 1110.296551] ? SyS_msync (mm/rmap.c:1501) [ 1110.296558] ? page_remove_rmap (mm/rmap.c:1409) [ 1110.296565] ? page_get_anon_vma (mm/rmap.c:448) [ 1110.296571] ? anon_vma_ctor (mm/rmap.c:1496) [ 1110.296579] migrate_pages (mm/migrate.c:913 mm/migrate.c:956 mm/migrate.c:1136) [ 1110.296586] ? _raw_spin_unlock_irq (./arch/x86/include/asm/preempt.h:95 include/linux/spinlock_api_smp.h:169 kernel/locking/spinlock.c:199) [ 1110.296593] ? buffer_migrate_lock_buffers (mm/migrate.c:1584) [ 1110.296601] ? handle_mm_fault (mm/memory.c:3163 mm/memory.c:3223 mm/memory.c:3336 mm/memory.c:3365) [ 1110.296607] migrate_misplaced_page (mm/migrate.c:1738) [ 1110.296614] handle_mm_fault (mm/memory.c:3170 mm/memory.c:3223 mm/memory.c:3336 mm/memory.c:3365) [ 1110.296623] __do_page_fault (arch/x86/mm/fault.c:1246) [ 1110.296630] ? vtime_account_user (kernel/sched/cputime.c:701) [ 1110.296638] ? get_parent_ip (kernel/sched/core.c:2559) [ 1110.296646] ? context_tracking_user_exit (kernel/context_tracking.c:144) [ 1110.296656] trace_do_page_fault (arch/x86/mm/fault.c:1329 include/linux/jump_label.h:114 include/linux/context_tracking_state.h:27 include/linux/context_tracking.h:45 arch/x86/mm/fault.c:1330) [ 1110.296664] do_async_page_fault (arch/x86/kernel/kvm.c:280) [ 1110.296670] async_page_fault (arch/x86/kernel/entry_64.S:1285) [ 1110.296755] Code: 08 4c 8b 54 16 f0 4c 8b 5c 16 f8 4c 89 07 4c 89 4f 08 4c 89 54 17 f0 4c 89 5c 17 f8 c3 90 83 fa 08 72 1b 4c 8b 06 4c 8b 4c 16 f8 <4c> 89 07 4c 89 4c 17 f8 c3 66 2e 0f 1f 84 00 00 00 00 00 83 fa All code ======== 0: 08 4c 8b 54 or %cl,0x54(%rbx,%rcx,4) 4: 16 (bad) 5: f0 4c 8b 5c 16 f8 lock mov -0x8(%rsi,%rdx,1),%r11 b: 4c 89 07 mov %r8,(%rdi) e: 4c 89 4f 08 mov %r9,0x8(%rdi) 12: 4c 89 54 17 f0 mov %r10,-0x10(%rdi,%rdx,1) 17: 4c 89 5c 17 f8 mov %r11,-0x8(%rdi,%rdx,1) 1c: c3 retq 1d: 90 nop 1e: 83 fa 08 cmp $0x8,%edx 21: 72 1b jb 0x3e 23: 4c 8b 06 mov (%rsi),%r8 26: 4c 8b 4c 16 f8 mov -0x8(%rsi,%rdx,1),%r9 2b:* 4c 89 07 mov %r8,(%rdi) <-- trapping instruction 2e: 4c 89 4c 17 f8 mov %r9,-0x8(%rdi,%rdx,1) 33: c3 retq 34: 66 2e 0f 1f 84 00 00 nopw %cs:0x0(%rax,%rax,1) 3b: 00 00 00 3e: 83 fa 00 cmp $0x0,%edx Code starting with the faulting instruction =========================================== 0: 4c 89 07 mov %r8,(%rdi) 3: 4c 89 4c 17 f8 mov %r9,-0x8(%rdi,%rdx,1) 8: c3 retq 9: 66 2e 0f 1f 84 00 00 nopw %cs:0x0(%rax,%rax,1) 10: 00 00 00 13: 83 fa 00 cmp $0x0,%edx [ 1110.296760] RIP __memcpy (arch/x86/lib/memcpy_64.S:151) [ 1110.296763] RSP <ffff8804c3563870> [ 1110.296765] CR2: 0000000000000000 Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Sasha Levin <[email protected]> Signed-off-by: Steven Rostedt <[email protected]>
2014-11-25arm64: alternatives: fix pr_fmt string for consistencyWill Deacon1-1/+1
Consistently use the plural form for alternatives pr_fmt strings. Signed-off-by: Will Deacon <[email protected]>
2014-11-25Merge tag 'usb-for-v3.19' of ↵Greg Kroah-Hartman1-0/+4
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next Felipe writes: usb: patches for v3.19 merge window This time, a very pull request with 216 non-merge commits. Most of the commits contained here are sparse or coccinelle fixes ranging from missing 'static' to returning 0 in case of errors. More importantly, we have the removal the now unnecessary 'driver' argument to ->udc_stop(). DWC2 learned about Dual-Role builds. Users of this IP can now have a single driver built for host and device roles. DWC3 got support for two new HW platforms: Exynos7 and AMD. The Broadcom USB 3.0 Device Controller IP is now supported and so is PLX USB338x, which means DWC3 has lost is badge as the only USB 3.0 peripheral IP supported on Linux. Thanks for Tony Lindgren's work, we can now have a distro-like kernel where all MUSB glue layers can be built into the same kernel (statically or dynamically linked) and it'll work in PIO (DMA will come probably on v3.20). Other than these, the usual set of cleanups and non-critical fixes. Signed-off-by: Felipe Balbi <[email protected]>
2014-11-25USB: host: Remove ehci-octeon and ohci-octeon driversAlan Stern2-2/+275
Remove special-purpose octeon drivers and instead use ehci-platform and ohci-platform as suggested with http://marc.info/?l=linux-mips&m=140139694721623&w=2 [andreas.herrmann: fixed compile error] Cc: David Daney <[email protected]> Cc: Alex Smith <[email protected]> Signed-off-by: Alan Stern <[email protected]> Signed-off-by: Andreas Herrmann <[email protected]> Acked-by: Ralf Baechle <[email protected]> Tested-by: Aaro Koskinen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2014-11-25arm64: vmlinux.lds.S: don't discard .exit.* sections at link-timeWill Deacon1-2/+3
.exit.* sections may be subject to patching by the new alternatives framework and so shouldn't be discarded at link-time. Without this patch, such a section will result in the following linker error: `.exit.text' referenced in section `.altinstructions' of drivers/built-in.o: defined in discarded section `.exit.text' of drivers/built-in.o Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: Factor out fixmap initialization from ioremapLaura Abbott4-93/+102
The fixmap API was originally added for arm64 for early_ioremap purposes. It can be used for other purposes too so move the initialization from ioremap to somewhere more generic. This makes it obvious where the fixmap is being set up and allows for a cleaner implementation of __set_fixmap. Reviewed-by: Kees Cook <[email protected]> Acked-by: Mark Rutland <[email protected]> Tested-by: Mark Rutland <[email protected]> Tested-by: Kees Cook <[email protected]> Signed-off-by: Laura Abbott <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: Move cpu_resume into the text sectionLaura Abbott2-32/+8
The function cpu_resume currently lives in the .data section. There's no reason for it to be there since we can use relative instructions without a problem. Move a few cpu_resume data structures out of the assembly file so the .data annotation can be dropped completely and cpu_resume ends up in the read only text section. Reviewed-by: Kees Cook <[email protected]> Reviewed-by: Mark Rutland <[email protected]> Reviewed-by: Lorenzo Pieralisi <[email protected]> Tested-by: Mark Rutland <[email protected]> Tested-by: Lorenzo Pieralisi <[email protected]> Tested-by: Kees Cook <[email protected]> Acked-by: Ard Biesheuvel <[email protected]> Signed-off-by: Laura Abbott <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: Switch to adrp for loading the stub vectorsLaura Abbott1-1/+2
The hyp stub vectors are currently loaded using adr. This instruction has a +/- 1MB range for the loading address. If the alignment for sections is changed the address may be more than 1MB away, resulting in reclocation errors. Switch to using adrp for getting the address to ensure we aren't affected by the location of the __hyp_stub_vectors. Acked-by: Ard Biesheuvel <[email protected]> Acked-by: Marc Zyngier <[email protected]> Tested-by: Mark Rutland <[email protected]> Tested-by: Kees Cook <[email protected]> Signed-off-by: Laura Abbott <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: Treat handle_arch_irq as a function pointerLaura Abbott3-5/+4
handle_arch_irq isn't actually text, it's just a function pointer. It doesn't need to be stored in the text section and doing so causes problesm if we ever want to make the kernel text read only. Declare handle_arch_irq as a proper function pointer stored in the data section. Reviewed-by: Kees Cook <[email protected]> Reviewed-by: Mark Rutland <[email protected]> Acked-by: Ard Biesheuvel <[email protected]> Tested-by: Mark Rutland <[email protected]> Tested-by: Kees Cook <[email protected]> Signed-off-by: Laura Abbott <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: sanity checks: add ID_AA64DFR{0,1}_EL1Mark Rutland2-0/+13
While we currently expect self-hosted debug support to be identical across CPUs, we don't currently sanity check this. This patch adds logging of the ID_AA64DFR{0,1}_EL1 values and associated sanity checking code. It's not clear to me whether we need to check PMUVer, TraceVer, and DebugVer, as we don't currently rely on these fields at all. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Acked-by: Will Deacon <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: sanity checks: add missing newline to printMark Rutland1-1/+1
A missing newline in the WARN_TAINT_ONCE string results in ugly and somewhat difficult to read output in the case of a sanity check failure, as the next print does not appear on a new line: Unsupported CPU feature variation.Modules linked in: This patch adds the missing newline, fixing the output formatting. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Acked-by: Will Deacon <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: sanity checks: ignore ID_MMFR0.AuxRegMark Rutland1-1/+6
It seems that Cortex-A53 r0p4 added support for AIFSR and ADFSR, and ID_MMFR0.AuxReg has been updated accordingly to report this fact. As Cortex-A53 could be paired with CPUs which do not implement these registers (e.g. all current revisions of Cortex-A57), this may trigger a sanity check failure at boot. The AuxReg value describes the availability of the ACTLR, AIFSR, and ADFSR registers, which are only of use to 32-bit guest OSs, and have IMPLEMENTATION DEFINED contents. Given the nature of these registers it is likely that KVM will need to trap accesses regardless of whether the CPUs are heterogeneous. This patch masks out the ID_MMFR0.AuxReg value from the sanity checks, preventing spurious warnings at boot time. Signed-off-by: Mark Rutland <[email protected]> Reported-by: Andre Przywara <[email protected]> Cc: Catalin Marinas <[email protected]> Acked-by: Will Deacon <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Peter Maydell <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: topology: Fix handling of multi-level cluster MPIDR-based detectionMark Brown1-2/+5
The only requirement the scheduler has on cluster IDs is that they must be unique. When enumerating the topology based on MPIDR information the kernel currently generates cluster IDs by using the first level of affinity above the core ID (either level one or two depending on if the core has multiple threads) however the ARMv8 architecture allows for up to three levels of affinity. This means that an ARMv8 system may contain cores which have MPIDRs identical other than affinity level three which with current code will cause us to report multiple cores with the same identification to the scheduler in violation of its uniqueness requirement. Ensure that we do not violate the scheduler requirements on systems that uses all the affinity levels by incorporating both affinity levels two and three into the cluser ID when the cores are not threaded. While no currently known hardware uses multi-level clusters it is better to program defensively, this will help ease bringup of systems that have them and will ensure that things like distribution install media do not need to be respun to replace kernels in order to deploy such systems. In the worst case the system will work but perform suboptimally until a kernel modified to handle the new topology better is installed, in the best case this will be an adequate description of such topologies for the scheduler to perform well. Signed-off-by: Mark Brown <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: protect alternatives workarounds with Kconfig optionsAndre Przywara2-0/+122
Not all of the errata we have workarounds for apply necessarily to all SoCs, so people compiling a kernel for one very specific SoC may not need to patch the kernel. Introduce a new submenu in the "Platform selection" menu to allow people to turn off certain bugs if they are not affected. By default all of them are enabled. Normal users or distribution kernels shouldn't bother to deselect any bugs here, since the alternatives framework will take care of patching them in only if needed. Signed-off-by: Andre Przywara <[email protected]> [will: moved kconfig menu under `Kernel Features'] Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: add Cortex-A57 erratum 832075 workaroundAndre Przywara3-6/+29
The ARM erratum 832075 applies to certain revisions of Cortex-A57, one of the workarounds is to change device loads into using load-aquire semantics. This is achieved using the alternatives framework. Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: add Cortex-A53 cache errata workaroundAndre Przywara5-3/+60
The ARM errata 819472, 826319, 827319 and 824069 define the same workaround for these hardware issues in certain Cortex-A53 parts. Use the new alternatives framework and the CPU MIDR detection to patch "cache clean" into "cache clean and invalidate" instructions if an affected CPU is detected at runtime. Signed-off-by: Andre Przywara <[email protected]> [will: add __maybe_unused to squash gcc warning] Signed-off-by: Will Deacon <[email protected]>
2014-11-25crypto: sha-mb - remove a bogus NULL checkDan Carpenter1-2/+1
This can't be NULL and we dereferenced it earlier. Smatch used to ignore these things where the pointer was obviously non-NULL but I've found that sometimes the intention was to check something else so we were maybe missing bugs. Signed-off-by: Dan Carpenter <[email protected]> Acked-by: Tim Chen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-11-25arm/arm64: KVM: avoid unnecessary guest register mangling on MMIO readAndre Przywara1-6/+9
Currently we mangle the endianness of the guest's register even on an MMIO _read_, where it is completely useless, because we will not use the value of that register. Rework the io_mem_abort() function to clearly separate between reads and writes and only do the endianness mangling on MMIO writes. Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2014-11-25arm, arm64: KVM: handle potential incoherency of readonly memslotsArd Biesheuvel1-5/+15
Readonly memslots are often used to implement emulation of ROMs and NOR flashes, in which case the guest may legally map these regions as uncached. To deal with the incoherency associated with uncached guest mappings, treat all readonly memslots as incoherent, and ensure that pages that belong to regions tagged as such are flushed to DRAM before being passed to the guest. Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2014-11-25arm, arm64: KVM: allow forced dcache flush on page faultsLaszlo Ersek3-6/+13
To allow handling of incoherent memslots in a subsequent patch, this patch adds a paramater 'ipa_uncached' to cache_coherent_guest_page() so that we can instruct it to flush the page's contents to DRAM even if the guest has caching globally enabled. Signed-off-by: Laszlo Ersek <[email protected]> Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2014-11-25kvm: fix kvm_is_mmio_pfn() and rename to kvm_is_reserved_pfn()Ard Biesheuvel2-4/+4
This reverts commit 85c8555ff0 ("KVM: check for !is_zero_pfn() in kvm_is_mmio_pfn()") and renames the function to kvm_is_reserved_pfn. The problem being addressed by the patch above was that some ARM code based the memory mapping attributes of a pfn on the return value of kvm_is_mmio_pfn(), whose name indeed suggests that such pfns should be mapped as device memory. However, kvm_is_mmio_pfn() doesn't do quite what it says on the tin, and the existing non-ARM users were already using it in a way which suggests that its name should probably have been 'kvm_is_reserved_pfn' from the beginning, e.g., whether or not to call get_page/put_page on it etc. This means that returning false for the zero page is a mistake and the patch above should be reverted. Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2014-11-25arm/arm64: kvm: drop inappropriate use of kvm_is_mmio_pfn()Ard Biesheuvel1-1/+6
Instead of using kvm_is_mmio_pfn() to decide whether a host region should be stage 2 mapped with device attributes, add a new static function kvm_is_device_pfn() that disregards RAM pages with the reserved bit set, as those should usually not be mapped as device memory. Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2014-11-25arm64: detect silicon revisions and set cap bits accordinglyAndre Przywara4-1/+65
After each CPU has been started, we iterate through a list of CPU features or bugs to detect CPUs which need (or could benefit from) kernel code patches. For each feature/bug there is a function which checks if that particular CPU is affected. We will later provide some more generic functions for common things like testing for certain MIDR ranges. We do this for every CPU to cover big.LITTLE systems properly as well. If a certain feature/bug has been detected, the capability bit will be set, so that later the call to apply_alternatives() will trigger the actual code patching. Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: add alternative runtime patchingAndre Przywara7-1/+139
With a blatant copy of some x86 bits we introduce the alternative runtime patching "framework" to arm64. This is quite basic for now and we only provide the functions we need at this time. This is connected to the newly introduced feature bits. Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25arm64: add cpu_capabilities bitmapAndre Przywara2-0/+23
For taking note if at least one CPU in the system needs a bug workaround or would benefit from a code optimization, we create a new bitmap to hold (artificial) feature bits. Since elf_hwcap is part of the userland ABI, we keep it alone and introduce a new data structure for that (along with some accessors). Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25ARM: dts: atlas6: add resets property for SPI nodesQipan Li1-0/+2
this patch adds missed resets property for CSR SiRFatlasVI SPI nodes. Signed-off-by: Qipan Li <[email protected]> Signed-off-by: Barry Song <[email protected]>
2014-11-25ARM: dts: atlas6: add resets property for VPP nodesRenwei Wu1-0/+1
this patch adds missed resets property for CSR SiRFatlasVI Video Post Processor(VPP) node. Signed-off-by: Renwei Wu <[email protected]> Signed-off-by: Barry Song <[email protected]>
2014-11-25ARM: dts: prima2: add resets property for VPP nodesRenwei Wu1-0/+1
this patch adds missed resets property for CSR SiRFprimaII Video Post Processor(VPP) node. Signed-off-by: Renwei Wu <[email protected]> Signed-off-by: Barry Song <[email protected]>
2014-11-25ARM: dts: prima2: add resets property for GPS nodesTao Huang1-0/+3
this patch adds missed resets property for CSR SiRFprimaII GPS related nodes. Signed-off-by: Tao Huang <[email protected]> Signed-off-by: Barry Song <[email protected]>
2014-11-25ARM: dts: prima2: add node for Performance Monitor UnitYe He1-0/+5
It enables Performance Monitor Unit on CSR SiRFprimaII. Signed-off-by: Ye He <[email protected]> Signed-off-by: Barry Song <[email protected]>
2014-11-25ARM: dts: atlas6: Add I2S external clock input pingroupRongjun Ying1-0/+6
The I2S controller can use the external clock as reference clock with master mode. But based on different hardware or software design, this external clock might be needed or not needed. So the external input pin can be an independent pinctrl group, and the card driver can decice to get it or not. Signed-off-by: Rongjun Ying <[email protected]> Signed-off-by: Barry Song <[email protected]> Acked-by: Linus Walleij <[email protected]>
2014-11-25ARM: dts: atlas6: add a separate pingroup for i2s mclk outputRongjun Ying1-0/+6
The I2S controller can output mclk to external audio codec. But by hardware design, some codecs need mclk and some codecs do not need mclk. So the mclk pin can be an independent pinctrl group, and the card driver can get it or not based on boards. Signed-off-by: Rongjun Ying <[email protected]> Signed-off-by: Barry Song <[email protected]> Acked-by: Linus Walleij <[email protected]>
2014-11-25ARM: dts: prima2: add I2S 2ch, 6ch, nodin, mclk groupsRongjun Ying1-0/+24
we have done that for atlas6 in commit ed36c1a, 086b8904 etc. here we do same things for prima2. Signed-off-by: Rongjun Ying <[email protected]> Signed-off-by: Barry Song <[email protected]> Acked-by: Linus Walleij <[email protected]>
2014-11-25arm64: fix return code check when changing emulation handlerWill Deacon1-1/+1
update_insn_emulation_mode() returns 0 on success, so we should be treating any non-zero values as failure, rather than the other way around. Otherwise, writes to the sysctl file controlling the emulation are ignored and immediately rolled back. Reported-by: Gene Hackmann <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2014-11-25x86/asm/traps: Disable tracing and kprobes in fixup_bad_iret and sync_regsAndy Lutomirski1-2/+3
These functions can be executed on the int3 stack, so kprobes are dangerous. Tracing is probably a bad idea, too. Fixes: b645af2d5905 ("x86_64, traps: Rework bad_iret") Signed-off-by: Andy Lutomirski <[email protected]> Cc: <[email protected]> # Backport as far back as it would apply Cc: Linus Torvalds <[email protected]> Cc: Steven Rostedt <[email protected]> Link: http://lkml.kernel.org/r/50e33d26adca60816f3ba968875801652507d0c4.1416870125.git.luto@amacapital.net Signed-off-by: Ingo Molnar <[email protected]>
2014-11-24Merge tag 'sunxi-clocks-for-3.19' of ↵Michael Turquette6-60/+12
https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next Allwinner Clocks additions for 3.19 A few patches that should go through the clock tree, mostly fixes, cleanups, and new clocks additions to start to support the A80.
2014-11-25ARM: dts: rockchip: enable thermal on rk3288-evb boardCaesar Wang1-0/+6
When a thermal temperature is invoked use the CRU to reset the chip on rk3288-evb boards. TSHUT is low active on these boards. Signed-off-by: Caesar Wang <[email protected]> Reviewed-by: Dmitry Torokhov <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2014-11-25ARM: dts: rockchip: add main thermal info to rk3288Caesar Wang1-0/+27
If for some reason we are unable to shut it down in orderly fashion (kernel is stuck holding a lock or similar), then hardware TSHUT will reset it. If the temperature is over 95C over a period of time the thermal shutdown of the tsadc is invoked with can either reset the entire chip via the CRU, or notify the PMIC via a GPIO. This should be set in the specific board. Signed-off-by: Caesar Wang <[email protected]> Reviewed-by: Dmitry Torokhov <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
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