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2024-08-30KVM: arm64: nv: Make ps_to_output_size() generally availableMarc Zyngier2-14/+14
Make this helper visible to at.c, we are going to need it. Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30KVM: arm64: nv: Add emulation of AT S12E{0,1}{R,W}Marc Zyngier2-0/+254
On the face of it, AT S12E{0,1}{R,W} is pretty simple. It is the combination of AT S1E{0,1}{R,W}, followed by an extra S2 walk. However, there is a great deal of complexity coming from combining the S1 and S2 attributes to report something consistent in PAR_EL1. This is an absolute mine field, and I have a splitting headache. Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30KVM: arm64: nv: Add basic emulation of AT S1E2{R,W}Marc Zyngier2-0/+52
Similar to our AT S1E{0,1} emulation, we implement the AT S1E2 handling. This emulation of course suffers from the same problems, but is somehow simpler due to the lack of PAN2 and the fact that we are guaranteed to execute it from the correct context. Co-developed-by: Jintack Lim <[email protected]> Signed-off-by: Jintack Lim <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30KVM: arm64: nv: Add basic emulation of AT S1E1{R,W}PMarc Zyngier1-0/+26
Building on top of our primitive AT S1E{0,1}{R,W} emulation, add minimal support for the FEAT_PAN2 instructions, momentary context-switching PSTATE.PAN so that it takes effect in the context of the guest. Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30KVM: arm64: nv: Add basic emulation of AT S1E{0,1}{R,W}Marc Zyngier3-1/+142
Emulating AT instructions is one the tasks devolved to the host hypervisor when NV is on. Here, we take the basic approach of emulating AT S1E{0,1}{R,W} using the AT instructions themselves. While this mostly work, it doesn't *always* work: - S1 page tables can be swapped out - shadow S2 can be incomplete and not contain mappings for the S1 page tables We are not trying to handle these case here, and defer it to a later patch. Suitable comments indicate where we are in dire need of better handling. Co-developed-by: Jintack Lim <[email protected]> Signed-off-by: Jintack Lim <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30KVM: arm64: nv: Honor absence of FEAT_PAN2Marc Zyngier1-0/+4
If our guest has been configured without PAN2, make sure that AT S1E1{R,W}P will generate an UNDEF. Reviewed-by: Anshuman Khandual <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30KVM: arm64: nv: Turn upper_attr for S2 walk into the full descriptorMarc Zyngier2-8/+8
The upper_attr attribute has been badly named, as it most of the time carries the full "last walked descriptor". Rename it to "desc" and make ti contain the full 64bit descriptor. This will be used by the S1 PTW. Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30KVM: arm64: nv: Enforce S2 alignment when contiguous bit is setMarc Zyngier2-5/+24
Despite KVM not using the contiguous bit for anything related to TLBs, the spec does require that the alignment defined by the contiguous bit for the page size and the level is enforced. Add the required checks to offset the point where PA and VA merge. Fixes: 61e30b9eef7f ("KVM: arm64: nv: Implement nested Stage-2 page table walk logic") Reported-by: Alexandru Elisei <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30arm64: Add ESR_ELx_FSC_ADDRSZ_L() helperMarc Zyngier1-2/+3
Although we have helpers that encode the level of a given fault type, the Address Size fault type is missing it. While we're at it, fix the bracketting for ESR_ELx_FSC_ACCESS_L() and ESR_ELx_FSC_PERM_L(). Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30arm64: Add system register encoding for PSTATE.PANMarc Zyngier1-0/+3
Although we already have the primitives to set PSTATE.PAN with an immediate, we don't have a way to read the current state nor set it ot an arbitrary value (i.e. we can generally save/restore it). Thankfully, all that is missing for this is the definition for the PAN pseudo system register, here named SYS_PSTATE_PAN. Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30arm64: Add PAR_EL1 field descriptionMarc Zyngier1-0/+18
As KVM is about to grow a full emulation for the AT instructions, add the layout of the PAR_EL1 register in its non-D128 configuration. Note that the constants are a bit ugly, as the register has two layouts, based on the state of the F bit. Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30arm64: Add missing APTable and TCR_ELx.HPD masksMarc Zyngier2-0/+10
Although Linux doesn't make use of hierarchical permissions (TFFT!), KVM needs to know where the various bits related to this feature live in the TCR_ELx registers as well as in the page tables. Add the missing bits. Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30KVM: arm64: Make kvm_at() take an OP_AT_*Joey Gouly2-2/+3
To allow using newer instructions that current assemblers don't know about, replace the `at` instruction with the underlying SYS instruction. Signed-off-by: Joey Gouly <[email protected]> Cc: Oliver Upton <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Will Deacon <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> Reviewed-by: Anshuman Khandual <[email protected]> Acked-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2024-08-30powerpc: Remove obsoleted declaration for _get_SPGaosheng Cui1-2/+0
The implementation of _get_SP() was removed in commit f4db196717c6 ("[POWERPC] Remove _get_SP"), remove the now obsolete declaration. Signed-off-by: Gaosheng Cui <[email protected]> Reviewed-by: Christophe Leroy <[email protected]> [mpe: Update change log to refer to correct commit per Christophe] Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2024-08-30arm64: dts: amlogic: add C3 AW419 boardXianwei Zhao2-0/+263
Add Amlogic C3 C308L AW419 board. The corresponding binding has been applied, therefore, this series does not need to add a binding corresponding to the AW419 board. Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Xianwei Zhao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2024-08-30arm64: dts: amlogic: add some device nodes for C3Xianwei Zhao2-1/+720
Add some device nodes for SoC C3, including periphs clock controller node, PLL clock controller node, SPICC node, regulator node, NAND controller node, sdcard node, Ethernet MAC and PHY node. The sdacrd depends on regulator and pinctrl(select), so some property fields are placed at the board level. The nand chip is placed on the board, So some property fields about SPIFC and NAND controller node are placed at the board level. THe Ethernet MAC support outchip PHY, so place this property field(select PHY) at the board level. Signed-off-by: Xianwei Zhao <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2024-08-29arm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6Heiko Stuebner1-1/+0
vcc3v3-sd-s0-regulator used enable-active-low. According the binding of the fixed regulator, that is the assumed mode of operation if enable-active-high is not specified. So this is property is not part of the binding, therefore remove it. Signed-off-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2024-08-29arm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6Heiko Stuebner1-1/+0
regulator-init-microvolt is used in the vendor-kernel, but not part of the specification. Signed-off-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2024-08-29arm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6Heiko Stuebner1-1/+1
A remant from moving from the vendor kernel, the regulator is using a fairchild fcs prefix instead of rockchip,* in the mainline kernel according to its binding. Signed-off-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2024-08-29s390/hiperdispatch: Add hiperdispatch debug countersMete Durlu1-0/+77
Add three counters to follow and understand hiperdispatch behavior; * adjustment_count (amount of capacity adjustments triggered) * greedy_time_ms (time spent while all cpus are on high capacity) * conservative_time_ms (time spent while only entitled cpus are on high capacity) These counters can be found under /sys/kernel/debug/s390/hiperdispatch/ Time counters are in <msec> format and only cover the time spent when hiperdispatch is active. Acked-by: Vasily Gorbik <[email protected]> Signed-off-by: Mete Durlu <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/hiperdispatch: Add hiperdispatch debug attributesMete Durlu1-2/+82
Add two attributes for debug purposes. They can be found under; /sys/devices/system/cpu/hiperdispatch/ * hd_stime_threshold : allows user to adjust steal time threshold * hd_delay_factor : allows user to adjust delay factor of hiperdispatch work (after topology updates, delayed work is always delayed extra by this factor) hd_stime_threshold can have values between 0-100 as it represents a percentage value. hd_delay_factor can have values greater than 1. It is multiplied with the default delay to achieve a longer interval, pushing back the next hiperdispatch adjustment after a topology update. Ex: if delay interval is 250ms and the delay factor is 4; delayed interval is now 1000ms(1sec). After each capacity adjustment or topology change, work has a delayed interval of 1 sec for one interval. Acked-by: Vasily Gorbik <[email protected]> Signed-off-by: Mete Durlu <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/hiperdispatch: Add hiperdispatch sysctl interfaceMete Durlu2-0/+72
Expose hiperdispatch controls via sysctl. The user can now toggle hiperdispatch via assigning 0 or 1 to s390.hiperdispatch attribute. When hiperdipatch is toggled on, it tries to adjust CPU capacities, while system is in vertical polarization to gain performance benefits from different CPU polarizations. Disabling hiperdispatch reverts the CPU capacities to their default (HIGH_CAPACITY) and stops the dynamic adjustments. Introduce a kconfig option HIPERDISPATCH_ON which allows users to use hiperdispatch by default on vertical polarization. Using the sysctl attribute s390.hiperdispatch would overwrite this behavior. Acked-by: Vasily Gorbik <[email protected]> Signed-off-by: Mete Durlu <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/hiperdispatch: Add trace eventsMete Durlu2-0/+63
Add trace events to debug hiperdispatch behavior and track domain rebuilding. Two events provide information about the decision making of hiperdispatch and the adjustments made. Acked-by: Vasily Gorbik <[email protected]> Co-developed-by: Tobias Huschle <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Mete Durlu <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/hiperdispatch: Add steal time averagingMete Durlu1-1/+10
The measurements done by hiperdispatch can have sudden spikes and dips during run time. To prevent these outliers effecting the decision making process and causing adjustment overhead, use weighted average of the steal time. Acked-by: Vasily Gorbik <[email protected]> Co-developed-by: Tobias Huschle <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Mete Durlu <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/hiperdispatch: Introduce hiperdispatchMete Durlu4-5/+228
When LPAR is in vertical polarization, CPUs get different polarization values, namely vertical high, vertical medium and vertical low. These values represent the likelyhood of the CPU getting physical runtime. Vertical high CPUs will always get runtime and others get varying runtime depending on the load the CEC is under. Vertical high and vertical medium CPUs are considered the CPUs which the current LPAR has the entitlement to run on. The vertical lows are on the other hand are borrowed CPUs which would only be given to the LPAR by hipervisor when the other LPARs are not utilizing them. Using the CPU capacities, hint linux scheduler when it should prioritise vertical high and vertical medium CPUs over vertical low CPUs. By tracking various system statistics hiperdispatch determines when to adjust cpu capacities. After each adjustment, rebuilding of scheduler domains is necessary to notify the scheduler about capacity changes but since this operation is costly it should be done as sparsely as possible. Acked-by: Vasily Gorbik <[email protected]> Co-developed-by: Tobias Huschle <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Mete Durlu <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/smp: Add cpu capacitiesMete Durlu4-0/+29
Linux scheduler allows architectures to assign capacity values to individual CPUs. This hints scheduler the performance difference between CPUs and allows more efficient task distribution them. Implement helper methods to set and get CPU capacities for s390. This is particularly helpful in vertical polarization configurations of LPARs. On vertical polarization an LPARs CPUs can get different polarization values depending on the CEC configuration. CPUs with different polarization values can perform different from each other, using CPU capacities this can be reflected to linux scheduler. Acked-by: Vasily Gorbik <[email protected]> Signed-off-by: Mete Durlu <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/topology: Add config option to switch to vertical during bootTobias Huschle2-0/+10
By default, all systems on s390 start in horizontal cpu polarization. Selecting the new config option SCHED_TOPOLOGY_VERTICAL allows to build a kernel that switches to vertical polarization during boot. Acked-by: Heiko Carstens <[email protected]> Tested-by: Mete Durlu <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/topology: Add sysctl handler for polarizationTobias Huschle1-13/+45
Provide an additional path to set the polarization of the system, such that a user no longer relies on the sysfs interface only and is able configure the polarization for every reboot via sysctl control files. The new sysctl can be set as follows: - s390.polarization=0 for horizontal polarization - s390.polarization=1 for vertical polarization Acked-by: Heiko Carstens <[email protected]> Tested-by: Mete Durlu <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/wti: Add debugfs file to display missed grace periods per cpuTobias Huschle1-0/+25
Introduce a new debug file which allows to determine how many warning track grace periods were missed on each CPU. The new file can be found as /sys/kernel/debug/s390/wti It is formatted as: CPU0 CPU1 [...] CPUx xyz xyz [...] xyz Acked-by: Heiko Carstens <[email protected]> Reviewed-by: Mete Durlu <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/wti: Add wti accounting for missed grace periodsTobias Huschle1-1/+50
A virtual CPU that has received a warning-track interrupt may fail to acknowledge the interrupt within the warning-track grace period. While this is usually not a problem, it will become necessary to investigate if there is a large number of such missed warning-track interrupts. Therefore, it is necessary to track these events. The information is tracked through the s390 debug facility and can be found under /sys/kernel/debug/s390dbf/wti/. The hex_ascii output is formatted as: <pid> <symbol> The values pid and current psw are collected when a warning track interrupt is received. Symbol is either the kernel symbol matching the collected psw or redacted to <user> when running in user space. Each line represents the currently executing process when a warning track interrupt was received which was then not acknowledged within its grace period. Acked-by: Heiko Carstens <[email protected]> Reviewed-by: Mete Durlu <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/wti: Prepare graceful CPU pre-emption on wti receptionTobias Huschle2-1/+142
When a warning track interrupt is received, the kernel has only a very limited amount of time to make sure, that the CPU can be yielded as gracefully as possible before being pre-empted by the hypervisor. The interrupt handler for the wti therefore unparks a kernel thread which has being created on boot re-using the CPU hotplug kernel thread infrastructure. These threads exist per CPU and are assigned the highest possible real-time priority. This makes sure, that said threads will execute as soon as possible as the scheduler should pre-empt any other running user tasks to run the real-time thread. Furthermore, the interrupt handler disables all I/O interrupts to prevent additional interrupt processing on the soon-preempted CPU. Interrupt handlers are likely to take kernel locks, which in the worst case, will be kept while the interrupt handler is pre-empted from itself underlying physical CPU. In that case, all tasks or interrupt handlers on other CPUs would have to wait for the pre-empted CPU being dispatched again. By preventing further interrupt processing, this risk is minimized. Once the CPU gets dispatched again, the real-time kernel thread regains control, reenables interrupts and parks itself again. Acked-by: Heiko Carstens <[email protected]> Reviewed-by: Mete Durlu <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/wti: Introduce infrastructure for warning track interruptTobias Huschle6-2/+33
The warning-track interrupt (wti) provides a notification that the receiving CPU will be pre-empted from its physical CPU within a short time frame. This time frame is called grace period and depends on the machine type. Giving up the CPU on time may prevent a task to get stuck while holding a resource. Reviewed-by: Heiko Carstens <[email protected]> Reviewed-by: Mete Durlu <[email protected]> Signed-off-by: Tobias Huschle <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/hypfs: Remove obsoleted declaration for hypfs_dbfs_exitGaosheng Cui1-1/+0
The hypfs_dbfs_exit() have been removed since commit 3325b4d85799 ("s390/hypfs: factor out filesystem code"), and now it is useless, so remove it. Signed-off-by: Gaosheng Cui <[email protected]> Acked-by: Vasily Gorbik <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/ftrace: Avoid extra serialization for graph caller patchingVasily Gorbik1-14/+2
The only context where ftrace_enable_ftrace_graph_caller() or ftrace_disable_ftrace_graph_caller() is called also calls ftrace_arch_code_modify_post_process(), which already performs text_poke_sync_lock(). ftrace_run_update_code() arch_ftrace_update_code() ftrace_modify_all_code() ftrace_enable_ftrace_graph_caller()/ftrace_disable_ftrace_graph_caller() ftrace_arch_code_modify_post_process() text_poke_sync_lock() Remove the redundant serialization. Reviewed-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/ftrace: Use get/copy_from_kernel_nofault consistentlyVasily Gorbik1-2/+5
Use get/copy_from_kernel_nofault to access the kernel text consistently. Replace memcmp() in ftrace_init_nop() to ensure that in case of inconsistencies in the 'mcount' table, the kernel reports a failure instead of potentially crashing. Reviewed-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/ftrace: Avoid trampolines if possibleVasily Gorbik1-6/+53
When a sequential instruction fetching facility is present, it is safe to patch ftrace NOPs in function prologues. All of them are 8-byte aligned. Reviewed-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/kprobes: Avoid stop machine if possibleVasily Gorbik1-2/+13
Avoid stop machine on kprobes arm/disarm when sequential instruction fetching is present. Reviewed-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/setup: Recognize sequential instruction fetching facilityVasily Gorbik2-0/+4
When sequential instruction fetching facility is present, certain guarantees are provided for code patching. In particular, atomic overwrites within 8 aligned bytes is safe from an instruction-fetching point of view. Reviewed-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/entry: Unify save_area_sync and save_area_asyncSven Schnelle4-17/+16
In the past two save areas existed because interrupt handlers and system call / program check handlers where entered with interrupts enabled. To prevent a handler from overwriting the save areas from the previous handler, interrupts used the async save area, while system call and program check handler used the sync save area. Since the removal of critical section cleanup from entry.S, handlers are entered with interrupts disabled. When the interrupts are re-enabled, the save area is no longer need. Therefore merge both save areas into one. Reviewed-by: Heiko Carstens <[email protected]> Reviewed-by: Alexander Gordeev <[email protected]> Signed-off-by: Sven Schnelle <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/sha3: Support sha3 performance enhancementsJoerg Schmidbauer5-10/+38
On newer machines the SHA3 performance of CPACF instructions KIMD and KLMD can be enhanced by using additional modifier bits. This allows the application to omit initializing the ICV, but also affects the internal processing of the instructions. Performance is mostly gained when processing short messages. The new CPACF feature is backwards compatible with older machines, i.e. the new modifier bits are ignored on older machines. However, to save the ICV initialization, the application must detect the MSA level and omit the ICV initialization only if this feature is supported. Reviewed-by: Holger Dengler <[email protected]> Signed-off-by: Joerg Schmidbauer <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/pkey: Introduce pkey base with handler registry and handler modulesHarald Freudenberger3-0/+7
Introduce pkey base kernel code with a simple pkey handler registry. Regroup the pkey code into these kernel modules: - pkey is the pkey api supporting the ioctls, sysfs and in-kernel api. Also the pkey base code which offers the handler registry and handler wrapping invocation functions is integrated there. This module is automatically loaded in via CPU feature if the MSA feature is available. - pkey-cca is the CCA related handler code kernel module a offering CCA specific implementation for pkey. This module is loaded in via MODULE_DEVICE_TABLE when a CEX[4-8] card becomes available. - pkey-ep11 is the EP11 related handler code kernel module offering an EP11 specific implementation for pkey. This module is loaded in via MODULE_DEVICE_TABLE when a CEX[4-8] card becomes available. - pkey-pckmo is the PCKMO related handler code kernel module. This module is loaded in via CPU feature if the MSA feature is available, but on init a check for availability of the pckmo instruction is performed. The handler modules register via a pkey_handler struct at the pkey base code and the pkey customer (that is currently the pkey api code fetches a handler via pkey handler registry functions and calls the unified handler functions via the pkey base handler functions. As a result the pkey-cca, pkey-ep11 and pkey-pckmo modules get independent from each other and it becomes possible to write new handlers which offer another kind of implementation without implicit dependencies to other handler implementations and/or kernel device drivers. For each of these 4 kernel modules there is an individual Kconfig entry: CONFIG_PKEY for the base and api, CONFIG_PKEY_CCA for the PKEY CCA support handler, CONFIG_PKEY_EP11 for the EP11 support handler and CONFIG_PKEY_PCKMO for the pckmo support. The both CEX related handler modules (PKEY CCA and PKEY EP11) have a dependency to the zcrypt api of the zcrypt device driver. Signed-off-by: Harald Freudenberger <[email protected]> Reviewed-by: Holger Dengler <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/pkey: Rework and split PKEY kernel module codeHarald Freudenberger2-4/+4
This is a huge rework of all the pkey kernel module code. The goal is to split the code into individual parts with a dedicated calling interface: - move all the sysfs related code into pkey_sysfs.c - all the CCA related code goes to pkey_cca.c - the EP11 stuff has been moved to pkey_ep11.c - the PCKMO related code is now in pkey_pckmo.c The CCA, EP11 and PCKMO code may be seen as "handlers" with a similar calling interface. The new header file pkey_base.h declares this calling interface. The remaining code in pkey_api.c handles the ioctl, the pkey module things and the "handler" independent code on top of the calling interface invoking the handlers. This regrouping of the code will be the base for a real pkey kernel module split into a pkey base module which acts as a dispatcher and handler modules providing their service. Signed-off-by: Harald Freudenberger <[email protected]> Reviewed-by: Holger Dengler <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/crypto: Add hardware acceleration for HMAC modesHolger Dengler6-8/+401
Add new shash exploiting the HMAC hardware accelerations for SHA224, SHA256, SHA384 and SHA512 introduced with message-security assist extension 11. Reviewed-by: Harald Freudenberger <[email protected]> Signed-off-by: Holger Dengler <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/crypto: Add hardware acceleration for full AES-XTS modeHolger Dengler2-3/+119
Add new cipher exploiting the full AES-XTS hardware acceleration introduced with message-security assist extension 10. The full AES-XTS cipher is registered as preferred cipher in addition to the discrete AES-XTS variant. Reviewed-by: Harald Freudenberger <[email protected]> Signed-off-by: Holger Dengler <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/hypfs_diag: Remove unused dentry variableMete Durlu1-6/+1
Remove leftover dentry variable after hypfs refactoring. Before 2fcb3686e160, hypfs_diag.c and other hypfs files were using debugfs_create_file() explicitly for creating debugfs files and were storing the returned pointer. After the refactor, common debugfs file operations and also the related dentry pointers have been moved into hypfs_dbfs.c and redefined as new common mechanisms. Therefore the dentry variable and the debugfs_remove() function calls in hypfs_diag.c are now redundant. Current code is not effected since the dentry pointer in hypfs_diag is implicitly assigned to NULL and debugfs_remove() returns without an error if the passed pointer is NULL. Acked-by: Alexander Gordeev <[email protected]> Signed-off-by: Mete Durlu <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/disassembler: Add instructionsVasily Gorbik2-4/+33
Add more instructions to the kernel disassembler. Reviewed-by: Jens Remus <[email protected]> Reviewed-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390: Always enable EXPOLINE_EXTERN if supportedVasily Gorbik1-10/+6
Since commit ba05b39d54ee ("s390/expoline: Make modules use kernel expolines"), there is no longer any reason not to use CONFIG_EXPOLINE_EXTERN when supported by the compiler. On the positive side: - there is only a single set of expolines generated and used by both the kernel code and modules, - it eliminates expolines "comdat" sections, which can confuse tools like kpatch. Always enable EXPOLINE_EXTERN if supported by the compiler. Suggested-by: Heiko Carstens <[email protected]> Reviewed-by: Sumanth Korikkar <[email protected]> Reviewed-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/disassembler: Update instruction mnemonics to latest specJens Remus1-7/+7
Over the course of CPU generations a few instructions got extended, changing their base mnemonic, while keeping the former as an extended mnemonic. Update the instruction mnemonics in the disassembler to their latest base mnemonic as documented in the latest IBM z/Architecture Principles of Operation specification [1]. With the IBM z14 the base mnemonics of the following vector instructions have been changed: - Vector FP Load Lengthened (VFLL) - Vector FP Load Rounded (VFLR) With Message-Security-Assist Extension 5 Perform Pseudorandom Number Operation (PPNO) has been renamed to Perform Random Number Operation (PRNO). With Vector Enhancements Facility 2 the base mnemonics of the following vector instructions have been changed: - Vector FP Convert from Fixed (VCFPS) - Vector FP Convert from Logical (VCFPL) - Vector FP Convert to Fixed (VCSFP) - Vector FP Convert to Logical (VCLFP) [1] IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16, https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf Acked-by: Vasily Gorbik <[email protected]> Signed-off-by: Jens Remus <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29s390/disassembler: Use proper format specifiers for operand valuesJens Remus1-6/+6
Treat register numbers as unsigned. Treat signed operand values as signed. This resolves multiple instances of the Cppcheck warning: warning: %i in format string (no. 1) requires 'int' but the argument type is 'unsigned int'. [invalidPrintfArgType_sint] Acked-by: Vasily Gorbik <[email protected]> Signed-off-by: Jens Remus <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2024-08-29ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1Fabio Estevam1-2/+2
There is no DAC connected to the SPI bus of the Elgin RV1108 R1 board. There is a JG10309-01 LCD controlled via SPI though. Properly describe it by adding the "elgin,jg10309-01" compatible string. Reported-by: Conor Dooley <[email protected]> Closes: https://lore.kernel.org/linux-arm-kernel/20240717-parrot-malt-83cc04bf6b36@spud/ Signed-off-by: Fabio Estevam <[email protected]> Acked-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>