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2020-10-03Merge tag 'hisi-arm32-dt-for-5.10-tag2' of ↵Olof Johansson4-2/+100
git://github.com/hisilicon/linux-hisi into arm/dt ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10 (take two) - Fix the system controller compatible for the hi3620 and hip04 SoCs - Add the basic device tree for the hisilicon SD5203 SoC * tag 'hisi-arm32-dt-for-5.10-tag2' of git://github.com/hisilicon/linux-hisi: ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'omap-for-v5.10/dt-part2-signed' of ↵Olof Johansson57-297/+220
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt More dts changes for omaps for v5.10 merge window Some more dts changes that did not make it to the first set of dts changes: - Drop unnessary nokia,nvm-size property - A series of changes to use "okay" instead of "ok" - A series of changes to move boards to use new cpsw switch driver and drop the drop legacy cpsw dt node - A series of changes to fix issues with the GPIO binding usage * tag 'omap-for-v5.10/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am3874: iceboard: fix GPIO expander reset GPIOs ARM: dts: am335x: t335: align GPIO hog names with dtschema ARM: dts: am335x: lxm: fix PCA9539 GPIO expander properties ARM: dts: am437x-l4: drop legacy cpsw dt node ARM: dts: am437x: switch to new cpsw switch drv ARM: dts: am437x-l4: add dt node for new cpsw switchdev driver ARM: dts: dra7: drop legacy cpsw dt node ARM: dts: am57xx-cl-som-am57x: switch to new cpsw switch drv ARM: dts: dra7x-evm: switch to new cpsw switch drv ARM: dts: beagle-x15: switch to new cpsw switch drv ARM: dts: am57xx-idk: switch to new cpsw switch drv ARM: dts: am5729: beagleboneai: switch to new cpsw switch drv ARM: dts: am43xx: replace status value "ok" by "okay" ARM: dts: dra7xx: replace status value "ok" by "okay" ARM: dts: omap: replace status value "ok" by "okay" ARM: dts: n9, n950: Remove nokia,nvm-size property Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx into ↵Olof Johansson4-20/+24
arm/dt arm64: soc: ZynqMP DT changes for v5.10 - Fix IRQ flag for PMIC - Align gpio hogs and leds with naming convention - Rename busses to match DT schema - Tune i2c cadence compatible string - Remove undocumented u-boot properties * tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx: arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml arm64: dts: xilinx: align GPIO hog names with dtschema arm64: dts: zynqmp-zcu100-revC: correct interrupt flags arm64: dts: xilinx: Align IOMMU nodename with dtschema arm64: dts: zynqmp: Add GTR transceivers Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'sunxi-dt-for-5.10-2' of ↵Olof Johansson4-0/+356
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt A few more DT patches for 5.10, to support simple-framebuffer on the v3s and the pinecube board * tag 'sunxi-dt-for-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sun8i: v3s: Add simple-framebuffer ARM: dts: sun8i: s3l: add support for Pine64 PineCube IP camera dt-bindings: arm: sunxi: add Pine64 PineCube binding ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for I2C1 at PE bank ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for 8-bit parallel CSI ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 RX/TX ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet support Link: https://lore.kernel.org/r/e7c12b59-8603-438d-908b-5f0bde2c8697.lettre@localhost Signed-off-by: Olof Johansson <[email protected]>
2020-10-03ARM: multi_v7_defconfig: add FMC2 EBI controller supportChristophe Kerello1-0/+1
This patch adds FMC2 EBI controller support used by STM32MP SOCs. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Christophe Kerello <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]> Signed-off-by: Olof Johansson <[email protected]>
2020-10-03ARM: stm32: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexander A. Klimov <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]> Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'v5.10-rockchip-dts32-1' of ↵Olof Johansson13-16/+76
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt cpu-supply fixes (supply for each cpu core not only cpu0) and a spelling for the status property. * tag 'v5.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: replace status value "ok" by "okay" ARM: dts: rockchip: update cpu supplies on rk3066a ARM: dts: rockchip: rk3066a: add label to cpu@1 ARM: dts: rockchip: update cpu supplies on rk3288 Link: https://lore.kernel.org/r/1834049.gShM3QRH0n@diego Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'actions-arm64-dt-for-v5.10' of ↵Olof Johansson1-1/+16
git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM64 DT for v5.10: - Fix the memory region used by pinctrl and sps drivers on the S700 SoC. The issue is fixed by limiting the address space used by pinctrl driver. In hardware these two are separate subsystems but the hw engineers somehow merged the registers space into one. So we now limit the address space with appropriate offsets for the two drivers. - Add DMA controller support for S700 SoC. The relevant driver changes are picked up by DMA Engine mainatainer. The DMA on this SoC can be used for mem-to-mem and mem-to-peripheral transfers. * tag 'actions-arm64-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: arm64: dts: actions: Add DMA Controller for S700 arm64: dts: actions: limit address range for pinctrl node Link: https://lore.kernel.org/r/20200922114030.GC11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'actions-arm-dt-for-v5.10' of ↵Olof Johansson5-3/+109
git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM DT for v5.10: - Add devicetree support for Caninos Loucos Labrador SBC manufactured by Laboratory of Integrated Technological Systems (LSI-TEC), Brazil. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: https://caninosloucos.org/en/ - Fix PPI interrupt specifiers for peripherals attached to Cortex-A9 CPU - Add devicetree support for RoseapplePi SBC manufactured by Roseapple Pi team in Taiwan. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: http://roseapplepi.org/ * tag 'actions-arm-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: ARM: dts: owl-s500: Add RoseapplePi ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiers ARM: dts: Add Caninos Loucos Labrador v2 Link: https://lore.kernel.org/r/20200922113712.GB11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'sunxi-dt-for-5.10-1' of ↵Olof Johansson20-45/+738
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Our usual bunch of patches to support the Allwinner SoCs, this time adding: - Allwinner A100 initial support - Mali, DMA, cedrus and IR Support for the R40 - Crypto support for the v3s - New board: Allwinner A100 Perf1 * tag 'sunxi-dt-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (24 commits) ARM: dts: sun8i: v3s: Enable crypto engine dt-bindings: crypto: Add compatible for V3s dt-bindings: crypto: Specify that allwinner, sun8i-a33-crypto needs reset arm64: dts: allwinner: a64: Update the audio codec compatible arm64: dts: allwinner: a64: Update codec widget names ARM: dts: sun8i: a33: Update codec widget names ARM: dts: sun8i: r40: Add video engine node ARM: dts: sun8i: r40: Add node for system controller dt-bindings: sram: allwinner, sun4i-a10-system-control: Add R40 compatibles ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable IR ARM: dts: sun8i: r40: Add IR nodes dt-bindings: media: allwinner, sun4i-a10-ir: Add R40 compatible ARM: dts: sun8i: r40: Add DMA node dt-bindings: dma: allwinner,sun50i-a64-dma: Add R40 compatible arm64: allwinner: A100: add support for Allwinner Perf1 board dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings arm64: allwinner: A100: add the basical Allwinner A100 DTSI file dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controller dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi ARM: dts: sun4i: Enable HDMI support on the Mele A1000 ... Link: https://lore.kernel.org/r/ac39ee89-ea3a-4971-8cd7-8c4b2ecef39d.lettre@localhost Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'amlogic-dt-2' of ↵Olof Johansson1-2/+0
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: amlogic updates for v5.10 (round 2) - GPU: remove invalid interrupt lines * tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8: remove two invalid interrupt lines from the GPU node Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2-10/+19
Pull kvm fixes from Paolo Bonzini: "Two bugfixes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: VMX: update PFEC_MASK/PFEC_MATCH together with PF intercept KVM: arm64: Restore missing ISB on nVHE __tlb_switch_to_guest
2020-10-03Merge tag 'ti-k3-dt-for-v5.10-part2' of ↵Olof Johansson8-16/+1194
git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dt Second and final device tree updates towards 5.10-rc1 for TI K3 platform. * tag 'ti-k3-dt-for-v5.10-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (23 commits) arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC arm64: dts: ti: k3-j721e-common-proc-board: align GPIO hog names with dtschema arm64: dts: ti: k3-j7200-common-proc-board: Add support for eMMC and SD card arm64: dts: ti: k3-j7200-main: Add support for MMC/SD controller nodes arm64: dts: ti: k3-j7200-som-p0: Add HyperFlash node arm64: dts: ti: k3-j7200-mcu-wakeup: Add HyperBus node arm64: dts: ti: k3-j7200-common-proc-board: Add I2C IO expanders arm64: dts: ti: k3-j7200: Add I2C nodes arm64: dts: ti: k3-j7200-common-proc-board: add mcu cpsw nuss pinmux and phy defs arm64: dts: ti: k3-j7200-mcu: add mcu cpsw nuss node arm64: dts: ti: k3-j7200-main: add main navss cpts node arm64: dts: ti: k3-j7200: add DMA support arm64: dts: ti: Add support for J7200 Common Processor Board arm64: dts: ti: Add support for J7200 SoC dt-bindings: arm: ti: Add bindings for J7200 SoC ... Link: https://lore.kernel.org/r/20201002134559.orvmgbns57qlyn3i@akan Signed-off-by: Olof Johansson <[email protected]>
2020-10-03Merge tag 'renesas-fixes-for-v5.9-tag1' of ↵Olof Johansson1-1/+14
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes Renesas fixes for v5.9 - Fix touch controller probe failure on the iWave RainboW G20D Qseven board. * tag 'renesas-fixes-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: dts: iwg20d-q7-common: Fix touch controller probe failure Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-10-03x86/events/amd/iommu: Fix sizeof mismatchColin Ian King1-1/+1
An incorrect sizeof is being used, struct attribute ** is not correct, it should be struct attribute *. Note that since ** is the same size as * this is not causing any issues. Improve this fix by using sizeof(*attrs) as this allows us to not even reference the type of the pointer. Addresses-Coverity: ("Sizeof not portable (SIZEOF_MISMATCH)") Fixes: 51686546304f ("x86/events/amd/iommu: Fix sysfs perf attribute groups") Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
2020-10-03perf/x86/intel: Check perf metrics feature for each CPUKan Liang1-0/+11
It might be possible that different CPUs have different CPU metrics on a platform. In this case, writing the GLOBAL_CTRL_EN_PERF_METRICS bit to the GLOBAL_CTRL register of a CPU, which doesn't support the TopDown perf metrics feature, causes MSR access error. Current TopDown perf metrics feature is enumerated using the boot CPU's PERF_CAPABILITIES MSR. The MSR only indicates the boot CPU supports this feature. Check the PERF_CAPABILITIES MSR for each CPU. If any CPU doesn't support the perf metrics feature, disable the feature globally. Fixes: 59a854e2f3b9 ("perf/x86/intel: Support TopDown metrics on Ice Lake") Signed-off-by: Kan Liang <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
2020-10-03Merge tag 'usb-for-v5.10' of ↵Greg Kroah-Hartman2-0/+27
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next Felipe writes: USB: changes for v5.10 merge window Most of changes are on dwc3 (38.8%) with cdns3 falling close behind (24.1%). The biggest changes here are a series of non-critical fixes to corner cases on dwc3, produced by Thinh N, and a series of major improvements to cdns3 produced by Peter C. We also have the traditional set of new device support (Intel Keem Bay, Hikey 970) on dwc3. A series of sparse/coccinelle and checkpatch fixes on dwc3 by yours truly and a set of minor changes all over the stack. * tag 'usb-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (117 commits) usb: dwc2: Fix INTR OUT transfers in DDMA mode. usb: dwc2: don't use ID/Vbus detection if usb-role-switch on STM32MP15 SoCs usb: dwc2: override PHY input signals with usb role switch support dt-bindings: usb: dwc2: add optional usb-role-switch property usb: dwc3: of-simple: Add compatible string for Intel Keem Bay platform dt-bindings: usb: Add Intel Keem Bay USB controller bindings usb: dwc3: gadget: Support up to max stream id usb: dwc3: gadget: Return early if no TRB update usb: dwc3: gadget: Keep TRBs in request order usb: dwc3: gadget: Revise setting IOC when no TRB left usb: dwc3: gadget: Look ahead when setting IOC usb: dwc3: gadget: Allow restarting a transfer usb: bdc: remove duplicated error message usb: dwc3: Stop active transfers before halting the controller usb: cdns3: gadget: enlarge the TRB ring length usb: cdns3: gadget: sg_support is only for DEV_VER_V2 or above usb: cdns3: gadget: need to handle sg case for workaround 2 case usb: cdns3: gadget: handle sg list use case at completion correctly usb: cdns3: gadget: add CHAIN and ISP bit for sg list use case usb: cdns3: gadget: improve the dump TRB operation at cdns3_ep_run_transfer ...
2020-10-03Merge tag 'kvmarm-fixes-5.9-3' of ↵Paolo Bonzini1-0/+7
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master KVM/arm64 fixes for 5.9, take #3 - Fix synchronization of VTTBR update on TLB invalidation for nVHE systems
2020-10-03KVM: VMX: update PFEC_MASK/PFEC_MATCH together with PF interceptPaolo Bonzini1-10/+12
The PFEC_MASK and PFEC_MATCH fields in the VMCS reverse the meaning of the #PF intercept bit in the exception bitmap when they do not match. This means that, if PFEC_MASK and/or PFEC_MATCH are set, the hypervisor can get a vmexit for #PF exceptions even when the corresponding bit is clear in the exception bitmap. This is unexpected and is promptly detected by a WARN_ON_ONCE. To fix it, reset PFEC_MASK and PFEC_MATCH when the #PF intercept is disabled (as is common with enable_ept && !allow_smaller_maxphyaddr). Reported-by: Qian Cai <[email protected]>> Reported-by: Naresh Kamboju <[email protected]> Tested-by: Naresh Kamboju <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-10-03mm: remove compat_process_vm_{readv,writev}Christoph Hellwig10-18/+20
Now that import_iovec handles compat iovecs, the native syscalls can be used for the compat case as well. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Al Viro <[email protected]>
2020-10-03fs: remove compat_sys_vmspliceChristoph Hellwig10-9/+10
Now that import_iovec handles compat iovecs, the native vmsplice syscall can be used for the compat case as well. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Al Viro <[email protected]>
2020-10-03fs: remove the compat readv/writev syscallsChristoph Hellwig10-18/+20
Now that import_iovec handles compat iovecs, the native readv and writev syscalls can be used for the compat case as well. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Al Viro <[email protected]>
2020-10-02RISC-V: Add page table dump support for uefiAtish Patra1-6/+42
Extend the current page table dump support in RISC-V to include efi pages as well. Here is the output of efi runtime page table mappings. ---[ UEFI runtime start ]--- 0x0000000020002000-0x0000000020003000 0x00000000be732000 4K PTE D A . . . W R V 0x0000000020018000-0x0000000020019000 0x00000000be738000 4K PTE D A . . . W R V 0x000000002002c000-0x000000002002d000 0x00000000be73c000 4K PTE D A . . . W R V 0x0000000020031000-0x0000000020032000 0x00000000bff61000 4K PTE D A . . X W R V ---[ UEFI runtime end ]--- Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Anup Patel <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-10-02RISC-V: Add EFI runtime servicesAtish Patra8-3/+132
This patch adds EFI runtime service support for RISC-V. Signed-off-by: Atish Patra <[email protected]> [ardb: - Remove the page check] Signed-off-by: Ard Biesheuvel <[email protected]> Acked-by: Ard Biesheuvel <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-10-02RISC-V: Add EFI stub support.Atish Patra4-0/+59
Add a RISC-V architecture specific stub code that actually copies the actual kernel image to a valid address and jump to it after boot services are terminated. Enable UEFI related kernel configs as well for RISC-V. Signed-off-by: Atish Patra <[email protected]> Link: https://lore.kernel.org/r/[email protected] [ardb: - move hartid fetch into check_platform_features() - use image_size not reserve_size - select ISA_C - do not use dram_base] Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-10-02RISC-V: Add PE/COFF header for EFI stubAtish Patra5-2/+212
Linux kernel Image can appear as an EFI application With appropriate PE/COFF header fields in the beginning of the Image header. An EFI application loader can directly load a Linux kernel Image and an EFI stub residing in kernel can boot Linux kernel directly. Add the necessary PE/COFF header. Signed-off-by: Atish Patra <[email protected]> Link: https://lore.kernel.org/r/[email protected] [ardb: - use C prefix for c.li to ensure the expected opcode is emitted - align all image sections according to PE/COFF section alignment ] Signed-off-by: Ard Biesheuvel <[email protected]> Reviewed-by: Anup Patel <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-10-02RISC-V: Implement late mapping page table allocation functionsAtish Patra1-31/+99
Currently, page table setup is done during setup_va_final where fixmap can be used to create the temporary mappings. The physical frame is allocated from memblock_alloc_* functions. However, this won't work if page table mapping needs to be created for a different mm context (i.e. efi mm) at a later point of time. Use generic kernel page allocation function & macros for any mapping after setup_vm_final. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Anup Patel <[email protected]> Acked-by: Mike Rapoport <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-10-02RISC-V: Add early ioremap supportAtish Patra6-0/+51
UEFI uses early IO or memory mappings for runtime services before normal ioremap() is usable. Add the necessary fixmap bindings and pmd mappings for generic ioremap support to work. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Palmer Dabbelt <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-10-02RISC-V: Move DT mapping outof fixmapAnup Patel6-22/+20
Currently, RISC-V reserves 1MB of fixmap memory for device tree. However, it maps only single PMD (2MB) space for fixmap which leaves only < 1MB space left for other kernel features such as early ioremap which requires fixmap as well. The fixmap size can be increased by another 2MB but it brings additional complexity and changes the virtual memory layout as well. If we require some additional feature requiring fixmap again, it has to be moved again. Technically, DT doesn't need a fixmap as the memory occupied by the DT is only used during boot. That's why, We map device tree in early page table using two consecutive PGD mappings at lower addresses (< PAGE_OFFSET). This frees lot of space in fixmap and also makes maximum supported device tree size supported as PGDIR_SIZE. Thus, init memory section can be used for the same purpose as well. This simplifies fixmap implementation. Signed-off-by: Anup Patel <[email protected]> Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Palmer Dabbelt <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-10-02Merge tag 'efi-riscv-shared-for-v5.10' of ↵Palmer Dabbelt2-15/+13
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/efi/efi into for-next Stable branch for v5.10 shared between the EFI and RISC-V trees The RISC-V EFI boot and runtime support will be merged for v5.10 via the RISC-V tree. However, it incorporates some changes that conflict with other EFI changes that are in flight, so this tag serves as a shared base that allows those conflicts to be resolved beforehand. * tag 'efi-riscv-shared-for-v5.10' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/efi/efi: efi/libstub: arm32: Use low allocation for the uncompressed kernel efi/libstub: Export efi_low_alloc_above() to other units efi/libstub: arm32: Base FDT and initrd placement on image address efi: Rename arm-init to efi-init common for all arch include: pe.h: Add RISC-V related PE definition
2020-10-02ARM: dts: meson8: remove two invalid interrupt lines from the GPU nodeMartin Blumenstingl1-2/+0
The 3.10 vendor kernel defines the following GPU 20 interrupt lines: #define INT_MALI_GP AM_IRQ(160) #define INT_MALI_GP_MMU AM_IRQ(161) #define INT_MALI_PP AM_IRQ(162) #define INT_MALI_PMU AM_IRQ(163) #define INT_MALI_PP0 AM_IRQ(164) #define INT_MALI_PP0_MMU AM_IRQ(165) #define INT_MALI_PP1 AM_IRQ(166) #define INT_MALI_PP1_MMU AM_IRQ(167) #define INT_MALI_PP2 AM_IRQ(168) #define INT_MALI_PP2_MMU AM_IRQ(169) #define INT_MALI_PP3 AM_IRQ(170) #define INT_MALI_PP3_MMU AM_IRQ(171) #define INT_MALI_PP4 AM_IRQ(172) #define INT_MALI_PP4_MMU AM_IRQ(173) #define INT_MALI_PP5 AM_IRQ(174) #define INT_MALI_PP5_MMU AM_IRQ(175) #define INT_MALI_PP6 AM_IRQ(176) #define INT_MALI_PP6_MMU AM_IRQ(177) #define INT_MALI_PP7 AM_IRQ(178) #define INT_MALI_PP7_MMU AM_IRQ(179) However, the driver from the 3.10 vendor kernel does not use the following four interrupt lines: - INT_MALI_PP3 - INT_MALI_PP3_MMU - INT_MALI_PP7 - INT_MALI_PP7_MMU Drop the "pp3" and "ppmmu3" interrupt lines. This is also important because there is no matching entry in interrupt-names for it (meaning the "pp2" interrupt is actually assigned to the "pp3" interrupt line). Fixes: 7d3f6b536e72c9 ("ARM: dts: meson8: add the Mali-450 MP6 GPU") Reported-by: Thomas Graichen <[email protected]> Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Kevin Hilman <[email protected]> Tested-by: thomas graichen <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-10-02Merge tag 'riscv-for-linus-5.9-rc8' of ↵Linus Torvalds2-4/+13
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: "Two fixes for this week: - The addition of a symbol export for clint_time_val, which has been inlined into some timex functions and can be used by drivers. - A fix to avoid calling get_cycles() before the timers have been probed. These both only effect !MMU systems" * tag 'riscv-for-linus-5.9-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: RISC-V: Check clint_time_val before use clocksource: clint: Export clint_time_val for modules
2020-10-02Merge tag 'pm-5.9-rc8' of ↵Linus Torvalds1-1/+3
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management fixes from Rafael Wysocki: "These fix one more issue related to the recent RCU-lockdep changes, a typo in documentation and add a missing return statement to intel_pstate. Specifics: - Fix up RCU usage for cpuidle on the ARM imx6q platform (Ulf Hansson) - Fix typo in the PM documentation (Yoann Congal) - Add return statement that is missing after recent changes in the intel_pstate driver (Zhang Rui)" * tag 'pm-5.9-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ARM: imx6q: Fixup RCU usage for cpuidle Documentation: PM: Fix a reStructuredText syntax error cpufreq: intel_pstate: Fix missing return statement
2020-10-02x86: Support Generic Initiator only proximity domainsJonathan Cameron3-0/+24
In common with memoryless domains only register GI domains if the proximity node is not online. If a domain is already a memory containing domain, or a memoryless domain there is nothing to do just because it also contains a Generic Initiator. Signed-off-by: Jonathan Cameron <[email protected]> Acked-by: Borislav Petkov <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2020-10-02s390/startup: correct early pgm check info formattingVasily Gorbik1-1/+2
Early sclp console messages are printed in line mode on z/VM and LPAR, but under kvm newlines matter. Add a missing newline between "kernel version" and "Kernel fault". Signed-off-by: Vasily Gorbik <[email protected]>
2020-10-02s390: remove orphaned extern variables declarationsVasily Gorbik2-4/+0
arch/s390/kernel/entry.h: suspend_zero_pages - only declaration left after commit 394216275c7d ("s390: remove broken hibernate / power management support") arch/s390/include/asm/setup.h: vmhalt_cmd - only declaration left after commit 99ca4e582d4a ("[S390] kernel: Shutdown Actions Interface") arch/s390/include/asm/setup.h: vmpoff_cmd - only declaration left after commit 99ca4e582d4a ("[S390] kernel: Shutdown Actions Interface") Signed-off-by: Vasily Gorbik <[email protected]>
2020-10-02s390/kasan: make sure int handler always run with DAT onVasily Gorbik1-4/+8
Since commit 998f5bbe3dbd ("s390/kasan: fix early pgm check handler execution") early pgm check handler is executed with DAT on if Kasan is enabled. Still there is a window between setup_lowcore_dat_off() and setup_lowcore_dat_on() when int handlers could be executed with DAT off under Kasan. If this happens the kernel ends up in pgm check loop due to Kasan shadow memory access attempts. With Kasan enabled paging is initialized much earlier and DAT flag has to be on at all times instrumented code is executed. Make sure int handlers are set up to be called with DAT on right away in this case. Signed-off-by: Vasily Gorbik <[email protected]>
2020-10-02s390/ipl: add support to control memory clearing for nvme re-IPLGerald Schaefer1-6/+42
Re-IPL for nvme is currently done by using diag 308 with the "Load Clear" subcode, which means that all memory will be cleared. This can increase re-IPL duration considerably on very large machines. For list-directed IPL like nvme or fcp IPL, a "Load Normal" subcode was introduced with z14. The "Load Normal" diag 308 subcode allows to re-IPL without clearing memory. This patch adds a new "clear" sysfs attribute to /sys/firmware/reipl/nvme, which can be set to either "0" or "1" to disable or enable re-IPL with memory clearing. The default value is "0", which disables memory clearing. Signed-off-by: Gerald Schaefer <[email protected]> Reviewed-by: Vasily Gorbik <[email protected]> Tested-by: Alexander Egorenkov <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2020-10-02s390/nvme: support firmware-assisted dump to NVMe disksAlexander Egorenkov5-19/+34
From the kernel perspective NVMe dump works exactly like zFCP dump. Therefore, adapt all places where code explicitly tests only for IPL of type FCP DUMP. And also set the memory end correctly in this case. Signed-off-by: Alexander Egorenkov <[email protected]> Reviewed-by: Vasily Gorbik <[email protected]> Reviewed-by: Philipp Rudo <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2020-10-02s390/ipl: support NVMe IPL kernel parametersAlexander Egorenkov1-8/+23
Enable extracting of extra kernel command-line parameters from the NVMe IPL block passed by the firmware to the kernel at boot. Signed-off-by: Alexander Egorenkov <[email protected]> Reviewed-by: Vasily Gorbik <[email protected]> Reviewed-by: Philipp Rudo <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2020-10-02s390: nvme dump supportJason J. Herne2-1/+71
Add the nvme dump ipl type, associated data, and sysfs entries. This allows booting into a stand alone dump environment that resides on an nvme device. Signed-off-by: Jason J. Herne <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2020-10-02Merge branch 'for-next/mte' into for-next/coreWill Deacon39-49/+1303
Add userspace support for the Memory Tagging Extension introduced by Armv8.5. (Catalin Marinas and others) * for-next/mte: (30 commits) arm64: mte: Fix typo in memory tagging ABI documentation arm64: mte: Add Memory Tagging Extension documentation arm64: mte: Kconfig entry arm64: mte: Save tags when hibernating arm64: mte: Enable swap of tagged pages mm: Add arch hooks for saving/restoring tags fs: Handle intra-page faults in copy_mount_options() arm64: mte: ptrace: Add NT_ARM_TAGGED_ADDR_CTRL regset arm64: mte: ptrace: Add PTRACE_{PEEK,POKE}MTETAGS support arm64: mte: Allow {set,get}_tagged_addr_ctrl() on non-current tasks arm64: mte: Restore the GCR_EL1 register after a suspend arm64: mte: Allow user control of the generated random tags via prctl() arm64: mte: Allow user control of the tag check mode via prctl() mm: Allow arm64 mmap(PROT_MTE) on RAM-based files arm64: mte: Validate the PROT_MTE request via arch_validate_flags() mm: Introduce arch_validate_flags() arm64: mte: Add PROT_MTE support to mmap() and mprotect() mm: Introduce arch_calc_vm_flag_bits() arm64: mte: Tags-aware aware memcmp_pages() implementation arm64: Avoid unnecessary clear_user_page() indirection ...
2020-10-02Merge branch 'for-next/ghostbusters' into for-next/coreWill Deacon32-1054/+981
Fix and subsequently rewrite Spectre mitigations, including the addition of support for PR_SPEC_DISABLE_NOEXEC. (Will Deacon and Marc Zyngier) * for-next/ghostbusters: (22 commits) arm64: Add support for PR_SPEC_DISABLE_NOEXEC prctl() option arm64: Pull in task_stack_page() to Spectre-v4 mitigation code KVM: arm64: Allow patching EL2 vectors even with KASLR is not enabled arm64: Get rid of arm64_ssbd_state KVM: arm64: Convert ARCH_WORKAROUND_2 to arm64_get_spectre_v4_state() KVM: arm64: Get rid of kvm_arm_have_ssbd() KVM: arm64: Simplify handling of ARCH_WORKAROUND_2 arm64: Rewrite Spectre-v4 mitigation code arm64: Move SSBD prctl() handler alongside other spectre mitigation code arm64: Rename ARM64_SSBD to ARM64_SPECTRE_V4 arm64: Treat SSBS as a non-strict system feature arm64: Group start_thread() functions together KVM: arm64: Set CSV2 for guests on hardware unaffected by Spectre-v2 arm64: Rewrite Spectre-v2 mitigation code arm64: Introduce separate file for spectre mitigations and reporting arm64: Rename ARM64_HARDEN_BRANCH_PREDICTOR to ARM64_SPECTRE_V2 KVM: arm64: Simplify install_bp_hardening_cb() KVM: arm64: Replace CONFIG_KVM_INDIRECT_VECTORS with CONFIG_RANDOMIZE_BASE arm64: Remove Spectre-related CONFIG_* options arm64: Run ARCH_WORKAROUND_2 enabling code on all CPUs ...
2020-10-02Merge branches 'for-next/acpi', 'for-next/boot', 'for-next/bpf', ↵Will Deacon64-539/+852
'for-next/cpuinfo', 'for-next/fpsimd', 'for-next/misc', 'for-next/mm', 'for-next/pci', 'for-next/perf', 'for-next/ptrauth', 'for-next/sdei', 'for-next/selftests', 'for-next/stacktrace', 'for-next/svm', 'for-next/topology', 'for-next/tpyos' and 'for-next/vdso' into for-next/core Remove unused functions and parameters from ACPI IORT code. (Zenghui Yu via Lorenzo Pieralisi) * for-next/acpi: ACPI/IORT: Remove the unused inline functions ACPI/IORT: Drop the unused @ops of iort_add_device_replay() Remove redundant code and fix documentation of caching behaviour for the HVC_SOFT_RESTART hypercall. (Pingfan Liu) * for-next/boot: Documentation/kvm/arm: improve description of HVC_SOFT_RESTART arm64/relocate_kernel: remove redundant code Improve reporting of unexpected kernel traps due to BPF JIT failure. (Will Deacon) * for-next/bpf: arm64: Improve diagnostics when trapping BRK with FAULT_BRK_IMM Improve robustness of user-visible HWCAP strings and their corresponding numerical constants. (Anshuman Khandual) * for-next/cpuinfo: arm64/cpuinfo: Define HWCAP name arrays per their actual bit definitions Cleanups to handling of SVE and FPSIMD register state in preparation for potential future optimisation of handling across syscalls. (Julien Grall) * for-next/fpsimd: arm64/sve: Implement a helper to load SVE registers from FPSIMD state arm64/sve: Implement a helper to flush SVE registers arm64/fpsimdmacros: Allow the macro "for" to be used in more cases arm64/fpsimdmacros: Introduce a macro to update ZCR_EL1.LEN arm64/signal: Update the comment in preserve_sve_context arm64/fpsimd: Update documentation of do_sve_acc Miscellaneous changes. (Tian Tao and others) * for-next/misc: arm64/mm: return cpu_all_mask when node is NUMA_NO_NODE arm64: mm: Fix missing-prototypes in pageattr.c arm64/fpsimd: Fix missing-prototypes in fpsimd.c arm64: hibernate: Remove unused including <linux/version.h> arm64/mm: Refactor {pgd, pud, pmd, pte}_ERROR() arm64: Remove the unused include statements arm64: get rid of TEXT_OFFSET arm64: traps: Add str of description to panic() in die() Memory management updates and cleanups. (Anshuman Khandual and others) * for-next/mm: arm64: dbm: Invalidate local TLB when setting TCR_EL1.HD arm64: mm: Make flush_tlb_fix_spurious_fault() a no-op arm64/mm: Unify CONT_PMD_SHIFT arm64/mm: Unify CONT_PTE_SHIFT arm64/mm: Remove CONT_RANGE_OFFSET arm64/mm: Enable THP migration arm64/mm: Change THP helpers to comply with generic MM semantics arm64/mm/ptdump: Add address markers for BPF regions Allow prefetchable PCI BARs to be exposed to userspace using normal non-cacheable mappings. (Clint Sbisa) * for-next/pci: arm64: Enable PCI write-combine resources under sysfs Perf/PMU driver updates. (Julien Thierry and others) * for-next/perf: perf: arm-cmn: Fix conversion specifiers for node type perf: arm-cmn: Fix unsigned comparison to less than zero arm_pmu: arm64: Use NMIs for PMU arm_pmu: Introduce pmu_irq_ops KVM: arm64: pmu: Make overflow handler NMI safe arm64: perf: Defer irq_work to IPI_IRQ_WORK arm64: perf: Remove PMU locking arm64: perf: Avoid PMXEV* indirection arm64: perf: Add missing ISB in armv8pmu_enable_counter() perf: Add Arm CMN-600 PMU driver perf: Add Arm CMN-600 DT binding arm64: perf: Add support caps under sysfs drivers/perf: thunderx2_pmu: Fix memory resource error handling drivers/perf: xgene_pmu: Fix uninitialized resource struct perf: arm_dsu: Support DSU ACPI devices arm64: perf: Remove unnecessary event_idx check drivers/perf: hisi: Add missing include of linux/module.h arm64: perf: Add general hardware LLC events for PMUv3 Support for the Armv8.3 Pointer Authentication enhancements. (By Amit Daniel Kachhap) * for-next/ptrauth: arm64: kprobe: clarify the comment of steppable hint instructions arm64: kprobe: disable probe of fault prone ptrauth instruction arm64: cpufeature: Modify address authentication cpufeature to exact arm64: ptrauth: Introduce Armv8.3 pointer authentication enhancements arm64: traps: Allow force_signal_inject to pass esr error code arm64: kprobe: add checks for ARMv8.3-PAuth combined instructions Tonnes of cleanup to the SDEI driver. (Gavin Shan) * for-next/sdei: firmware: arm_sdei: Remove _sdei_event_unregister() firmware: arm_sdei: Remove _sdei_event_register() firmware: arm_sdei: Introduce sdei_do_local_call() firmware: arm_sdei: Cleanup on cross call function firmware: arm_sdei: Remove while loop in sdei_event_unregister() firmware: arm_sdei: Remove while loop in sdei_event_register() firmware: arm_sdei: Remove redundant error message in sdei_probe() firmware: arm_sdei: Remove duplicate check in sdei_get_conduit() firmware: arm_sdei: Unregister driver on error in sdei_init() firmware: arm_sdei: Avoid nested statements in sdei_init() firmware: arm_sdei: Retrieve event number from event instance firmware: arm_sdei: Common block for failing path in sdei_event_create() firmware: arm_sdei: Remove sdei_is_err() Selftests for Pointer Authentication and FPSIMD/SVE context-switching. (Mark Brown and Boyan Karatotev) * for-next/selftests: selftests: arm64: Add build and documentation for FP tests selftests: arm64: Add wrapper scripts for stress tests selftests: arm64: Add utility to set SVE vector lengths selftests: arm64: Add stress tests for FPSMID and SVE context switching selftests: arm64: Add test for the SVE ptrace interface selftests: arm64: Test case for enumeration of SVE vector lengths kselftests/arm64: add PAuth tests for single threaded consistency and differently initialized keys kselftests/arm64: add PAuth test for whether exec() changes keys kselftests/arm64: add nop checks for PAuth tests kselftests/arm64: add a basic Pointer Authentication test Implementation of ARCH_STACKWALK for unwinding. (Mark Brown) * for-next/stacktrace: arm64: Move console stack display code to stacktrace.c arm64: stacktrace: Convert to ARCH_STACKWALK arm64: stacktrace: Make stack walk callback consistent with generic code stacktrace: Remove reliable argument from arch_stack_walk() callback Support for ASID pinning, which is required when sharing page-tables with the SMMU. (Jean-Philippe Brucker) * for-next/svm: arm64: cpufeature: Export symbol read_sanitised_ftr_reg() arm64: mm: Pin down ASIDs for sharing mm with devices Rely on firmware tables for establishing CPU topology. (Valentin Schneider) * for-next/topology: arm64: topology: Stop using MPIDR for topology information Spelling fixes. (Xiaoming Ni and Yanfei Xu) * for-next/tpyos: arm64/numa: Fix a typo in comment of arm64_numa_init arm64: fix some spelling mistakes in the comments by codespell vDSO cleanups. (Will Deacon) * for-next/vdso: arm64: vdso: Fix unusual formatting in *setup_additional_pages() arm64: vdso32: Remove a bunch of #ifdef CONFIG_COMPAT_VDSO guards
2020-10-02x86/dumpstack: Fix misleading instruction pointer error messageMark Mossberg1-1/+2
Printing "Bad RIP value" if copy_code() fails can be misleading for userspace pointers, since copy_code() can fail if the instruction pointer is valid but the code is paged out. This is because copy_code() calls copy_from_user_nmi() for userspace pointers, which disables page fault handling. This is reproducible in OOM situations, where it's plausible that the code may be reclaimed in the time between entry into the kernel and when this message is printed. This leaves a misleading log in dmesg that suggests instruction pointer corruption has occurred, which may alarm users. Change the message to state the error condition more precisely. [ bp: Massage a bit. ] Signed-off-by: Mark Mossberg <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
2020-10-02Merge branches 'kvm-arm64/pt-new' and 'kvm-arm64/pmu-5.9' into ↵Marc Zyngier2-8/+17
kvmarm-master/next Signed-off-by: Marc Zyngier <[email protected]>
2020-10-02KVM: arm64: Ensure user_mem_abort() return value is initialisedWill Deacon1-1/+1
If a change in the MMU notifier sequence number forces user_mem_abort() to return early when attempting to handle a stage-2 fault, we return uninitialised stack to kvm_handle_guest_abort(), which could potentially result in the injection of an external abort into the guest or a spurious return to userspace. Neither or these are what we want to do. Initialise 'ret' to 0 in user_mem_abort() so that bailing due to a change in the MMU notrifier sequence number is treated as though the fault was handled. Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Reviewed-by: Alexandru Elisei <[email protected]> Reviewed-by: Gavin Shan <[email protected]> Cc: Gavin Shan <[email protected]> Cc: Alexandru Elisei <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-10-02KVM: arm64: Pass level hint to TLBI during stage-2 permission faultWill Deacon1-7/+16
Alex pointed out that we don't pass a level hint to the TLBI instruction when handling a stage-2 permission fault, even though the walker does at some point have the level information in its hands. Rework stage2_update_leaf_attrs() so that it can optionally return the level of the updated pte to its caller, which can in turn be used to provide the correct TLBI level hint. Reported-by: Alexandru Elisei <[email protected]> Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Reviewed-by: Alexandru Elisei <[email protected]> Reviewed-by: Gavin Shan <[email protected]> Cc: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected]
2020-10-02crypto: x86/poly1305 - Remove assignments with no effectHerbert Xu1-3/+0
This patch removes a few ineffectual assignments from the function crypto_poly1305_setdctxkey. Reported-by: kernel test robot <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2020-10-01Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextDavid S. Miller1-12/+23
Daniel Borkmann says: ==================== pull-request: bpf-next 2020-10-01 The following pull-request contains BPF updates for your *net-next* tree. We've added 90 non-merge commits during the last 8 day(s) which contain a total of 103 files changed, 7662 insertions(+), 1894 deletions(-). Note that once bpf(/net) tree gets merged into net-next, there will be a small merge conflict in tools/lib/bpf/btf.c between commit 1245008122d7 ("libbpf: Fix native endian assumption when parsing BTF") from the bpf tree and the commit 3289959b97ca ("libbpf: Support BTF loading and raw data output in both endianness") from the bpf-next tree. Correct resolution would be to stick with bpf-next, it should look like: [...] /* check BTF magic */ if (fread(&magic, 1, sizeof(magic), f) < sizeof(magic)) { err = -EIO; goto err_out; } if (magic != BTF_MAGIC && magic != bswap_16(BTF_MAGIC)) { /* definitely not a raw BTF */ err = -EPROTO; goto err_out; } /* get file size */ [...] The main changes are: 1) Add bpf_snprintf_btf() and bpf_seq_printf_btf() helpers to support displaying BTF-based kernel data structures out of BPF programs, from Alan Maguire. 2) Speed up RCU tasks trace grace periods by a factor of 50 & fix a few race conditions exposed by it. It was discussed to take these via BPF and networking tree to get better testing exposure, from Paul E. McKenney. 3) Support multi-attach for freplace programs, needed for incremental attachment of multiple XDP progs using libxdp dispatcher model, from Toke Høiland-Jørgensen. 4) libbpf support for appending new BTF types at the end of BTF object, allowing intrusive changes of prog's BTF (useful for future linking), from Andrii Nakryiko. 5) Several BPF helper improvements e.g. avoid atomic op in cookie generator and add a redirect helper into neighboring subsys, from Daniel Borkmann. 6) Allow map updates on sockmaps from bpf_iter context in order to migrate sockmaps from one to another, from Lorenz Bauer. 7) Fix 32 bit to 64 bit assignment from latest alu32 bounds tracking which caused a verifier issue due to type downgrade to scalar, from John Fastabend. 8) Follow-up on tail-call support in BPF subprogs which optimizes x64 JIT prologue and epilogue sections, from Maciej Fijalkowski. 9) Add an option to perf RB map to improve sharing of event entries by avoiding remove- on-close behavior. Also, add BPF_PROG_TEST_RUN for raw_tracepoint, from Song Liu. 10) Fix a crash in AF_XDP's socket_release when memory allocation for UMEMs fails, from Magnus Karlsson. ==================== Signed-off-by: David S. Miller <[email protected]>
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