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2023-10-23s390/mm: move translation-exception identification structure to fault.hHeiko Carstens2-31/+42
Move translation-exception identification structure to new fault.h header file, change it to a union, and change existing kvm code accordingly. The new union will be used by subsequent patches. Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: use static key for store indicationHeiko Carstens1-4/+7
Generate slightly better code by using a static key to implement store indication. This allows to get rid of a memory access on the hot path. Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: use get_fault_address() everywhereHeiko Carstens1-9/+7
Use the get_fault_address() helper function instead of open-coding it at many locations. Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: replace WARN_ON_ONCE() with unreachable()Heiko Carstens1-2/+1
do_secure_storage_access() contains a switch statements which handles all possible return values from get_fault_type(). Therefore remove the pointless default case error handling and replace it with unreachable(). Reviewed-by: Janosch Frank <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: remove noinline attribute from all functionsHeiko Carstens1-5/+5
Remove all noinline attribute from all functions and leave the inlining decisions up to the compiler. Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: remove line breakHeiko Carstens1-2/+1
chechpatch reports: CHECK: Alignment should match open parenthesis + if (IS_ENABLED(CONFIG_PGSTE) && gmap && + (flags & FAULT_FLAG_RETRY_NOWAIT)) { Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: include linux/mmu_context.hHeiko Carstens1-1/+1
Include linux/mmu_context.h instead asm/mmu_context.h. checkpatch reports: CHECK: Consider using #include <linux/mmu_context.h> instead of <asm/mmu_context.h> +#include <asm/mmu_context.h> Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: have balanced braces, remove unnecessary blanksHeiko Carstens1-6/+6
Remove unnecessary braces and also blanks after casts. Add braces to have balanced braces where missing. Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: use pr_warn(), pr_cont(), ... instead of open-codingHeiko Carstens1-7/+5
Use pr_warn() and friends instead of open-coding with printk(). Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: use pr_warn_ratelimited()Heiko Carstens1-3/+2
Use pr_warn_ratelimited() instead of printk_ratelimited(). checkpatch reports: WARNING: Prefer ... pr_warn_ratelimited(... to printk_ratelimited(KERN_WARNING ... + printk_ratelimited(KERN_WARNING Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: use __ratelimit() instead of printk_ratelimit()Heiko Carstens1-1/+3
Just like other architectures make use __ratelimit() instead of printk_ratelimit(). Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: reverse x-mas tree coding styleHeiko Carstens1-5/+5
Have reverse x-mas tree coding style for variables everywhere. Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23s390/mm,fault: remove and improve comments, adjust whitespaceHeiko Carstens1-63/+23
Remove wrong, outdated, and pointless comments. Adjust wording for some comments, and adjust whitespace at some places. Reviewed-by: Claudio Imbrenda <[email protected]> Signed-off-by: Heiko Carstens <[email protected]> Signed-off-by: Vasily Gorbik <[email protected]>
2023-10-23arm64: cpufeature: Change DBM to display enabled coresJeremy Linton1-25/+8
Now that we have the ability to display the list of cores with a feature when its selectivly enabled, lets convert DBM to use that as well. Signed-off-by: Jeremy Linton <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2023-10-23arm64: cpufeature: Display the set of cores with a featureJeremy Linton2-9/+15
The AMU feature can be enabled on a subset of the cores in a system. Because of that, it prints a message for each core as it is detected. This becomes tedious when there are hundreds of cores. Instead, for CPU features which can be enabled on a subset of the present cores, lets wait until update_cpu_capabilities() and print the subset of cores the feature was enabled on. Signed-off-by: Jeremy Linton <[email protected]> Reviewed-by: Ionela Voinescu <[email protected]> Tested-by: Ionela Voinescu <[email protected]> Reviewed-by: Punit Agrawal <[email protected]> Tested-by: Punit Agrawal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2023-10-23x86: Enable IBT in Rust if enabled in CMatthew Maurer1-0/+1
These flags are not made conditional on compiler support because at the moment exactly one version of rustc supported, and that one supports these flags. Building without these additional flags will manifest as objtool printing a large number of errors about missing ENDBR and if CFI is enabled (not currently possible) will result in incorrectly structured function prefixes. Signed-off-by: Matthew Maurer <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Acked-by: "Peter Zijlstra (Intel)" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Miguel Ojeda <[email protected]>
2023-10-23powerpc/mm: Fix boot crash with FLATMEMMichael Ellerman2-1/+2
Erhard reported that his G5 was crashing with v6.6-rc kernels: mpic: Setting up HT PICs workarounds for U3/U4 BUG: Unable to handle kernel data access at 0xfeffbb62ffec65fe Faulting instruction address: 0xc00000000005dc40 Oops: Kernel access of bad area, sig: 11 [#1] BE PAGE_SIZE=4K MMU=Hash SMP NR_CPUS=2 PowerMac Modules linked in: CPU: 0 PID: 0 Comm: swapper/0 Tainted: G T 6.6.0-rc3-PMacGS #1 Hardware name: PowerMac11,2 PPC970MP 0x440101 PowerMac NIP: c00000000005dc40 LR: c000000000066660 CTR: c000000000007730 REGS: c0000000022bf510 TRAP: 0380 Tainted: G T (6.6.0-rc3-PMacGS) MSR: 9000000000001032 <SF,HV,ME,IR,DR,RI> CR: 44004242 XER: 00000000 IRQMASK: 3 GPR00: 0000000000000000 c0000000022bf7b0 c0000000010c0b00 00000000000001ac GPR04: 0000000003c80000 0000000000000300 c0000000f20001ae 0000000000000300 GPR08: 0000000000000006 feffbb62ffec65ff 0000000000000001 0000000000000000 GPR12: 9000000000001032 c000000002362000 c000000000f76b80 000000000349ecd8 GPR16: 0000000002367ba8 0000000002367f08 0000000000000006 0000000000000000 GPR20: 00000000000001ac c000000000f6f920 c0000000022cd985 000000000000000c GPR24: 0000000000000300 00000003b0a3691d c0003e008030000e 0000000000000000 GPR28: c00000000000000c c0000000f20001ee feffbb62ffec65fe 00000000000001ac NIP hash_page_do_lazy_icache+0x50/0x100 LR __hash_page_4K+0x420/0x590 Call Trace: hash_page_mm+0x364/0x6f0 do_hash_fault+0x114/0x2b0 data_access_common_virt+0x198/0x1f0 --- interrupt: 300 at mpic_init+0x4bc/0x10c4 NIP: c000000002020a5c LR: c000000002020a04 CTR: 0000000000000000 REGS: c0000000022bf9f0 TRAP: 0300 Tainted: G T (6.6.0-rc3-PMacGS) MSR: 9000000000001032 <SF,HV,ME,IR,DR,RI> CR: 24004248 XER: 00000000 DAR: c0003e008030000e DSISR: 40000000 IRQMASK: 1 ... NIP mpic_init+0x4bc/0x10c4 LR mpic_init+0x464/0x10c4 --- interrupt: 300 pmac_setup_one_mpic+0x258/0x2dc pmac_pic_init+0x28c/0x3d8 init_IRQ+0x90/0x140 start_kernel+0x57c/0x78c start_here_common+0x1c/0x20 A bisect pointed to the breakage beginning with commit 9fee28baa601 ("powerpc: implement the new page table range API"). Analysis of the oops pointed to a struct page with a corrupted compound_head being loaded via page_folio() -> _compound_head() in hash_page_do_lazy_icache(). The access by the mpic code is to an MMIO address, so the expectation is that the struct page for that address would be initialised by init_unavailable_range(), as pointed out by Aneesh. Instrumentation showed that was not the case, which eventually lead to the realisation that pfn_valid() was returning false for that address, causing the struct page to not be initialised. Because the system is using FLATMEM, the version of pfn_valid() in memory_model.h is used: static inline int pfn_valid(unsigned long pfn) { ... return pfn >= pfn_offset && (pfn - pfn_offset) < max_mapnr; } Which relies on max_mapnr being initialised. Early in boot max_mapnr is zero meaning no PFNs are valid. max_mapnr is initialised in mem_init() called via: start_kernel() mm_core_init() # init/main.c:928 mem_init() But that is too late for the usage in init_unavailable_range() called via: start_kernel() setup_arch() # init/main.c:893 paging_init() free_area_init() init_unavailable_range() Although max_mapnr is currently set in mem_init(), the value is actually already available much earlier, as soon as mem_topology_setup() has completed, which is also before paging_init() is called. So move the initialisation there, which causes paging_init() to correctly initialise the struct page and fixes the bug. This bug seems to have been lurking for years, but went unnoticed because the pre-folio code was inspecting the uninitialised page->flags but not dereferencing it. Thanks to Erhard and Aneesh for help debugging. Reported-by: Erhard Furtner <[email protected]> Closes: https://lore.kernel.org/all/20230929132750.3cd98452@yea/ Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2023-10-23powerpc/bpf: use bpf_jit_binary_pack_[alloc|finalize|free]Hari Bathini4-51/+96
Use bpf_jit_binary_pack_alloc in powerpc jit. The jit engine first writes the program to the rw buffer. When the jit is done, the program is copied to the final location with bpf_jit_binary_pack_finalize. With multiple jit_subprogs, bpf_jit_free is called on some subprograms that haven't got bpf_jit_binary_pack_finalize() yet. Implement custom bpf_jit_free() like in commit 1d5f82d9dd47 ("bpf, x86: fix freeing of not-finalized bpf_prog_pack") to call bpf_jit_binary_pack_finalize(), if necessary. As bpf_flush_icache() is not needed anymore, remove it. Signed-off-by: Hari Bathini <[email protected]> Acked-by: Song Liu <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2023-10-23powerpc/bpf: rename powerpc64_jit_data to powerpc_jit_dataHari Bathini1-2/+2
powerpc64_jit_data is a misnomer as it is meant for both ppc32 and ppc64. Rename it to powerpc_jit_data. Signed-off-by: Hari Bathini <[email protected]> Acked-by: Song Liu <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2023-10-23powerpc/bpf: implement bpf_arch_text_invalidate for bpf_prog_packHari Bathini1-0/+15
Implement bpf_arch_text_invalidate and use it to fill unused part of the bpf_prog_pack with trap instructions when a BPF program is freed. Signed-off-by: Hari Bathini <[email protected]> Acked-by: Song Liu <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2023-10-23powerpc/bpf: implement bpf_arch_text_copyHari Bathini1-1/+19
bpf_arch_text_copy is used to dump JITed binary to RX page, allowing multiple BPF programs to share the same page. Use the newly introduced patch_instructions() to implement it. Signed-off-by: Hari Bathini <[email protected]> Acked-by: Song Liu <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2023-10-23powerpc/code-patching: introduce patch_instructions()Hari Bathini2-3/+139
patch_instruction() entails setting up pte, patching the instruction, clearing the pte and flushing the tlb. If multiple instructions need to be patched, every instruction would have to go through the above drill unnecessarily. Instead, introduce patch_instructions() function that sets up the pte, clears the pte and flushes the tlb only once per page range of instructions to be patched. Duplicate most of the patch_instruction() code instead of merging with it, to avoid the performance degradation observed on ppc32, for patch_instruction(), with the code path merged. Also, setup poking_init() always as BPF expects poking_init() to be setup even when STRICT_KERNEL_RWX is off. Signed-off-by: Hari Bathini <[email protected]> Acked-by: Song Liu <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2023-10-23powerpc/32s: Implement local_flush_tlb_page_psize()Michael Ellerman1-1/+1
There's a single call to local_flush_tlb_page_psize() in the code patching code. That call is never executed on 32-bit Book3S, because it's guarded by mm_patch_enabled() which is essentially a radix_enabled() check, which is always false on 32s. However depending on how the optimiser sees things it may still trip over the BUILD_BUG() in the 32s stub of local_flush_tlb_page_psize(). To avoid that, implement it in terms of flush_range() so that if it ever becomes called it should function, even if not optimally. Note that flush_range() deals with page aligning the address and so on, and that 32s doesn't support huge pages so there should be no issue with non-standard page sizes needing to be flushed. Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2023-10-23Merge tag 'v6.6-rc7' into sched/core, to pick up fixesIngo Molnar87-353/+630
Pick up recent sched/urgent fixes merged upstream. Signed-off-by: Ingo Molnar <[email protected]>
2023-10-23BackMerge tag 'v6.6-rc7' into drm-nextDave Airlie221-977/+1494
This is needed to add the msm pr which is based on a higher base. Signed-off-by: Dave Airlie <[email protected]>
2023-10-23m68k: 68000: fix warning in timer codeGreg Ungerer1-0/+2
When building with W=1: CC arch/m68k/68000/timers.o arch/m68k/68000/timers.c:120:5: warning: no previous prototype for ‘m68328_hwclk’ [-Wmissing-prototypes] int m68328_hwclk(int set, struct rtc_time *t) ^~~~~~~~~~~~ Include m68328.h to get prototype for m68328_hwclk(). Signed-off-by: Greg Ungerer <[email protected]>
2023-10-23m68k: 68000: fix warnings in 68000 interrupt handlingGreg Ungerer2-1/+11
When building with W=1: CC arch/m68k/68000/ints.o arch/m68k/68000/ints.c:77:6: warning: no previous prototype for ‘process_int’ [-Wmissing-prototypes] void process_int(int vec, struct pt_regs *fp) ^~~~~~~~~~~ arch/m68k/68000/ints.c:153:13: warning: no previous prototype for ‘trap_init’ [-Wmissing-prototypes] void __init trap_init(void) ^~~~~~~~~ Include linux/cpu.h to get the prototype for taps_init(). Create a local ints.h for prototype of process_int(). Also mark process_int() as asmlinkage, since it is called from the first level interrupt assembly handler. Signed-off-by: Greg Ungerer <[email protected]>
2023-10-23m68k: coldfire: remove unused variable in MMU codeGreg Ungerer1-2/+1
When building with W=1: CC arch/m68k/mm/mcfmmu.o arch/m68k/mm/mcfmmu.c: In function ‘paging_init’: arch/m68k/mm/mcfmmu.c:41:30: warning: variable ‘bootmem_end’ set but not used [-Wunused-but-set-variable] unsigned long next_pgtable, bootmem_end; ^~~~~~~~~~~ Remove variable bootmem_end and its unused setting. Signed-off-by: Greg Ungerer <[email protected]>
2023-10-23m68k: coldfire: fix warnings in uboot argument processingGreg Ungerer1-5/+8
When building with W=1: CC arch/m68k/kernel/uboot.o arch/m68k/kernel/uboot.c: In function ‘parse_uboot_commandline’: arch/m68k/kernel/uboot.c:68:36: warning: variable ‘uboot_initrd_end’ set but not used [-Wunused-but-set-variable] unsigned long uboot_initrd_start, uboot_initrd_end; ^~~~~~~~~~~~~~~~ arch/m68k/kernel/uboot.c:68:16: warning: variable ‘uboot_initrd_start’ set but not used [-Wunused-but-set-variable] unsigned long uboot_initrd_start, uboot_initrd_end; ^~~~~~~~~~~~~~~~~~ arch/m68k/kernel/uboot.c:66:16: warning: variable ‘uboot_kbd’ set but not used [-Wunused-but-set-variable] unsigned long uboot_kbd; ^~~~~~~~~ arch/m68k/kernel/uboot.c: At top level: arch/m68k/kernel/uboot.c:90:13: warning: no previous prototype for ‘process_uboot_commandline’ [-Wmissing-prototypes] __init void process_uboot_commandline(char *commandp, int size) ^~~~~~~~~~~~~~~~~~~~~~~~~ A couple of issues here. Firstly we already have a bootinfo.h that has a prototype for process_uboot_commandline(), we should include that. Secondly uboot_kbd is not used at all and can be removed. Thirdly the conditional code based on CONFIG_BLK_DEV_INITRD means that sometimes uboot_initrd_start and uboot_initrd_end are not needed. Make their declaration and asignment conditional on CONFIG_BLK_DEV_INITRD same as the code that uses them. Signed-off-by: Greg Ungerer <[email protected]>
2023-10-23m68k: coldfire: make mcf_maskimr() staticGreg Ungerer1-2/+2
When building with W=1: CC arch/m68k/coldfire/intc.o arch/m68k/coldfire/intc.c:83:6: warning: no previous prototype for ‘mcf_maskimr’ [-Wmissing-prototypes] void mcf_maskimr(unsigned int mask) ^~~~~~~~~~~ The mcf_maskimr() function is only used within this file, make it static to reduce name space pollution and fix warning. Signed-off-by: Greg Ungerer <[email protected]>
2023-10-23m68k: coldfire: ensure gpio prototypes visibleGreg Ungerer1-4/+4
When building with W=1: CC arch/m68k/coldfire/gpio.o arch/m68k/coldfire/gpio.c:19:5: warning: no previous prototype for ‘__mcfgpio_get_value’ [-Wmissing-prototypes] int __mcfgpio_get_value(unsigned gpio) ^~~~~~~~~~~~~~~~~~~ arch/m68k/coldfire/gpio.c:25:6: warning: no previous prototype for ‘__mcfgpio_set_value’ [-Wmissing-prototypes] void __mcfgpio_set_value(unsigned gpio, int value) ^~~~~~~~~~~~~~~~~~~ arch/m68k/coldfire/gpio.c:50:5: warning: no previous prototype for ‘__mcfgpio_direction_input’ [-Wmissing-prototypes] int __mcfgpio_direction_input(unsigned gpio) ^~~~~~~~~~~~~~~~~~~~~~~~~ arch/m68k/coldfire/gpio.c:65:5: warning: no previous prototype for ‘__mcfgpio_direction_output’ [-Wmissing-prototypes] int __mcfgpio_direction_output(unsigned gpio, int value) ^~~~~~~~~~~~~~~~~~~~~~~~~~ arch/m68k/coldfire/gpio.c:96:5: warning: no previous prototype for ‘__mcfgpio_request’ [-Wmissing-prototypes] int __mcfgpio_request(unsigned gpio) ^~~~~~~~~~~~~~~~~ arch/m68k/coldfire/gpio.c:102:6: warning: no previous prototype for ‘__mcfgpio_free’ [-Wmissing-prototypes] void __mcfgpio_free(unsigned gpio) ^~~~~~~~~~~~~~ The local m68k asm version of gpio.h has prototypes for all of these, but they are not always visible depending on the config options enabled. Move the prototypes so they are always visible. Signed-off-by: Greg Ungerer <[email protected]>
2023-10-23m68k: coldfire: add and use "vectors.h"Greg Ungerer2-0/+5
When building with W=1: arch/m68k/coldfire/vectors.c:43:13: warning: no previous prototype for ‘trap_init’ [-Wmissing-prototypes] void __init trap_init(void) ^~~~~~~~~ Fix this by introducing a new header file "vectors.h" for holding the prototypes of functions implemented in arch/m68k/coldfire/vectors.c. Signed-off-by: Greg Ungerer <[email protected]>
2023-10-23m68knommu: fix compilation for ColdFire/Cleopatra boardsGreg Ungerer1-3/+2
The ColdFire based Cleopatra family of boards use mostly the same external pin arrangements as the NETtel board family. The build uses the NETtel specific code as needed, but not all the conditional defines allow for this. If you have the CONFIG_NETtel config option set everything compiles as expected, but if you only select the CONFIG_CLEOPATRA board type then you will get compile failures: arch/m68k/coldfire/nettel.c: In function ‘nettel_smc91x_init’: arch/m68k/coldfire/nettel.c:126:2: error: implicit declaration of function ‘mcf_setppdata’; did you mean ‘xas_set_update’? [-Werror=implicit-function-declaration] mcf_setppdata(0, 0x0080); ^~~~~~~~~~~~~ xas_set_update Fix the nettel.h include conditional checks to cover all board types. This also means some code paths need to check for the 5407 SoC - since one of the Cleopatra board types is based on that. It is very similar to the 5307 specific code, and it can use that "as-is". Signed-off-by: Greg Ungerer <[email protected]>
2023-10-23m68knommu: improve config ROM setting defaultsGreg Ungerer1-2/+2
The ROM region configuration settings used on some nommu m68k systems (historically mostly 68328 (Dragonball) CPUs) default to an address of 0. That can easily clash with default RAM address settings which also default to 0. Of course that is invalid and those ranges overlap, but if you make no value selection that is what you end up with. Those default values produce a valid configuration but will fail compilation like this: m68k-linux-ld: section .rodata VMA [0000000000001000,0000000000262227] overlaps section .text VMA [0000000000000400,0000000000455e7f] Looking at the platforms that use the ROM region configuration settings it is clear that we can choose much better defaults than 0. By far the most common ROM region settings are these: CONFIG_ROMVEC=0x10c10000 CONFIG_ROMSTART=0x10c10400 So lets make these the default values. It is still possible to configure overlapping ROM and RAM regions, but at least the default selections are now valid. Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Greg Ungerer <[email protected]>
2023-10-22m68k: remove unused includes from dma.cChristoph Hellwig1-9/+0
dma.c doesn't need most of the headers it includes. Also there is no point in undefining the DEBUG symbol given that it isn't used anywhere in this small file. Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Greg Ungerer <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Tested-by: Greg Ungerer <[email protected]>
2023-10-22m68k: don't provide arch_dma_alloc for nommu/coldfireChristoph Hellwig2-24/+0
Coldfire cores configured with a data cache can't provide coherent DMA allocations at all. Instead of returning non-coherent kernel memory in this case, return NULL and fail the allocation. The only driver that used to rely on the previous behavior (fec) has been switched to use non-coherent allocations for this case recently. Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Greg Ungerer <[email protected]> Tested-by: Greg Ungerer <[email protected]>
2023-10-22m68k: use the coherent DMA code for coldfire without data cacheChristoph Hellwig4-6/+18
Coldfire cores configured without a data cache are DMA coherent and should thus simply use the simple coherent version of dma-direct. Introduce a new COLDFIRE_COHERENT_DMA Kconfig symbol as a convenient short hand for such configurations, and a M68K_NONCOHERENT_DMA symbol for all cases where we need to build non-coherent DMA infrastructure to simplify the Kconfig and code conditionals. Not building the non-coherent DMA code slightly reduces the code size for such configurations. Numers for m5249evb_defconfig below: text data bss dec hex filename 2896158 401052 65392 3362602 334f2a vmlinux.before 2895166 400988 65392 3361546 334b0a vmlinux.after Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Greg Ungerer <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Tested-by: Greg Ungerer <[email protected]>
2023-10-22dma-direct: add a CONFIG_ARCH_HAS_DMA_ALLOC symbolChristoph Hellwig3-0/+3
Instead of using arch_dma_alloc if none of the generic coherent allocators are used, require the architectures to explicitly opt into providing it. This will used to deal with the case of m68knommu and coldfire where we can't do any coherent allocations whatsoever, and also makes it clear that arch_dma_alloc is a last resort. Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Robin Murphy <[email protected]> Reviewed-by: Greg Ungerer <[email protected]> Tested-by: Greg Ungerer <[email protected]>
2023-10-21Merge tag 'powerpc-6.6-5' of ↵Linus Torvalds3-9/+5
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - Fix stale propagated yield_cpu in qspinlocks leading to lockups - Fix broken hugepages on some configs due to ARCH_FORCE_MAX_ORDER - Fix a spurious warning when copros are in use at exit time Thanks to Nicholas Piggin, Christophe Leroy, Nysal Jan K.A Sachin Sant, and Shrikanth Hegde. * tag 'powerpc-6.6-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/qspinlock: Fix stale propagated yield_cpu powerpc/64s/radix: Don't warn on copros in radix__tlb_flush() powerpc/mm: Allow ARCH_FORCE_MAX_ORDER up to 12
2023-10-21Merge tag 's390-6.6-4' of ↵Linus Torvalds2-3/+19
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Vasily Gorbik: - Fix IOMMU bitmap allocation in s390 PCI to avoid out of bounds access when IOMMU pages aren't a multiple of 64 - Fix kasan crashes when accessing DCSS mapping in memory holes by adding corresponding kasan zero shadow mappings - Fix a memory leak in css_alloc_subchannel in case dma_set_coherent_mask fails * tag 's390-6.6-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/pci: fix iommu bitmap allocation s390/kasan: handle DCSS mapping in memory holes s390/cio: fix a memleak in css_alloc_subchannel
2023-10-21arm64: dts: rockchip: rk3588s: Add USB3 host controllerSebastian Reichel1-0/+21
RK3588 has three USB3 controllers. This adds the host-only controller, which is using the naneng-combphy shared with PCIe and SATA. The other two are dual-role and using a different PHY that is not yet supported upstream. Signed-off-by: Sebastian Reichel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-10-21staging: qlge: Retire the driverBenjamin Poirier1-1/+0
No significant improvements have been done to this driver since commit a7c3ddf29a78 ("staging: qlge: clean up debugging code in the QL_ALL_DUMP ifdef land") in January 2021. The driver should not stay in staging forever. Since it has been abandoned by the vendor and no one has stepped up to maintain it, delete it. If some users manifest themselves, the driver will be restored to drivers/net/ as suggested in the linked message. Link: https://lore.kernel.org/netdev/[email protected]/ Suggested-by: Jakub Kicinski <[email protected]> Cc: Manish Chopra <[email protected]> Cc: Coiby Xu <[email protected]> Signed-off-by: Benjamin Poirier <[email protected]> Acked-by: Jakub Kicinski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-10-20KVM: arm64: Load the stage-2 MMU context in kvm_vcpu_load_vhe()Oliver Upton1-10/+5
To date the VHE code has aggressively reloaded the stage-2 MMU context on every guest entry, despite the fact that this isn't necessary. This was probably done for consistency with the nVHE code, which needs to switch in/out the stage-2 MMU context as both the host and guest run at EL1. Hoist __load_stage2() into kvm_vcpu_load_vhe(), thus avoiding a reload on every guest entry/exit. This is likely to be beneficial to systems with one of the speculative AT errata, as there is now one fewer context synchronization event on the guest entry path. Additionally, it is possible that implementations have hitched correctness mitigations on writes to VTTBR_EL2, which are now elided on guest re-entry. Note that __tlb_switch_to_guest() is deliberately left untouched as it can be called outside the context of a running vCPU. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
2023-10-20KVM: arm64: Rename helpers for VHE vCPU load/putOliver Upton5-19/+25
The names for the helpers we expose to the 'generic' KVM code are a bit imprecise; we switch the EL0 + EL1 sysreg context and setup trap controls that do not need to change for every guest entry/exit. Rename + shuffle things around a bit in preparation for loading the stage-2 MMU context on vcpu_load(). Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
2023-10-20KVM: arm64: Reload stage-2 for VMID change on VHEMarc Zyngier3-5/+13
Naturally, a change to the VMID for an MMU implies a new value for VTTBR. Reload on VMID change in anticipation of loading stage-2 on vcpu_load() instead of every guest entry. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
2023-10-20KVM: arm64: Restore the stage-2 context in VHE's __tlb_switch_to_host()Marc Zyngier1-3/+14
An MMU notifier could cause us to clobber the stage-2 context loaded on a CPU when we switch to another VM's context to invalidate. This isn't an issue right now as the stage-2 context gets reloaded on every guest entry, but is disastrous when moving __load_stage2() into the vcpu_load() path. Restore the previous stage-2 context on the way out of a TLB invalidation if we installed something else. Deliberately do this after TGE=1 is synchronized to keep things safe in light of the speculative AT errata. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
2023-10-20KVM: arm64: Don't zero VTTBR in __tlb_switch_to_host()Oliver Upton1-1/+0
HCR_EL2.TGE=0 is sufficient to disable stage-2 translation, so there's no need to explicitly zero VTTBR_EL2. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
2023-10-20powerpc/pseries: use kfree_sensitive() in plpks_gen_password()Minjie Du1-2/+2
password might contain private information, so better use kfree_sensitive to free it. In plpks_gen_password() use kfree_sensitive(). Signed-off-by: Minjie Du <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
2023-10-20powerpc/code-patching: Perform hwsync in __patch_instruction() in case of ↵Christophe Leroy1-4/+1
failure Commit c28c15b6d28a ("powerpc/code-patching: Use temporary mm for Radix MMU") added a hwsync for when __patch_instruction() fails, we results in a quite odd unbalanced logic. Instead of calling mb() when __patch_instruction() returns an error, call mb() in the __patch_instruction()'s error path directly. Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/e88b154eaf2efd9ff177d472d3411dcdec8ff4f5.1696675567.git.christophe.leroy@csgroup.eu
2023-10-20powerpc/fsl_msi: Use device_get_match_data()Rob Herring1-6/+4
Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
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