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Add default "vga.h", or compiling fails with 'allmodconfig'.
The related error:
CC [M] drivers/gpu/drm/drm_irq.o
In file included from include/linux/vgaarb.h:34:0,
from drivers/gpu/drm/drm_irq.c:42:
include/video/vga.h:22:21: fatal error: asm/vga.h: No such file or directory
compilation terminated.
make[3]: *** [drivers/gpu/drm/drm_irq.o] Error 1
make[2]: *** [drivers/gpu/drm] Error 2
make[1]: *** [drivers/gpu] Error 2
make: *** [drivers] Error 2
Signed-off-by: Chen Gang <[email protected]>
Signed-off-by: Jonas Bonn <[email protected]>
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Need append "_D__linux__" to KBUILD_CFLAGS, just like some of another
architectures have done, or 'allmodconfig' can not pass compiling.
The related error:
CC [M] fs/coda/psdev.o
In file included from include/linux/coda.h:65:0,
from fs/coda/psdev.c:45:
include/uapi/linux/coda.h:221:2: error: expected specifier-qualifier-list before 'u_quad_t'
The related compiler information:
[root@dhcp122 ~]# /usr/local/bin/or32-linux-gcc -v
Using built-in specs.
COLLECT_GCC=/usr/local/bin/or32-linux-gcc
COLLECT_LTO_WRAPPER=/usr/local/libexec/gcc/or32-linux/4.5.1-or32-1.0rc1/lto-wrapper
Target: or32-linux
Configured with: ../gcc-openrisc/configure --target=or32-linux --disable-nls --enable-languages=c --without-headers --disable-shared --disable-threads --enable-werror=no
Thread model: single
gcc version 4.5.1-or32-1.0rc1 (GCC)
Signed-off-by: Chen Gang <[email protected]>
Signed-off-by: Jonas Bonn <[email protected]>
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The cbc-aes-s390 algorithm incorrectly places the IV in the tfm
data structure. As the tfm is shared between multiple threads,
this introduces a possibility of data corruption.
This patch fixes this by moving the parameter block containing
the IV and key onto the stack (the block is 48 bytes long).
The same bug exists elsewhere in the s390 crypto system and they
will be fixed in subsequent patches.
Cc: [email protected]
Signed-off-by: Herbert Xu <[email protected]>
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Relocations that require an instruction immediate to be re-encoded must
ensure that the instruction pattern is represented in a little-endian
format for the manipulation code to work correctly.
This patch converts the loaded instruction into native-endianess prior
to encoding and then converts back to little-endian byteorder before
updating memory.
Signed-off-by: Will Deacon <[email protected]>
Tested-by: Matthew Leach <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
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This way we can spot early bugs when just testing with the default
config.
Signed-off-by: Catalin Marinas <[email protected]>
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preempt_count is defined as an int. Oddly enough, we access it
as a 64bit value. Things become interesting when running a BE
kernel, and looking at the current CPU number, which is stored
as an int next to preempt_count. Like in a per-cpu interrupt
handler, for example...
Using a 32bit access fixes the issue for good.
Cc: Matthew Leach <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
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Currently cpuid emulation is traced only when executed by intercept.
Move trace point so that emulator invocation is traced too.
Reviewed-by: Paolo Bonzini <[email protected]>
Signed-off-by: Gleb Natapov <[email protected]>
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Make code shorter.
Reviewed-by: Paolo Bonzini <[email protected]>
Signed-off-by: Gleb Natapov <[email protected]>
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All decode_register() callers check if instruction has rex prefix
to properly decode one byte operand. It make sense to move the check
inside.
Reviewed-by: Paolo Bonzini <[email protected]>
Signed-off-by: Gleb Natapov <[email protected]>
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The defconfig kernel can not run under neither fedora16 x86_64 laptop
nor fedora17 x86_64 pc. After enable DEVTMPFS* in x86_64_defconfig, it
will be OK.
DEVTMPFS* is only related with software, so for i386_defconfig may also
need them (at least, it has no negative effect for defconfig).
Signed-off-by: Chen Gang <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: H. Peter Anvin <[email protected]>
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* pci/yijing-pci_is_pcie-v2:
powerpc/pci: Use pci_is_pcie() to simplify code [fix]
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Fix f0308261b1 ("powerpc/pci: Use pci_is_pcie() to simplify code"). I
accidentally merged v2 instead of v3, so this adds the difference. Without
this, "cap" is the left-over PCI-X capability offset, and we're using it as
the PCIe capability offset.
[bhelgaas: extracted v2->v3 diff]
Signed-off-by: Yijing Wang <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
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The wrapper script needs an explicit rule for the "of" boot
wrapper (generic wrapper, similar to pseries). Before
0c9fa29149d3726e14262aeb0c8461a948cc9d56 it was hanlded
implicitly by the statement:
platformo=$object/"$platform".o
But now that epapr.o needs to be added, that doesn't work
and an explicit rule must be added.
Signed-off-by: Benjamin Herrenschmidt <[email protected]>
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The DDR controller is slightly different in ECX-2000 and ECX-1000, so we
need to have different nodes for each platform.
Signed-off-by: Rob Herring <[email protected]>
[Device Tree documentation updated.]
Signed-off-by: Robert Richter <[email protected]>
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Conflicts:
drivers/net/ethernet/emulex/benet/be.h
drivers/net/netconsole.c
net/bridge/br_private.h
Three mostly trivial conflicts.
The net/bridge/br_private.h conflict was a function signature (argument
addition) change overlapping with the extern removals from Joe Perches.
In drivers/net/netconsole.c we had one change adjusting a printk message
whilst another changed "printk(KERN_INFO" into "pr_info(".
Lastly, the emulex change was a new inline function addition overlapping
with Joe Perches's extern removals.
Signed-off-by: David S. Miller <[email protected]>
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Commit 53ae3acd (arm64: Only enable local interrupts after the CPU
is marked online) moved the enabling of the GIC after the CPUs are
marked online.
This has some interesting effect:
[...]
[<ffffffc0002eefd8>] gic_raise_softirq+0xf8/0x160
[<ffffffc000088f58>] smp_send_reschedule+0x38/0x40
[<ffffffc0000c8728>] resched_task+0x84/0xc0
[<ffffffc0000c8cdc>] check_preempt_curr+0x58/0x98
[<ffffffc0000c8d38>] ttwu_do_wakeup+0x1c/0xf4
[<ffffffc0000c8f90>] ttwu_do_activate.constprop.84+0x64/0x70
[<ffffffc0000cad30>] try_to_wake_up+0x1d4/0x2b4
[<ffffffc0000cae6c>] default_wake_function+0x10/0x18
[<ffffffc0000c5ca4>] __wake_up_common+0x60/0xa0
[<ffffffc0000c7784>] complete+0x48/0x64
[<ffffffc000088bec>] secondary_start_kernel+0xe8/0x110
[...]
Here, we end-up calling gic_raise_softirq without having initialized
the interrupt controller for this CPU. While this goes unnoticed
with GICv2 (the distributor is always accessible), it explodes with
GICv3.
The fix is to move the call to notify_cpu_starting before we set
the secondary CPU online.
Signed-off-by: Marc Zyngier <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
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The .data section in the arm64 linker script currently lacks a
definition for page-aligned data. This leads to a .page_aligned
section being placed between the end of data and start of bss.
This patch corrects that by using the generic RW_DATA_SECTION
macro which includes support for page-aligned data.
Signed-off-by: Mark Salter <[email protected]>
Acked-by: Will Deacon <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
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Another whitespace clean-up, this removes tabs from between sentences in
some comments.
Signed-off-by: Maciej W. Rozycki <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/6103/
Signed-off-by: Ralf Baechle <[email protected]>
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The IDTE instruction used to flush TLB entries for a specific address
space uses the address-space-control element (ASCE) to identify
affected TLB entries. The upgrade of a page table adds a new top
level page table which changes the ASCE. The TLB entries associated
with the old ASCE need to be flushed and the ASCE for the address space
needs to be replaced synchronously on all CPUs which currently use it.
The concept of a lazy ASCE update with an exception handler is broken.
Signed-off-by: Martin Schwidefsky <[email protected]>
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Conflicts:
arch/powerpc/include/asm/processor.h
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Conflicts:
tools/perf/bench/numa.c
Signed-off-by: Ingo Molnar <[email protected]>
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Fixes for build issues when LPB FIFO driver is configured as
a module, removal of #ifdefs in mpc512x DIU platform code and
a revert of recent changes to mpc52xx PIC driver. Wolfram
provided a better fix for PIC driver build issue popping up
when older gcc-4.3.5 is used.
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Commit 2361613206e6, "of/irq: Refactor interrupt-map parsing" introduced
a bug. The irq parsing will fail for some nodes that don't have a reg
property. It is fixed by deferring the check for reg until it is
actually needed. Also adjust the testcase data to catch the bug.
Signed-off-by: Grant Likely <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Tested-by: Ming Lei <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Cc: Rob Herring <[email protected]>
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Pull MIPS fixes from Ralf Baechle:
"Three fixes across arch/mips with the most complex one being the GIC
interrupt fix - at nine lines still not monster. I'm confident this
are the final MIPS patches even if there should go for an rc8"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: ralink: fix return value check in rt_timer_probe()
MIPS: malta: Fix GIC interrupt offsets
MIPS: Perf: Fix 74K cache map
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When I was looking at RHEL5.9's failure to start with
unrestricted_guest=0/emulate_invalid_guest_state=1, I got it working with a
slightly older tree than kvm.git. I now debugged the remaining failure,
which was introduced by commit 660696d1 (KVM: X86 emulator: fix
source operand decoding for 8bit mov[zs]x instructions, 2013-04-24)
introduced a similar mis-emulation to the one in commit 8acb4207 (KVM:
fix sil/dil/bpl/spl in the mod/rm fields, 2013-05-30). The incorrect
decoding occurs in 8-bit movzx/movsx instructions whose 8-bit operand
is sil/dil/bpl/spl.
Needless to say, "movzbl %bpl, %eax" does occur in RHEL5.9's decompression
prolog, just a handful of instructions before finally giving control to
the decompressed vmlinux and getting out of the invalid guest state.
Because OpMem8 bypasses decode_modrm, the same handling of the REX prefix
must be applied to OpMem8.
Reported-by: Michele Baldessari <[email protected]>
Cc: [email protected]
Cc: Gleb Natapov <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Signed-off-by: Gleb Natapov <[email protected]>
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A vmalloc fault needs to sync up PGD/PTE entry from init_mm to current
task's "active_mm". ARC vmalloc fault handler however was using mm.
A vmalloc fault for non user task context (actually pre-userland, from
init thread's open for /dev/console) caused the handler to deref NULL mm
(for mm->pgd)
The reasons it worked so far is amazing:
1. By default (!SMP), vmalloc fault handler uses a cached value of PGD.
In SMP that MMU register is repurposed hence need for mm pointer deref.
2. In pre-3.12 SMP kernel, the problem triggering vmalloc didn't exist in
pre-userland code path - it was introduced with commit 20bafb3d23d108bc
"n_tty: Move buffers into n_tty_data"
Signed-off-by: Vineet Gupta <[email protected]>
Cc: Gilad Ben-Yossef <[email protected]>
Cc: Noam Camus <[email protected]>
Cc: [email protected] #3.10 and 3.11
Cc: Peter Hurley <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
"Two fixes:
- Fix 'NMI handler took too long to run' false positives
[ Genuine NMI overhead speedups will come for v3.13, this commit
only fixes a measurement bug ]
- Fix perf ring-buffer missed barrier causing (rare) ring-buffer data
corruption on ppc64"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86: Fix NMI measurements
perf: Fix perf ring buffer memory ordering
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Resolve cherry-picking conflicts:
Conflicts:
mm/huge_memory.c
mm/memory.c
mm/mprotect.c
See this upstream merge commit for more details:
52469b4fcd4f Merge branch 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Signed-off-by: Ingo Molnar <[email protected]>
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Yet another instruction that we fail to emulate, this time found
in Windows 2008R2 32-bit.
Reviewed-by: Gleb Natapov <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
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* pci/misc:
PCI: Report pci_pme_active() kmalloc failure
mn10300/PCI: Remove useless pcibios_last_bus
frv/PCI: Remove pcibios_last_bus
PCI: Fail MSI/MSI-X initialization if device is not in PCI_D0
x86/PCI: Coalesce multiple overlapping host bridge windows
MAINTAINERS: Add arch/x86/pci to PCI file patterns
PCI/PM: Remove pci_pm_complete()
PCI: Add pci_dev_show_local_cpu() to simplify code
mn10300/PCI: Remove unused pci_mem_start
cris/PCI: Remove unused pci_mem_start
PCI: Make pci_dev_pm_ops static
Conflicts:
drivers/pci/pci-sysfs.c
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* pci/yijing-mps-v1:
drm/radeon: use pcie_get_readrq() and pcie_set_readrq() to simplify code
staging: et131x: Use pci_dev->pcie_mpss and pcie_set_readrq() to simplify code
IB/qib: Drop qib_tune_pcie_caps() and qib_tune_pcie_coalesce() return values
IB/qib: Use pcie_set_mps() and pcie_get_mps() to simplify code
IB/qib: Use pci_is_root_bus() to check whether it is a root bus
tile/PCI: use cached pci_dev->pcie_mpss to simplify code
PCI: Export pcie_set_mps() and pcie_get_mps()
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From Jason Cooper:
- add the Openblocks A7 board
- add Netgear ReadyNAS 104 board
* tag 'dt-3.13-5' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add Netgear ReadyNAS 104 board
ARM: kirkwood: add support for OpenBlocks A7 platform
Signed-off-by: Olof Johansson <[email protected]>
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A handful of DT updates from Christian Daudt for the broadcom mobile
platforms, including their rename of the platform to BCM_MOBILE to keep
BCM for the vendor-level options.
* bcm/dt:
ARM: dts: bcm11351: Use GIC/IRQ defines for sdio interrupts
ARM: dts: bcm: Add missing UARTs for bcm11351 (bcm281xx)
ARM: dts: bcm281xx: Add card detect GPIO
ARM: dts: rename ARCH_BCM to ARCH_BCM_MOBILE (dt)
ARM: bcm281xx: Add device node for the GPIO controller
Signed-off-by: Olof Johansson <[email protected]>
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Trivial patch to make use of GIC/IRQ defines on the bcm11351 sdio
interrupt properties.
Signed-off-by: Matt Porter <[email protected]>
Signed-off-by: Christian Daudt <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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This adds in three more UARTs that were not declared earlier.
Signed-off-by: Tim Kryger <[email protected]>
Reviewed-by: Markus Mayer <[email protected]>
Reviewed-by: Matt Porter <[email protected]>
Signed-off-by: Christian Daudt <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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Register GPIO 14 as card detect interrupt for the SD card slot.
Signed-off-by: Markus Mayer <[email protected]>
Signed-off-by: Christian Daudt <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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Currently ARCH_BCM has been used for Broadcom
Mobile V7 based SoCs. In order to allow other Broadcom
SoCs to also use mach-bcm directory and files, this patch
renames the original ARCH_BCM to ARCH_BCM_MOBILE, and
uses ARCH_BCM to define any Broadcom chip residing
in mach-bcm directory.
Signed-off-by: Christian Daudt <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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Add the GPIO controller device node for the Broadcom bcm281xx family of
mobile SoCs.
Signed-off-by: Markus Mayer <[email protected]>
Reviewed-by: Tim Kryger <[email protected]>
Reviewed-by: Matt Porter <[email protected]>
Reviewed-by: Tomasz Figa <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Signed-off-by: Christian Daudt <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
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Commit e8765b265a69 (arm64: read enable-method for CPU0) introduced
checks for the enable method on CPU0 (to be later used with CPU
suspend). However, if the kernel is compiled for UP and a DT file is
used with a method like 'spin-table', Linux complains about 'invalid
enable method'. This patch turns it into an 'unsupported enable method'
warning.
Signed-off-by: Catalin Marinas <[email protected]>
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There is a possible race between setting has_pgste and reallocation of the
page_table, change the order to fix this.
Also page_table_alloc_pgste can fail, in that case we need to backpropagte this
as -ENOMEM to the caller of page_table_realloc.
Based on a patch by Christian Borntraeger <[email protected]>.
Reviewed-by: Martin Schwidefsky <[email protected]>
Signed-off-by: Dominik Dingel <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
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Main hardware parts of the (Armada 370 based) NETGEAR ReadyNAS 104 are
supported by mainline kernel (USB 3.0 rear ports, USB 2.0 front port,
Gigabit controller and PHYs, serial port, LEDs, buttons, SATA ports,
G762 fan controller) and referenced in provided .dts file. Some additonal
work remains for:
- Intersil ISL12057 I2C RTC and Alarm chip: working driver but needs
to be splitted for submission of RTC part first;
- Front LCD (Winstar 1602G): driver needs to be written
- Armada NAND controller (to access onboard 128MB of NAND): support
being pushed by @free-electrons people
- 4 front SATA LEDs controlled via GPIO brought by NXP PCA9554:
driver is available upstream. Not referenced/tested yet.
but the device is usable w/o those.
Signed-off-by: Arnaud Ebalard <[email protected]>
Acked-by: Andrew Lunn <[email protected]>
Signed-off-by: Jason Cooper <[email protected]>
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Most of the kernel code assumes that max*pfn is maximum pfns because
the physical start of memory is expected to be PFN0. Since this
assumption is not true on ARM architectures, the meaning of max*pfn
is number of memory pages. This is done to keep drivers happy which
are making use of of these variable to calculate the dma bounce limit
using dma_mask.
Now since we have a architecture override possibility for DMAable
maximum pfns, lets make meaning of max*pfns as maximum pnfs on ARM
as well.
Cc: Catalin Marinas <[email protected]>
Cc: Will Deacon <[email protected]>
Cc: Nicolas Pitre <[email protected]>
Signed-off-by: Santosh Shilimkar <[email protected]>
Signed-off-by: Russell King <[email protected]>
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We need to start treating DMA masks as something which is specific to
the bus that the device resides on, otherwise we're going to hit all
sorts of nasty issues with LPAE and 32-bit DMA controllers in >32-bit
systems, where memory is offset from PFN 0.
In order to start doing this, we convert the DMA mask to a PFN using
the device specific dma_to_pfn() macro. This is the reverse of the
pfn_to_dma() macro which is used to get the DMA address for the device.
This gives us a PFN mask, which we can then check against the PFN
limit of the DMA zone.
Signed-off-by: Russell King <[email protected]>
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Add an asmlinkage wrapper around acpi_enter_sleep_state() to prevent
an empty stub from being called by assmebly code for ACPI_REDUCED_HARDWARE
set.
As arch/x86/kernel/acpi/wakeup_xx.S is only compiled when CONFIG_ACPI=y
and there are no users of ACPI_HARDWARE_REDUCED, currently this is in
fact not a real issue, but a cleanup to reduce source code differences
between Linux and ACPICA upstream.
[rjw: Changelog]
Signed-off-by: Lv Zheng <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
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In case of error, the function devm_request_and_ioremap() returns NULL
pointer not ERR_PTR(). Fix it by using devm_ioremap_resource() instead
of devm_request_and_ioremap().
Signed-off-by: Wei Yongjun <[email protected]>
Acked-by: John Crispin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/6098/
Signed-off-by: Ralf Baechle <[email protected]>
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mst can't be blamed for lack of switch entries: the
issue is with msrs actually.
Signed-off-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
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arch/arm/mach-footbridge/netwinder-hw.c:695:2: warning: passing argument 1 of 'spinlock_check' from incompatible pointer type
arch/arm/mach-footbridge/netwinder-hw.c:702:2: warning: passing argument 1 of 'spin_unlock_irqrestore' from incompatible pointer type
arch/arm/mach-footbridge/netwinder-hw.c:712:2: warning: passing argument 1 of 'spinlock_check' from incompatible pointer type
arch/arm/mach-footbridge/netwinder-hw.c:714:2: warning: passing argument 1 of 'spin_unlock_irqrestore' from incompatible pointer type
Signed-off-by: Russell King <[email protected]>
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The loop was always using 0 as the index. This means that
any rubbish after the first element of the array went undetected.
It seems reasonable to assume that no KVM userspace did that.
Reviewed-by: Gleb Natapov <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
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The KVM_SET_XCRS ioctl must accept anything that KVM_GET_XCRS
could return. XCR0's bit 0 is always 1 in real processors with
XSAVE, and KVM_GET_XCRS will always leave bit 0 set even if the
emulated processor does not have XSAVE. So, KVM_SET_XCRS must
ignore that bit when checking for attempts to enable unsupported
save states.
Reviewed-by: Gleb Natapov <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
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