aboutsummaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2020-11-30ARM: dts: mvebu: Add device tree for RD-AC3X-48G4X2XL boardAryan Srivastava2-0/+113
Add device tree for RD-AC3X-48G4X2XL board. This has a Armada 382 SoC on a interposer board connected to a baseboard with a Prestera AC3X ASIC connected via PCI. Signed-off-by: Aryan Srivastava <[email protected]> Reviewed-by: Chris Packham <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30arm: dts: marvell: armada-375: Harmonize DWC USB3 DT nodes nameSerge Semin1-1/+1
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30arm64: dts: rockchip: Properly define the type C connector on rk3399-orangepiAlexis Ballier1-1/+61
Tested: - USB3 Gigabit adapter - USB2 mass storage The wiring is the same as the pinebook pro according to the schematics, thus this patch is heavily based on its dts. Signed-off-by: Alexis Ballier <[email protected]> Cc: [email protected] Cc: Heiko Stuebner <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30ARM: dts: rockchip: Add SDIO0 node for VMARC SOMJagan Teki3-0/+54
Rockchip RK3288 and RK3399Pro based VMARC SOM has sdio0 for connecting WiFi/BT devices as a pluggable card via M.2 E-Key. Add associated sdio0 nodes, properties. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] [moved the unrelated rtc addition to a separate patch] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30ARM: dts: rockchip: Add rtc node for VMARC SOMJagan Teki1-0/+23
Add the hym8563 rtc found on the rk3288 variant of the VMARC SOM. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] [split out of the original patch, as it was a change unrelated to the commit description] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: ti: k3-j721e-common-proc-board: Add support for SD card UHS modesFaiz Abbas2-2/+33
Add support for UHS modes for the SD card connected at sdhci1. This involves adding regulators for voltage switching and power cycling the SD card and removing the no-1-8-v property. Signed-off-by: Faiz Abbas <[email protected]> Signed-off-by: Sekhar Nori <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-30arm64: dts: ti: k3-j721e-main: Add output tap delay valuesFaiz Abbas1-3/+17
Add output tap delay values as given in the latest Data Manual[1], SPRSP36E, revised December 2019. [1] https://www.ti.com/lit/gpn/tda4vm Signed-off-by: Faiz Abbas <[email protected]> Signed-off-by: Sekhar Nori <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-30s390/vdso: add missing prototypes for vdso functionsHeiko Carstens3-0/+16
clang W=1 warns about missing prototypes: >> arch/s390/kernel/vdso64/getcpu.c:8:5: warning: no previous prototype for function '__s390_vdso_getcpu' [-Wmissing-prototypes] int __s390_vdso_getcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *unused) ^ Add a local header file in order to get rid of this warnings. Reported-by: kernel test robot <[email protected]> Signed-off-by: Heiko Carstens <[email protected]>
2020-11-30s390/Kconfig: default PCI_NR_FUNCTIONS to 512Niklas Schnelle1-1/+1
With the addition of more complete SR-IOV support, we are recommending to raise this limit for distributions to 512, as the previous default of 128 can easily be hit with just the VFs of a single PCI physical function. With at least one distribution now shipping with this, supporting only one fourth as many PCI functions on a default upstream build may lead to confusion and reduced testing of the higher limit so increase the default to 512. Acked-by: Christian Borntraeger <[email protected]> Signed-off-by: Niklas Schnelle <[email protected]> Signed-off-by: Heiko Carstens <[email protected]>
2020-11-30arm64: entry: fix EL1 debug transitionsMark Rutland2-25/+26
In debug_exception_enter() and debug_exception_exit() we trace hardirqs on/off while RCU isn't guaranteed to be watching, and we don't save and restore the hardirq state, and so may return with this having changed. Handle this appropriately with new entry/exit helpers which do the bare minimum to ensure this is appropriately maintained, without marking debug exceptions as NMIs. These are placed in entry-common.c with the other entry/exit helpers. In future we'll want to reconsider whether some debug exceptions should be NMIs, but this will require a significant refactoring, and for now this should prevent issues with lockdep and RCU. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marins <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: entry: fix NMI {user, kernel}->kernel transitionsMark Rutland4-10/+48
Exceptions which can be taken at (almost) any time are consdiered to be NMIs. On arm64 that includes: * SDEI events * GICv3 Pseudo-NMIs * Kernel stack overflows * Unexpected/unhandled exceptions ... but currently debug exceptions (BRKs, breakpoints, watchpoints, single-step) are not considered NMIs. As these can be taken at any time, kernel features (lockdep, RCU, ftrace) may not be in a consistent kernel state. For example, we may take an NMI from the idle code or partway through an entry/exit path. While nmi_enter() and nmi_exit() handle most of this state, notably they don't save/restore the lockdep state across an NMI being taken and handled. When interrupts are enabled and an NMI is taken, lockdep may see interrupts become disabled within the NMI code, but not see interrupts become enabled when returning from the NMI, leaving lockdep believing interrupts are disabled when they are actually disabled. The x86 code handles this in idtentry_{enter,exit}_nmi(), which will shortly be moved to the generic entry code. As we can't use either yet, we copy the x86 approach in arm64-specific helpers. All the NMI entrypoints are marked as noinstr to prevent any instrumentation handling code being invoked before the state has been corrected. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: entry: fix non-NMI kernel<->kernel transitionsMark Rutland2-3/+67
There are periods in kernel mode when RCU is not watching and/or the scheduler tick is disabled, but we can still take exceptions such as interrupts. The arm64 exception handlers do not account for this, and it's possible that RCU is not watching while an exception handler runs. The x86/generic entry code handles this by ensuring that all (non-NMI) kernel exception handlers call irqentry_enter() and irqentry_exit(), which handle RCU, lockdep, and IRQ flag tracing. We can't yet move to the generic entry code, and already hadnle the user<->kernel transitions elsewhere, so we add new kernel<->kernel transition helpers alog the lines of the generic entry code. Since we now track interrupts becoming masked when an exception is taken, local_daif_inherit() is modified to track interrupts becoming re-enabled when the original context is inherited. To balance the entry/exit paths, each handler masks all DAIF exceptions before exit_to_kernel_mode(). Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: ptrace: prepare for EL1 irq/rcu trackingMark Rutland1-0/+4
Exceptions from EL1 may be taken when RCU isn't watching (e.g. in idle sequences), or when the lockdep hardirqs transiently out-of-sync with the hardware state (e.g. in the middle of local_irq_enable()). To correctly handle these cases, we'll need to save/restore this state across some exceptions taken from EL1. A series of subsequent patches will update EL1 exception handlers to handle this. In preparation for this, and to avoid dependencies between those patches, this patch adds two new fields to struct pt_regs so that exception handlers can track this state. Note that this is placed in pt_regs as some entry/exit sequences such as el1_irq are invoked from assembly, which makes it very difficult to add a separate structure as with the irqentry_state used by x86. We can separate this once more of the exception logic is moved to C. While the fields only need to be bool, they are both made u64 to keep pt_regs 16-byte aligned. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: entry: fix non-NMI user<->kernel transitionsMark Rutland5-48/+51
When built with PROVE_LOCKING, NO_HZ_FULL, and CONTEXT_TRACKING_FORCE will WARN() at boot time that interrupts are enabled when we call context_tracking_user_enter(), despite the DAIF flags indicating that IRQs are masked. The problem is that we're not tracking IRQ flag changes accurately, and so lockdep believes interrupts are enabled when they are not (and vice-versa). We can shuffle things so to make this more accurate. For kernel->user transitions there are a number of constraints we need to consider: 1) When we call __context_tracking_user_enter() HW IRQs must be disabled and lockdep must be up-to-date with this. 2) Userspace should be treated as having IRQs enabled from the PoV of both lockdep and tracing. 3) As context_tracking_user_enter() stops RCU from watching, we cannot use RCU after calling it. 4) IRQ flag tracing and lockdep have state that must be manipulated before RCU is disabled. ... with similar constraints applying for user->kernel transitions, with the ordering reversed. The generic entry code has enter_from_user_mode() and exit_to_user_mode() helpers to handle this. We can't use those directly, so we add arm64 copies for now (without the instrumentation markers which aren't used on arm64). These replace the existing user_exit() and user_exit_irqoff() calls spread throughout handlers, and the exception unmasking is left as-is. Note that: * The accounting for debug exceptions from userspace now happens in el0_dbg() and ret_to_user(), so this is removed from debug_exception_enter() and debug_exception_exit(). As user_exit_irqoff() wakes RCU, the userspace-specific check is removed. * The accounting for syscalls now happens in el0_svc(), el0_svc_compat(), and ret_to_user(), so this is removed from el0_svc_common(). This does not adversely affect the workaround for erratum 1463225, as this does not depend on any of the state tracking. * In ret_to_user() we mask interrupts with local_daif_mask(), and so we need to inform lockdep and tracing. Here a trace_hardirqs_off() is sufficient and safe as we have not yet exited kernel context and RCU is usable. * As PROVE_LOCKING selects TRACE_IRQFLAGS, the ifdeferry in entry.S only needs to check for the latter. * EL0 SError handling will be dealt with in a subsequent patch, as this needs to be treated as an NMI. Prior to this patch, booting an appropriately-configured kernel would result in spats as below: | DEBUG_LOCKS_WARN_ON(lockdep_hardirqs_enabled()) | WARNING: CPU: 2 PID: 1 at kernel/locking/lockdep.c:5280 check_flags.part.54+0x1dc/0x1f0 | Modules linked in: | CPU: 2 PID: 1 Comm: init Not tainted 5.10.0-rc3 #3 | Hardware name: linux,dummy-virt (DT) | pstate: 804003c5 (Nzcv DAIF +PAN -UAO -TCO BTYPE=--) | pc : check_flags.part.54+0x1dc/0x1f0 | lr : check_flags.part.54+0x1dc/0x1f0 | sp : ffff80001003bd80 | x29: ffff80001003bd80 x28: ffff66ce801e0000 | x27: 00000000ffffffff x26: 00000000000003c0 | x25: 0000000000000000 x24: ffffc31842527258 | x23: ffffc31842491368 x22: ffffc3184282d000 | x21: 0000000000000000 x20: 0000000000000001 | x19: ffffc318432ce000 x18: 0080000000000000 | x17: 0000000000000000 x16: ffffc31840f18a78 | x15: 0000000000000001 x14: ffffc3184285c810 | x13: 0000000000000001 x12: 0000000000000000 | x11: ffffc318415857a0 x10: ffffc318406614c0 | x9 : ffffc318415857a0 x8 : ffffc31841f1d000 | x7 : 647261685f706564 x6 : ffffc3183ff7c66c | x5 : ffff66ce801e0000 x4 : 0000000000000000 | x3 : ffffc3183fe00000 x2 : ffffc31841500000 | x1 : e956dc24146b3500 x0 : 0000000000000000 | Call trace: | check_flags.part.54+0x1dc/0x1f0 | lock_is_held_type+0x10c/0x188 | rcu_read_lock_sched_held+0x70/0x98 | __context_tracking_enter+0x310/0x350 | context_tracking_enter.part.3+0x5c/0xc8 | context_tracking_user_enter+0x6c/0x80 | finish_ret_to_user+0x2c/0x13cr Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: entry: move el1 irq/nmi logic to CMark Rutland4-45/+22
In preparation for reworking the EL1 irq/nmi entry code, move the existing logic to C. We no longer need the asm_nmi_enter() and asm_nmi_exit() wrappers, so these are removed. The new C functions are marked noinstr, which prevents compiler instrumentation and runtime probing. In subsequent patches we'll want the new C helpers to be called in all cases, so we don't bother wrapping the calls with ifdeferry. Even when the new C functions are stubs the trivial calls are unlikely to have a measurable impact on the IRQ or NMI paths anyway. Prototypes are added to <asm/exception.h> as otherwise (in some configurations) GCC will complain about the lack of a forward declaration. We already do this for existing function, e.g. enter_from_user_mode(). The new helpers are marked as noinstr (which prevents all instrumentation, tracing, and kprobes). Otherwise, there should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: entry: prepare ret_to_user for function callMark Rutland1-4/+5
In a subsequent patch ret_to_user will need to make a C function call (in some configurations) which may clobber x0-x18 at the start of the finish_ret_to_user block, before enable_step_tsk consumes the flags loaded into x1. In preparation for this, let's load the flags into x19, which is preserved across C function calls. This avoids a redundant reload of the flags and ensures we operate on a consistent shapshot regardless. There should be no functional change as a result of this patch. At this point of the entry/exit paths we only need to preserve x28 (tsk) and the sp, and x19 is free for this use. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: entry: move enter_from_user_mode to entry-common.cMark Rutland2-7/+6
In later patches we'll want to extend enter_from_user_mode() and add a corresponding exit_to_user_mode(). As these will be common for all entries/exits from userspace, it'd be better for these to live in entry-common.c with the rest of the entry logic. This patch moves enter_from_user_mode() into entry-common.c. As with other functions in entry-common.c it is marked as noinstr (which prevents all instrumentation, tracing, and kprobes) but there are no other functional changes. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: entry: mark entry code as noinstrMark Rutland1-50/+25
Functions in entry-common.c are marked as notrace and NOKPROBE_SYMBOL(), but they're still subject to other instrumentation which may rely on lockdep/rcu/context-tracking being up-to-date, and may cause nested exceptions (e.g. for WARN/BUG or KASAN's use of BRK) which will corrupt exceptions registers which have not yet been read. Prevent this by marking all functions in entry-common.c as noinstr to prevent compiler instrumentation. This also blacklists the functions for tracing and kprobes, so we don't need to handle that separately. Functions elsewhere will be dealt with in subsequent patches. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: mark idle code as noinstrMark Rutland1-4/+4
Core code disables RCU when calling arch_cpu_idle(), so it's not safe for arch_cpu_idle() or its calees to be instrumented, as the instrumentation callbacks may attempt to use RCU or other features which are unsafe to use in this context. Mark them noinstr to prevent issues. The use of local_irq_enable() in arch_cpu_idle() is similarly problematic, and the "sched/idle: Fix arch_cpu_idle() vs tracing" patch queued in the tip tree addresses that case. Reported-by: Marco Elver <[email protected]> Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30arm64: syscall: exit userspace before unmasking exceptionsMark Rutland1-1/+1
In el0_svc_common() we unmask exceptions before we call user_exit(), and so there's a window where an IRQ or debug exception can be taken while RCU is not watching. In do_debug_exception() we account for this in via debug_exception_{enter,exit}(), but in the el1_irq asm we do not and we call trace functions which rely on RCU before we have a guarantee that RCU is watching. Let's avoid this by having el0_svc_common() exit userspace before unmasking exceptions, matching what we do for all other EL0 entry paths. We can use user_exit_irqoff() to avoid the pointless save/restore of IRQ flags while we're sure exceptions are masked in DAIF. The workaround for Cortex-A76 erratum 1463225 may trigger a debug exception before this point, but the debug code invoked in this case is safe even when RCU is not watching. Signed-off-by: Mark Rutland <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: James Morse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-11-30powerpc/pseries: Pass MSI affinity to irq_create_mapping()Laurent Vivier1-1/+2
With virtio multiqueue, normally each queue IRQ is mapped to a CPU. Commit 0d9f0a52c8b9f ("virtio_scsi: use virtio IRQ affinity") exposed an existing shortcoming of the arch code by moving virtio_scsi to the automatic IRQ affinity assignment. The affinity is correctly computed in msi_desc but this is not applied to the system IRQs. It appears the affinity is correctly passed to rtas_setup_msi_irqs() but lost at this point and never passed to irq_domain_alloc_descs() (see commit 06ee6d571f0e ("genirq: Add affinity hint to irq allocation")) because irq_create_mapping() doesn't take an affinity parameter. Use the new irq_create_mapping_affinity() function, which allows to forward the affinity setting from rtas_setup_msi_irqs() to irq_domain_alloc_descs(). With this change, the virtqueues are correctly dispatched between the CPUs on pseries. Fixes: e75eafb9b039 ("genirq/msi: Switch to new irq spreading infrastructure") Signed-off-by: Laurent Vivier <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Greg Kurz <[email protected]> Acked-by: Michael Ellerman <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected]
2020-11-30KVM: arm64: Delay the polling of the GICR_VPENDBASER.Dirty bitShenming Lu2-0/+15
In order to reduce the impact of the VPT parsing happening on the GIC, we can split the vcpu reseidency in two phases: - programming GICR_VPENDBASER: this still happens in vcpu_load() - checking for the VPT parsing to be complete: this can happen on vcpu entry (in kvm_vgic_flush_hwstate()) This allows the GIC and the CPU to work in parallel, rewmoving some of the entry overhead. Suggested-by: Marc Zyngier <[email protected]> Signed-off-by: Shenming Lu <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-30ARM: dts: rockchip: rename wdt nodename to watchdog on rv1108Johan Jonker1-1/+1
A test with the command below gives for example this error: /arch/arm/boot/dts/rv1108-evb.dt.yaml: wdt@10360000: $nodename:0: 'wdt@10360000' does not match '^watchdog(@.*|-[0-9a-f])?$' Fix it by renaming the wdt nodename to watchdog in the rv1108.dtsi file. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml Signed-off-by: Johan Jonker <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30ARM: dts: turris-omnia: remove unneeded status = "okay" propertiesMarek Behún1-2/+0
Only nodes which have status = "disabled" defined from included files need status = "okay". The ethernet-phy node and the i2cmux node do not need it, since they are wholly defined here. Signed-off-by: Marek Behún <[email protected]> Cc: [email protected] Cc: Uwe Kleine-König <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Gregory CLEMENT <[email protected]> Cc: Andreas Färber <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30ARM: dts: turris-omnia: update ethernet-phy node and handle nameMarek Behún1-3/+3
Use property name `phy-handle` instead of the deprecated `phy` to connect eth2 to the PHY. Rename the node from "phy@1" to "ethernet-phy@1", since "phy@1" is incorrect according to device-tree bindings documentation. Also remove the "ethernet-phy-id0141.0DD1" compatible string, it is not needed. Kernel can read the PHY identifier itself. Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Cc: [email protected] Cc: Uwe Kleine-König <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Gregory CLEMENT <[email protected]> Cc: Andreas Färber <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30ARM: dts: turris-omnia: add LED controller nodeMarek Behún1-1/+110
Linux now has incomplete support for the LED controller on Turris Omnia: it can set brightness and colors for each LED. The controller can also put these LEDs into HW controlled mode, in which the LEDs are controlled by HW: for example the WAN LED is connected via MCU to the WAN PHY LED pin. The driver does not support these HW controlled modes yet, and on probe puts the LEDs into SW controlled mode. Add node describing the LED controller, but disable it for now. Signed-off-by: Marek Behún <[email protected]> Cc: [email protected] Cc: Uwe Kleine-König <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Gregory CLEMENT <[email protected]> Cc: Andreas Färber <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30ARM: dts: turris-omnia: add SFP nodeMarek Behún1-1/+29
Turris Omnia has an SFP cage that, together with WAN PHY, is connected to eth2 SerDes via a SerDes multiplexor. When a SFP module is present, the multiplexor switches the SerDes signal from PHY to SFP. Describe the SFP cage, but leave it disabled. Until phylink has support for such configuration, we are leaving it to U-Boot to enable SFP and disable WAN PHY at boot time depending on whether a SFP module is present. Signed-off-by: Marek Behún <[email protected]> Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia") Reviewed-by: Andrew Lunn <[email protected]> Cc: Russell King - ARM Linux admin <[email protected]> Cc: [email protected] Cc: Uwe Kleine-König <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Gregory CLEMENT <[email protected]> Cc: Andreas Färber <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30ARM: dts: turris-omnia: describe switch interruptMarek Behún1-1/+11
Describe switch interrupt for Turris Omnia so that the CPU does not have to poll the switch. We also need to to set mpp45 pin to gpio function for this. Signed-off-by: Marek Behún <[email protected]> Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia") Cc: [email protected] Cc: Uwe Kleine-König <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Gregory CLEMENT <[email protected]> Cc: Andreas Färber <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30ARM: dts: turris-omnia: add comphy handle to eth2Marek Behún1-0/+1
The eth2 controller on Turris Omnia is connected to SerDes. For SFP to be able to switch between 1G and 2.5G modes the comphy link has to be defined. Signed-off-by: Marek Behún <[email protected]> Fixes: f3a6a9f3704a ("ARM: dts: add description for Armada 38x ...") Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Andreas Färber <[email protected]> Cc: [email protected] Cc: Uwe Kleine-König <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Gregory CLEMENT <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30ARM: dts: turris-omnia: enable HW buffer managementMarek Behún1-0/+17
The buffer manager is available on Turris Omnia but needs to be described in device-tree to be used. Signed-off-by: Marek Behún <[email protected]> Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia") Cc: [email protected] Cc: Uwe Kleine-König <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Gregory CLEMENT <[email protected]> Cc: Andreas Färber <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30arm64: dts: marvell: espressobin: Update link to V7 schematicPali Rohár2-2/+2
Up-to-date version of V7 schematic is on new URL linked from official tech-spec webpage http://espressobin.net/tech-spec/ Signed-off-by: Pali Rohár <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-30ARM: dts: imx7: add support for kamstrup flex concentratorBruno Thomsen3-0/+341
This adds support for the OMNIA Flex Concentrator product from Kamstrup A/S. It's providing radio mesh communication infrastructure for smart electricity meters. Kamstrup OMNIA is a modular and scalable smart grid platform. Signed-off-by: Bruno Thomsen <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-11-30ARM: dts: ls1021a: update calibration table for TMU moduleYuantian Tang1-40/+37
Update the calibration table to make the temperature more accurate. Signed-off-by: Yuantian Tang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-11-30ARM: mxs: Add serial number support for i.MX23, i.MX28 SoCsIvan Zaentsev1-0/+19
i.MX23 and i.MX28 SoCs unique identifiers are factory-programmed in On-Chip OTP memory. i.MX28's 64-bit unique id is in HW_OCOTP_OPS2:HW_OCOTP_OPS3 (see MCIMX28 Ref. Man., sec. 20.4.22-23). i.MX23 provides 32-bit long unique id in HW_OCOTP_OPS3. Though not clearly documented, there is a clue in sec. 35.9.3. The unique id is reported in /sys/devices/soc0/serial_number and in /proc/cpuinfo Signed-off-by: Ivan Zaentsev <[email protected]> Suggested-by: Evgeny Boger <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-11-30Merge 5.10-rc6 into usb-nextGreg Kroah-Hartman156-579/+958
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-30ARM: dts: ls1021a: fix rcpm failed to claim resourceRan Wang1-1/+1
The range of dcfg reg is wrong, which overlap with other device, such as rcpm. This issue causing rcpm driver failed to claim reg resource when calling devm_ioremap_resource(). Signed-off-by: Ran Wang <[email protected]> Acked-by: Li Yang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-11-30ARM: dts: ls1021a: fix flextimer failed to wake systemRan Wang1-1/+1
The data of property 'fsl,rcpm-wakeup' is not corrcet, which causing RCPM driver incorrectly program register IPPDEXPCR1, then flextimer is wrongly clock gated during system suspend, can't send interrupt to wake. Signed-off-by: Ran Wang <[email protected]> Acked-by: Li Yang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-11-30arm64: defconfig: Enable USB_SERIAL_CP210XJagan Teki1-0/+1
Some hardware platforms required CP20x USB to Serial converter in order to work onboard functionalities like Bluetooth. An example of such a platform is from Engicam's PX30 (ARM64). Mark it as module in defconfig. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: defconfig: Enable PHY_ROCKCHIP_INNO_DSIDPHYJagan Teki1-0/+1
In order to work LDVS, DSI in mainline tree for Rockchip based hardware platforms, the associated PHY driver has to enable in default defconfig. Enable rockchip DSI phy driver. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: defconfig: Enable ROCKCHIP_LVDSJagan Teki1-0/+1
Now, some of the rockchip hardware platforms do enable lvds in mainline tree. So, enable Rockchip LVDS driver via default defconfig. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Add BT support on px30-engicamSuniel Mahesh3-0/+32
Engicam PX30 carrier boards like EDIMM2.2 and C.TOUCH2.0 have an onboard Sterling-LWD Wifi/BT chip based on BCM43430 connected on the UART bus. UART bus on the design routed via USB to UART CP20x bridge. This bridge powered from 3V3 regualtor gpio. This patch adds BT enablement nodes for these respective boards. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Suniel Mahesh <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Add WiFi support on px30-engicamSuniel Mahesh3-0/+69
Engicam PX30 carrier boards like EDIMM2.2 and C.TOUCH2.0 have an onboard Sterling-LWD Wifi/BT chip based on BCM43430 connected on the SDIO bus. The SDIO power sequnce is connacted with exteernal 32KHz oscillator and it require 3V3 regulator input. This patch adds WiFi enablement nodes for these respective boards. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Suniel Mahesh <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OFJagan Teki2-0/+78
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. 10.1" OF is a capacitive touch 10.1" Open Frame panel solutions. PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged 10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame. Add support for it. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Enable LVDS panel on px30-engicam-edimm2.2Jagan Teki3-0/+68
Engicam PX30.Core EDIMM2.2 developement Kit has on board 10" LVDS panel from yes-optoelectronics. This patch adds panel enablement nodes on respective dts(i) files. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Enable USB Host, OTG on px30-enagicamJagan Teki1-0/+24
Engicam EDIMM2.2 and C.Touch 2.0 Kits support USB Host and OTG ports. Add support to enable USB on these kits while mounting px30-core SOM. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30power: supply: collie_battery: Convert to GPIO descriptorsLinus Walleij1-0/+21
This converts the Collie battery driver to use GPIO descriptors. We use a mixture of 3 GPIOs defined in the machine and 3 GPIOs requested directly from the ucb1x00 chip. Cc: Robert Jarzmik <[email protected]> Cc: Dmitry Eremin-Solenikov <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Signed-off-by: Sebastian Reichel <[email protected]>
2020-11-30power: supply: s3c-adc-battery: Convert to GPIO descriptorsLinus Walleij2-3/+20
This converts the S3C ADC battery to use GPIO descriptors instead of a global GPIO number for the charging completed GPIO. Using the pattern from the GPIO charger we name this GPIO line "charge-status" in the board file. Cc: [email protected] Cc: Sergiy Kibrik <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Signed-off-by: Sebastian Reichel <[email protected]>
2020-11-30arm64: dts: rockchip: rename sdhci nodename to mmc on rk3399Johan Jonker1-1/+1
A test with the command below gives for example this error: /arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: sdhci@fe330000: $nodename:0: 'sdhci@fe330000' does not match '^mmc(@.*)?$' Fix it by renaming sdhci to mmc. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/ mmc/arasan,sdhci.yaml Signed-off-by: Johan Jonker <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Enable analog audio on rk3328-roc-ccChen-Yu Tsai1-0/+12
Now that driver support for the RK3328's audio codec, and the plumbing is defined at the SoC level, we can enable analog audio at the board level. Enable analog audio by enabling the codec and the I2S interface connected and the simple-audio-card that binds them together. Signed-off-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Enable HDMI audio on rk3328-roc-ccChen-Yu Tsai1-0/+8
The RK3328-ROC-CC already has HDMI display output enabled. Now that audio for the HDMI controller is supported, it can be enabled as well. Enable the simple-audio-card, and the I2S interface the audio is fed from. Signed-off-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>