aboutsummaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2020-11-27arm64: dts: mediatek: mt8516: add efuse nodeFabien Parent1-0/+7
Add node to support e-fuses on MT8516 Signed-off-by: Fabien Parent <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2020-11-27arm64: dts: renesas: r8a77951: Add PCIe EP nodesYuya Hamamachi1-0/+38
Add PCIe EP nodes for R8A77951 SoC dtsi. Signed-off-by: Yuya Hamamachi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2020-11-27crypto: hisilicon/trng - add HiSilicon TRNG driver supportWeili Qian1-0/+1
Move existing char/hw_random/hisi-trng-v2.c to crypto/hisilicon/trng.c. Signed-off-by: Weili Qian <[email protected]> Reviewed-by: Zaibo Xu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2020-11-27crypto: sparc - Fix sparse endianness warningsHerbert Xu2-5/+6
This patch fixes a coulpe of sparse endianness warnings. Signed-off-by: Herbert Xu <[email protected]>
2020-11-27crypto: powerpc/sha256-spe - Fix sparse endianness warningHerbert Xu1-1/+1
This patch fixes a sparse endianness warning in sha256-spe. Signed-off-by: Herbert Xu <[email protected]>
2020-11-27crypto: mips/octeon - Fix sparse endianness warningsHerbert Xu2-7/+9
This patch fixes a number of endianness warnings in the mips/octeon code. Signed-off-by: Herbert Xu <[email protected]>
2020-11-27ARM: OMAP2+: Fix am4 only build after genpd changesTony Lindgren2-13/+0
With commit df6c2ec872a6 ("ARM: OMAP2+: Drop legacy remaining legacy platform data for am4") we moved am4 to boot with simple-pm-bus using genpd and devicetree based data. But I forgot to test am4 only build that still has few references to the old platform data left, and cause undefined reference errors with omap_hwmod_set_postsetup_state and omap_hwmod_for_each. We can just drop the related calls for am4 now, and also drop the references to unused struct wkup_m3_platform_data. Reported-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-11-26Merge tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi ↵Arnd Bergmann7-133/+132
into arm/dt ARM64: DT: Hisilicon ARM64 DT updates for 5.11 - Cleanups of the hisilicon DTS to align with the dtschema. All of them do not have any functional effect except passing dtschema checks or dtc W=2 builds. * tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios" arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml arm64: dts: hisilicon: list all clocks required by pl011.yaml arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml arm64: dts: hisilicon: normalize the node name of the UART devices arm64: dts: hisilicon: normalize the node name of the usb devices arm64: dts: hisilicon: normalize the node name of the SMMU devices arm64: dts: hisilicon: place clock-names "biu" before "ciu" arm64: dts: hisilicon: remove unused property pinctrl-names arm64: dts: hisilicon: write the values of property-units into a uint32 array arm64: dts: hisilicon: separate each group of data in the property "reg" arm64: dts: hisilicon: normalize the node name of the ITS devices Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2020-11-26Merge tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi ↵Arnd Bergmann10-85/+85
into arm/dt ARM: DT: Hisilicon ARM32 DT updates for 5.11 - Cleanups of the hisilicon DTS to align with the dtschema including serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not have any functional effect except passing dtschema checks or dtc W=2 builds. * tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi: ARM: dts: hisilicon: fix errors detected by syscon.yaml ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml ARM: dts: hisilicon: fix errors detected by root-node.yaml ARM: dts: hisilicon: fix errors detected by simple-bus.yaml ARM: dts: hisilicon: fix errors detected by usb yaml ARM: dts: hisilicon: fix errors detected by pl011.yaml ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2020-11-26Merge tag 'tegra-for-5.10-arm64-dt-fixes' of ↵Arnd Bergmann5-27/+15
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes arm64: tegra: Device tree fixes for v5.10-rc6 This contains a couple of fixes to device trees. Among other things, this restores suspend/resume on Jetson TX2 and makes USB OTG work on Jetson TX1. * tag 'tegra-for-5.10-arm64-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Fix Tegra234 VDK node names arm64: tegra: Wrong AON HSP reg property size arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1 arm64: tegra: Correct the UART for Jetson Xavier NX arm64: tegra: Disable the ACONNECT for Jetson TX2 Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2020-11-26Merge tag 'zynqmp-soc-fixes-for-v5.10-rc6' of ↵Arnd Bergmann45-235/+361
https://github.com/Xilinx/linux-xlnx into arm/fixes arm64: soc: ZynqMP SoC fixes for v5.10-rc6 - Fix SD dll reset issue by using proper macro - Fix PM feature checking for Xilinx Versal SoC * tag 'zynqmp-soc-fixes-for-v5.10-rc6' of https://github.com/Xilinx/linux-xlnx: (337 commits) firmware: xilinx: Use hash-table for api feature check firmware: xilinx: Fix SD DLL node reset issue Linux 5.10-rc4 kvm: mmu: fix is_tdp_mmu_check when the TDP MMU is not in use afs: Fix afs_write_end() when called with copied == 0 [ver #3] ocfs2: initialize ip_next_orphan panic: don't dump stack twice on warn hugetlbfs: fix anon huge page migration race mm: memcontrol: fix missing wakeup polling thread kernel/watchdog: fix watchdog_allowed_mask not used warning reboot: fix overflow parsing reboot cpu number Revert "kernel/reboot.c: convert simple_strtoul to kstrtoint" compiler.h: fix barrier_data() on clang mm/gup: use unpin_user_pages() in __gup_longterm_locked() mm/slub: fix panic in slab_alloc_node() mailmap: fix entry for Dmitry Baryshkov/Eremin-Solenikov mm/vmscan: fix NR_ISOLATED_FILE corruption on 64-bit mm/compaction: stop isolation if too many pages are isolated and we have pages to migrate mm/compaction: count pages and stop correctly during page isolation drm/nouveau/kms/nv50-: Use atomic encoder callbacks everywhere ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2020-11-26ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON ↵Dmitry Osipenko6-0/+461
device-tree nodes Add EMC OPP DVFS/DFS tables and interconnect paths that will be used for dynamic memory bandwidth scaling based on memory utilization statistics. Update board device-trees by removing unsupported EMC OPPs. Note that ACTMON watches all memory interconnect paths, but we use a single CPU-READ interconnect path for driving memory bandwidth, for simplicity. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON ↵Dmitry Osipenko4-0/+409
device-tree nodes Add EMC OPP tables and interconnect paths that will be used for dynamic memory bandwidth scaling based on memory utilization statistics. Update board device-trees by removing unsupported EMC OPPs. Note that ACTMON watches all memory interconnect paths, but we use a single CPU-READ interconnect path for driving memory bandwidth, for simplicity. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add EMC OPP properties to Tegra20 device-treesDmitry Osipenko5-0/+125
Add EMC OPP DVFS tables and update board device-trees by removing unsupported OPPs. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-treeDmitry Osipenko1-0/+2
Add nvidia,memory-controller to the Tegra20 External Memory Controller node. This allows to perform a direct lookup of the Memory Controller instead of walking up the whole tree. This puts Tegra20 device-tree on par with Tegra30+. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add interconnect properties to Tegra124 device-treeDmitry Osipenko1-0/+25
Add interconnect properties to the Memory Controller, External Memory Controller and the Display Controller nodes in order to describe hardware interconnection. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add interconnect properties to Tegra30 device-treeDmitry Osipenko1-1/+26
Add interconnect properties to the Memory Controller, External Memory Controller and the Display Controller nodes in order to describe hardware interconnection. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add interconnect properties to Tegra20 device-treeDmitry Osipenko1-1/+25
Add interconnect properties to the Memory Controller, External Memory Controller and the Display Controller nodes in order to describe hardware interconnection. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: acer-a500: Add Embedded ControllerDmitry Osipenko1-0/+17
This patch adds device-tree node for the Embedded Controller which is found on the Picasso board. The Embedded Controller itself is ENE KB930, it provides functions like battery-gauge/LED/GPIO/etc and it uses firmware that is specifically customized for the Acer A500 device. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Change order of SATA resets for Tegra124Sowjanya Komatineni1-3/+3
Tegra AHCI dt-binding doc is converted from text based to yaml based. dtbs_check valdiation strictly follows reset-names order specified in yaml dt-binding. Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold. Tegra186 has 2 resets sata and sata-cold. This patch changes order of SATA resets to maintain proper resets order for commonly available resets across Tegra124 thru Tegra186 for dtbs_check to pass. Signed-off-by: Sowjanya Komatineni <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Correct EMC registers size in Tegra20 device-treeDmitry Osipenko1-1/+1
Fix the size of Tegra20 EMC registers, which should be twice bigger. Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Properly align clocks for SOCTHERMThierry Reding1-1/+1
Entries on subsequent lines should be aligned with the entry on the first line. Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERMThierry Reding1-1/+3
For some reason this was never hooked up. Do it now so that over-current interrupts can be logged. Reported-by: Nicolas Chauvet <[email protected]> Suggested-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zonesNicolas Chauvet1-0/+10
According to dmesg, thermal-zones for mem and cpu are missing hot temperatures properties. throttrip: pll: missing hot temperature ... throttrip: mem: missing hot temperature ... Adding them will clear the messages. Signed-off-by: Nicolas Chauvet <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add missing gpu-throt-level to Tegra124 socthermNicolas Chauvet1-0/+1
On Jetson TK1 the following message can be seen: tegra_soctherm 700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop This patch will fix the invalid prop issue according to the binding. Signed-off-by: Nicolas Chauvet <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Populate OPP table for Tegra20 VentanaJon Hunter1-0/+11
Commit 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the generic CPUFREQ device-tree driver. Since this change CPUFREQ support on the Tegra20 Ventana platform has been broken because the necessary device-tree nodes with the operating point information are not populated for this platform. Fix this by updating device-tree for Venata to include the operating point informration for Tegra20. Fixes: 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)") Cc: [email protected] Signed-off-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Use panel-lvds as the only panel compatibleDmitry Osipenko1-2/+10
Depending on a driver probe order, panel-simple driver may probe first, which results in this error: panel-simple display-panel: Reject override mode: panel has a fixed mode We don't want to use panel-simple anyways because customized timings are preferred for Nexus 7, hence remove the panel-simple compatibles from the panel node. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Rename gpio-hog nodesDmitry Osipenko3-4/+4
Devicetree schema now requires gpio-hog nodes to have a certain naming pattern, like a -hog suffix. This patch fixes dtbs_check warnings about the names. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Add power-supply to lvds-encoder nodeDmitry Osipenko1-0/+1
The lvds-encoder binding now supports power-supply property, let's specify it in the device-tree for completeness. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Improve CPU passive-cooling thresholdDmitry Osipenko1-3/+3
The current CPU thermal limit is a bit inappropriate for Nexus 7 once device is getting used on a daily bases. For example, currently it's may be impossible to watch a hardware accelerated 720p video without hitting a severe CPU throttling, which ruins user experience. This patch improves the thermal throttling thresholds. In my experience setting CPU thermal threshold to 57C provides the most reasonable result, where device is a bit warm under constant load and not getting overly hot, in the same time performance is okay. Let's bump the passive-cooling threshold from 50C to 57C and also lower the thermal hysteresis to 0.2C in order to make throttling more reactive. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Correct thermal zone namesDmitry Osipenko1-2/+2
Rename thermal zones in order fix dt_binding_check warning telling that names do not match the expected pattern. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: acer-a500: Add power-supply to lvds-encoder nodeDmitry Osipenko1-0/+1
The lvds-encoder binding now supports power-supply property, let's specify it in the device-tree for completeness. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: acer-a500: Correct thermal zone namesDmitry Osipenko1-2/+2
Rename thermal zones in order fix dt_binding_check warning telling that names do not match the expected pattern. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add device-tree for OuyaPeter Geis2-1/+4513
The Ouya was the sole device produced by Ouya Inc in 2013. It was a game console originally running Android 5 on top of Linux 3.1.10. This patch adds the device tree supporting the Ouya. It has been tested on the original variant with Samsung ram. Signed-off-by: Peter Geis <[email protected]> Reviewed-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26arm64: dts: qcom: sdm845: use GIC_SPI for IPA interruptsAlex Elder1-2/+2
Use GIC_SPI rather than 0 in the specifiers for the two ARM GIC interrupts used by IPA. Signed-off-by: Alex Elder <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-26arm64: dts: qcom: sc7180: use GIC_SPI for IPA interruptsAlex Elder1-2/+2
Use GIC_SPI rather than 0 in the specifiers for the two ARM GIC interrupts used by IPA. Signed-off-by: Alex Elder <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-26arm64: dts: qcom: sc7180: limit IPA iommu streamsAlex Elder1-1/+2
Recently we learned that Android and Windows firmware don't seem to like using 3 as an iommu mask value for IPA. A simple fix was to specify exactly the streams needed explicitly, rather than implying a range with the mask. Make the same change for the SC7180 platform. See also: https://lore.kernel.org/linux-arm-msm/[email protected]/ Fixes: d82fade846aa8 ("arm64: dts: qcom: sc7180: add IPA information") Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Alex Elder <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-26arm64: dts: qcom: sm8150: Add Coresight supportSai Prakash Ranjan1-0/+591
Add coresight components found on Qualcomm Technologies, Inc. SM8150 SoC. Signed-off-by: Sai Prakash Ranjan <[email protected]> Reviewed-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-26ARM: dts: qcom: msm8974-lge-nexus5: Add fuel gaugeIskren Chernev1-0/+25
The LG Nexus 5 uses a maxim17048 fuelgauge. The maxim,rcomp value is taken from downstream dt. Temperature-based compensation is not yet supported in the mainline driver, but the readings seem fine nevertheless. Signed-off-by: Iskren Chernev <[email protected]> Tested-by: Nícolas F. R. A. Prado <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-26ARM: dts: qcom: msm8974-klte: Add fuel gaugeIskren Chernev1-0/+39
The Samsung Galaxy S5 uses a maxim17048 fuelgauge. The maxim,rcomp value is taken from downstream kernel. Model data and temperature-based compensation are not yet supported in the mainline driver, but the readings seem fine nevertheless. Signed-off-by: Iskren Chernev <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-26microblaze: Remove noMMU codeMichal Simek32-1251/+11
This configuration is obsolete and likely none is really using it. That's why remove it to simplify code. Note about CONFIG_MMU in hw_exception_handler.S is left intentionally for better comment understanding. Cc: Mike Rapoport <[email protected]> Cc: Arnd Bergmann <[email protected]> Signed-off-by: Michal Simek <[email protected]> Acked-by: Mike Rapoport <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Link: https://lore.kernel.org/r/43486cab370e0c0a79860120b71e0caac75a7e44.1606397528.git.michal.simek@xilinx.com
2020-11-26arm64: tegra: Fix Tegra194 HDA {clock,reset}-names orderingSameer Pujar1-6/+6
As per the HDA binding doc reorder {clock,reset}-names entries for Tegra194. This also serves as a preparation for converting existing binding doc to json-schema. Signed-off-by: Sameer Pujar <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26arm64: tegra: Enable AHCI on Jetson TX2Sowjanya Komatineni2-0/+32
This patch enables AHCI on Jetson TX2. Signed-off-by: Sowjanya Komatineni <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210Sowjanya Komatineni2-6/+6
Tegra AHCI dt-binding doc is converted from text based to yaml based. dtbs_check valdiation strictly follows reset-names order specified in yaml dt-binding. Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold. Tegra186 has 2 resets sata and sata-cold. This patch changes order of SATA resets to maintain proper resets order for commonly available resets across Tegra124 thru Tegra186 for dtbs_check to pass. Signed-off-by: Sowjanya Komatineni <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26arm64: tegra: Add XUSB pad controller interruptJC Kuo3-0/+3
This commit adds "interrupts" property to Tegra210/Tegra186/Tegra194 XUSB PADCTL node. XUSB PADCTL interrupt will be raised when USB wake event happens. This is required for supporting XUSB host controller ELPG. Signed-off-by: JC Kuo <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: multi_v7_defconfig: enable STM32 dfsdm audio supportOlivier Moysan1-0/+1
Add STM32 DFSDM audio support by enabling CONFIG_SND_SOC_STM32_DFSDM as module. Signed-off-by: Olivier Moysan <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: multi_v7_defconfig: enable STM32 spdifrx supportOlivier Moysan1-0/+1
Add STM32 SPDIFRX support by enabling CONFIG_SND_SOC_STM32_SPDIFRX as module. Signed-off-by: Olivier Moysan <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: multi_v7_defconfig: enable STUSB160X Type-C port controller supportAmelie Delaunay1-0/+2
Enable support for the STMicroelectronics STUSB160X USB Type-C port controller driver by turning on CONFIG_TYPEC and CONFIG_TYPEC_STUSB160X as modules. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: multi_v7_defconfig: add STM32 crypto supportLionel Debieve1-0/+3
Enable crypto controllers enabling following flags as module: CONFIG_CRYPTO_DEV_STM32_CRC CONFIG_CRYPTO_DEV_STM32_HASH CONFIG_CRYPTO_DEV_STM32_CRYP Signed-off-by: Lionel Debieve <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: multi_v7_defconfig: enable counter subsystem and stm32 counter driversFabrice Gasnier1-0/+3
This enables the counter subsystem and drivers for the stm32 timer and LP timer. Signed-off-by: Fabrice Gasnier <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.