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2020-07-31csky: Add irq_work supportGuo Ren2-0/+23
Running work in hardware interrupt context for csky. Implement: - arch_irq_work_raise() - arch_irq_work_has_interrupt() Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Fixup warning by EXPORT_SYMBOL(kmap)Guo Ren1-2/+0
This a wrong code, and no kmap symbol for export. Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Set CONFIG_NR_CPU 4 as defaultGuo Ren1-1/+1
The C860 processors support 4 cores smp for maximum, so set NR_CPU to 4 as default Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Use top-down mmap layoutGuo Ren1-0/+10
Follow riscv mmap layout with commit "riscv: make mmap allocation top-down by default (54c95a11cc1b)". Before: cat /proc/self/maps 00008000-000dc000 r-xp 00000000 fe:00 17 /bin/busybox 000dc000-000dd000 r--p 000d3000 fe:00 17 /bin/busybox 000dd000-000de000 rw-p 000d4000 fe:00 17 /bin/busybox 2aaa8000-2aac6000 r-xp 00000000 fe:00 196 /lib/ld-2.28.9000.so 2aac6000-2aac7000 r-xp 00000000 00:00 0 [vdso] 2aac7000-2aac8000 r--p 0001e000 fe:00 196 /lib/ld-2.28.9000.so 2aac8000-2aac9000 rw-p 0001f000 fe:00 196 /lib/ld-2.28.9000.so 2aac9000-2aad9000 r-xp 00000000 fe:00 219 /lib/libresolv-2.28.9000.so 2aad9000-2aada000 r--p 0000f000 fe:00 219 /lib/libresolv-2.28.9000.so 2aada000-2aadb000 rw-p 00010000 fe:00 219 /lib/libresolv-2.28.9000.so 2aadb000-2aadd000 rw-p 00000000 00:00 0 2aadd000-2ac27000 r-xp 00000000 fe:00 203 /lib/libc-2.28.9000.so 2ac27000-2ac28000 ---p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 2ac28000-2ac2a000 r--p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 2ac2a000-2ac2b000 rw-p 0014c000 fe:00 203 /lib/libc-2.28.9000.so 2ac2b000-2ac2e000 rw-p 00000000 00:00 0 7fb99000-7fbba000 rwxp 00000000 00:00 0 [stack] After: cat /proc/self/maps 00008000-000dc000 r-xp 00000000 fe:00 17 /bin/busybox 000dc000-000dd000 r--p 000d3000 fe:00 17 /bin/busybox 000dd000-000de000 rw-p 000d4000 fe:00 17 /bin/busybox 77e13000-77f5d000 r-xp 00000000 fe:00 203 /lib/libc-2.28.9000.so 77f5d000-77f5e000 ---p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 77f5e000-77f60000 r--p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 77f60000-77f61000 rw-p 0014c000 fe:00 203 /lib/libc-2.28.9000.so 77f61000-77f66000 rw-p 00000000 00:00 0 77f66000-77f76000 r-xp 00000000 fe:00 219 /lib/libresolv-2.28.9000.so 77f76000-77f77000 r--p 0000f000 fe:00 219 /lib/libresolv-2.28.9000.so 77f77000-77f78000 rw-p 00010000 fe:00 219 /lib/libresolv-2.28.9000.so 77f78000-77f96000 r-xp 00000000 fe:00 196 /lib/ld-2.28.9000.so 77f96000-77f97000 r-xp 00000000 00:00 0 [vdso] 77f97000-77f98000 r--p 0001e000 fe:00 196 /lib/ld-2.28.9000.so 77f98000-77f99000 rw-p 0001f000 fe:00 196 /lib/ld-2.28.9000.so 7fd7b000-7fd9c000 rwxp 00000000 00:00 0 [stack] Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Optimize the trap processing flowGuo Ren5-109/+157
- Seperate different trap functions - Add trap_no() - Remove panic code print - Redesign die_if_kerenl to die with riscv's - Print exact trap info for app segment fault [ 17.389321] gzip[126]: unhandled signal 11 code 0x3 at 0x0007835a in busybox[8000+d4000] [ 17.393882] [ 17.393882] CURRENT PROCESS: [ 17.393882] [ 17.394309] COMM=gzip PID=126 [ 17.394513] TEXT=00008000-000db2e4 DATA=000dcf14-000dd1ad BSS=000dd1ad-000ff000 [ 17.395499] USER-STACK=7f888e50 KERNEL-STACK=bf130300 [ 17.395499] [ 17.396801] PC: 0x0007835a (0x7835a) [ 17.397048] LR: 0x000058b4 (0x58b4) [ 17.397285] SP: 0xbe519f68 [ 17.397555] orig_a0: 0x00002852 [ 17.397886] PSR: 0x00020341 [ 17.398356] a0: 0x00002852 a1: 0x000f2f5a a2: 0x0000d7ae a3: 0x0000005d [ 17.399289] r4: 0x000de150 r5: 0x00000002 r6: 0x00000102 r7: 0x00007efa [ 17.399800] r8: 0x7f888bc4 r9: 0x00000001 r10: 0x000002eb r11: 0x0000aac1 [ 17.400166] r12: 0x00002ef2 r13: 0x00000007 r15: 0x000058b4 [ 17.400531] r16: 0x0000004c r17: 0x00000031 r18: 0x000f5816 r19: 0x000e8068 [ 17.401006] r20: 0x000f5818 r21: 0x000e8068 r22: 0x000f5918 r23: 0x90000000 [ 17.401721] r24: 0x00000031 r25: 0x000000c8 r26: 0x00000000 r27: 0x00000000 [ 17.402199] r28: 0x2ac2a000 r29: 0x00000000 r30: 0x00000000 tls: 0x2aadbaa8 [ 17.402686] hi: 0x00120340 lo: 0x7f888bec /etc/init.ci/ntfs3g_run: line 61: 126 Segmentation fault gzip -c -9 /mnt/test.bin > /mnt/test_bin.gz Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Add support for function error injectionGuo Ren4-0/+18
Inspired by the commit 42d038c4fb00 ("arm64: Add support for function error injection"), this patch supports function error injection for csky. This patch mainly support two functions: one is regs_set_return_value() which is used to overwrite the return value; the another function is override_function_with_return() which is to override the probed function returning and jump to its caller. Test log: cd /sys/kernel/debug/fail_function/ echo sys_clone > inject echo 100 > probability echo 1 > interval ls / [ 108.644163] FAULT_INJECTION: forcing a failure. [ 108.644163] name fail_function, interval 1, probability 100, space 0, times 1 [ 108.647799] CPU: 0 PID: 104 Comm: sh Not tainted 5.8.0-rc5+ #46 [ 108.648384] Call Trace: [ 108.649339] [<8005eed4>] walk_stackframe+0x0/0xf0 [ 108.649679] [<8005f16a>] show_stack+0x32/0x5c [ 108.649927] [<8040f9d2>] dump_stack+0x6e/0x9c [ 108.650271] [<80406f7e>] should_fail+0x15e/0x1ac [ 108.650720] [<80118ba8>] fei_kprobe_handler+0x28/0x5c [ 108.651519] [<80754110>] kprobe_breakpoint_handler+0x144/0x1cc [ 108.652289] [<8005d6da>] trap_c+0x8e/0x110 [ 108.652816] [<8005ce8c>] csky_trap+0x5c/0x70 -sh: can't fork: Invalid argument Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Fixup kprobes handler couldn't change pcGuo Ren1-1/+3
The "Changing Execution Path" section in the Documentation/kprobes.txt said: Since kprobes can probe into a running kernel code, it can change the register set, including instruction pointer. Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Fixup duplicated restore sp in RESTORE_REGS_FTRACEGuo Ren1-3/+0
There is no user return for RESTORE_REGS_FTRACE, so it's no need to save sp into ss0 as RESTORE_REGS_ALL. Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Add cpu feature register hint for smpGuo Ren1-0/+3
CPU features registers are setup by customers' bootloader, but Linux must help transfer them from the primary to secondary cores. This patch add hint2 CPU feature register supported. Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: Add SECCOMP_FILTER supportedGuo Ren5-3/+25
secure_computing() is called first in syscall_trace_enter() so that a system call will be aborted quickly without doing succeeding syscall tracing if seccomp rules want to deny that system call. TODO: - Update https://github.com/seccomp/libseccomp csky support Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31csky: remove unusued thread_saved_pc and *_segments functions/macrosTobias Klauser2-16/+0
These are used nowhere in the tree (except for some architectures which define them for their own use) and were already removed for other architectures in: commit 6474924e2b5d ("arch: remove unused macro/function thread_saved_pc()") commit c17c02040bf0 ("arch: remove unused *_segments() macros/functions") Remove them from arch/csky as well. Signed-off-by: Tobias Klauser <[email protected]> Signed-off-by: Guo Ren <[email protected]> Cc: Arnd Bergmann <[email protected]>
2020-07-31bpf, arm64: Add BPF exception tablesJean-Philippe Brucker3-9/+108
When a tracing BPF program attempts to read memory without using the bpf_probe_read() helper, the verifier marks the load instruction with the BPF_PROBE_MEM flag. Since the arm64 JIT does not currently recognize this flag it falls back to the interpreter. Add support for BPF_PROBE_MEM, by appending an exception table to the BPF program. If the load instruction causes a data abort, the fixup infrastructure finds the exception table and fixes up the fault, by clearing the destination register and jumping over the faulting instruction. To keep the compact exception table entry format, inspect the pc in fixup_exception(). A more generic solution would add a "handler" field to the table entry, like on x86 and s390. Signed-off-by: Jean-Philippe Brucker <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]> Acked-by: Song Liu <[email protected]> Link: https://lore.kernel.org/bpf/[email protected]
2020-07-30KVM: x86: Specify max TDP level via kvm_configure_mmu()Sean Christopherson5-10/+10
Capture the max TDP level during kvm_configure_mmu() instead of using a kvm_x86_ops hook to do it at every vCPU creation. Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30KVM: x86/mmu: Rename max_page_level to max_huge_page_levelSean Christopherson1-7/+7
Rename max_page_level to explicitly call out that it tracks the max huge page level so as to avoid confusion when a future patch moves the max TDP level, i.e. max root level, into the MMU and kvm_configure_mmu(). Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30KVM: x86: Dynamically calculate TDP level from max level and MAXPHYADDRSean Christopherson6-14/+21
Calculate the desired TDP level on the fly using the max TDP level and MAXPHYADDR instead of doing the same when CPUID is updated. This avoids the hidden dependency on cpuid_maxphyaddr() in vmx_get_tdp_level() and also standardizes the "use 5-level paging iff MAXPHYADDR > 48" behavior across x86. Suggested-by: Paolo Bonzini <[email protected]> Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30KVM: VXM: Remove temporary WARN on expected vs. actual EPTP level mismatchSean Christopherson1-10/+0
Remove the WARN in vmx_load_mmu_pgd() that was temporarily added to aid bisection/debug in the event the current MMU's shadow root level didn't match VMX's computed EPTP level. Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30KVM: x86: Pull the PGD's level from the MMU instead of recalculating itSean Christopherson6-13/+27
Use the shadow_root_level from the current MMU as the root level for the PGD, i.e. for VMX's EPTP. This eliminates the weird dependency between VMX and the MMU where both must independently calculate the same root level for things to work correctly. Temporarily keep VMX's calculation of the level and use it to WARN if the incoming level diverges. Opportunistically refactor kvm_mmu_load_pgd() to avoid indentation hell, and rename a 'cr3' param in the load_mmu_pgd prototype that managed to survive the cr3 purge. No functional change intended. Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30KVM: VMX: Make vmx_load_mmu_pgd() staticSean Christopherson2-2/+1
Make vmx_load_mmu_pgd() static as it is no longer invoked directly by nested VMX (or any code for that matter). No functional change intended. Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30KVM: x86/mmu: Add separate helper for shadow NPT root page role calcSean Christopherson1-5/+25
Refactor the shadow NPT role calculation into a separate helper to better differentiate it from the non-nested shadow MMU, e.g. the NPT variant is never direct and derives its root level from the TDP level. Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Reviewed-by: Vitaly Kuznetsov <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30KVM: VMX: Drop a duplicate declaration of construct_eptp()Sean Christopherson1-2/+0
Remove an extra declaration of construct_eptp() from vmx.h. Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30KVM: nSVM: Correctly set the shadow NPT root level in its MMU roleSean Christopherson2-1/+3
Move the initialization of shadow NPT MMU's shadow_root_level into kvm_init_shadow_npt_mmu() and explicitly set the level in the shadow NPT MMU's role to be the TDP level. This ensures the role and MMU levels are synchronized and also initialized before __kvm_mmu_new_pgd(), which consumes the level when attempting a fast PGD switch. Cc: Vitaly Kuznetsov <[email protected]> Fixes: 9fa72119b24db ("kvm: x86: Introduce kvm_mmu_calc_root_page_role()") Fixes: a506fdd223426 ("KVM: nSVM: implement nested_svm_load_cr3() and use it for host->guest switch") Signed-off-by: Sean Christopherson <[email protected]> Message-Id: <[email protected]> Reviewed-by: Vitaly Kuznetsov <[email protected]> Tested-by: Vitaly Kuznetsov <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2020-07-30Merge tag 'kvmarm-fixes-5.8-4' of ↵Paolo Bonzini2-8/+14
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master KVM/arm64 fixes for Linux 5.8, take #3 - Fix a corner case of a new mapping inheriting exec permission without and yet bypassing invalidation of the I-cache - Make sure PtrAuth predicates oinly generate inline code for the non-VHE hypervisor code
2020-07-30MIPS: DTS: Fix number of msi vectors for Loongson64GHuacai Chen1-2/+6
HT irqs vectors are 8 groups, each group has 32 irqs, Loongson64C CPUs can use only 4 groups and Loongson64G CPUs can use all 8 groups. So the number of msi vectors of Loongson64G is 192 (32*8 - 64 = 192). Fixes: 24af105962c8004edb9f5bf84 ("MIPS: Loongson64: DeviceTree for LS7A PCH") Signed-off-by: Huacai Chen <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-30ARM: percpu.h: fix build errorGrygorii Strashko1-0/+2
Fix build error for the case: defined(CONFIG_SMP) && !defined(CONFIG_CPU_V6) config: keystone_defconfig CC arch/arm/kernel/signal.o In file included from ../include/linux/random.h:14, from ../arch/arm/kernel/signal.c:8: ../arch/arm/include/asm/percpu.h: In function ‘__my_cpu_offset’: ../arch/arm/include/asm/percpu.h:29:34: error: ‘current_stack_pointer’ undeclared (first use in this function); did you mean ‘user_stack_pointer’? : "Q" (*(const unsigned long *)current_stack_pointer)); ^~~~~~~~~~~~~~~~~~~~~ user_stack_pointer Fixes: f227e3ec3b5c ("random32: update the net random state on interrupt and activity") Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2020-07-30riscv: fix build warning of mm/pageattrZong Li1-1/+2
Add hearder for missing prototype. Also, static keyword should be at beginning of declaration. Signed-off-by: Zong Li <[email protected]> Reviewed-by: Pekka Enberg <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Fix build warning for mm/initZong Li1-1/+1
Add static keyword for resource_init, this function is only used in this object file. Signed-off-by: Zong Li <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30RISC-V: Setup exception vector earlyAtish Patra3-10/+10
The trap vector is set only in trap_init which may be too late in some cases. Early ioremap/efi spits many warning messages which may be useful. Setup the trap vector early so that any warning/bug can be handled before generic code invokes trap_init. Signed-off-by: Atish Patra <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Select ARCH_HAS_DEBUG_VM_PGTABLEEmil Renner Berthing1-0/+1
This allows the pgtable tests to be built. Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Use generic pgprot_* macros from <linux/pgtable.h>Pekka Enberg1-6/+0
The <linux/pgtable.h> header now defines generic pgprot_ macros also for the no-MMU configuration, so let's use them. Signed-off-by: Pekka Enberg <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Cleanup unnecessary define in asm-offset.cGuo Ren2-8/+1
- TASK_THREAD_SP is duplicated define - TASK_STACK is no use at all - Don't worry about thread_info's offset in task_struct, have a look on comment in include/linux/sched.h: struct task_struct { /* * For reasons of header soup (see current_thread_info()), this * must be the first element of task_struct. */ struct thread_info thread_info; Signed-off-by: Guo Ren <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Add jump-label implementationEmil Renner Berthing8-0/+121
Add jump-label implementation based on the ARM64 version and add CONFIG_JUMP_LABEL=y to the defconfigs. Signed-off-by: Emil Renner Berthing <[email protected]> Reviewed-by: Björn Töpel <[email protected]> Tested-by: Björn Töpel <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocsEmil Renner Berthing1-0/+16
These are needed for the __jump_table in modules using static keys/jump-labels with the layout from HAVE_ARCH_JUMP_LABEL_RELATIVE on 64bit kernels. Signed-off-by: Emil Renner Berthing <[email protected]> Reviewed-by: Björn Töpel <[email protected]> Tested-by: Björn Töpel <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30Replace HTTP links with HTTPS ones: RISC-VAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Add STACKPROTECTOR supportedGuo Ren3-0/+40
The -fstack-protector & -fstack-protector-strong features are from gcc. The patch only add basic kernel support to stack-protector feature and some arch could have its own solution such as ARM64_PTR_AUTH. After enabling STACKPROTECTOR and STACKPROTECTOR_STRONG, the .text size is expanded from 0x7de066 to 0x81fb32 (only 5%) to add canary checking code. Signed-off-by: Guo Ren <[email protected]> Reviewed-by: Kees Cook <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Fix typo in asm/hwcap.h uapi headerTobias Klauser1-1/+1
s/userpsace/userspace/ Signed-off-by: Tobias Klauser <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Add kmemleak supportTobias Klauser1-0/+1
Tested using syzkaller in QEMU's riscv64 virt machine. Signed-off-by: Tobias Klauser <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Allow building with kcov coverageTobias Klauser4-0/+7
Add ARCH_HAS_KCOV and HAVE_GCC_PLUGINS to the riscv Kconfig. Also disable instrumentation of some early boot code and vdso. Boot-tested on QEMU's riscv64 virt machine. Signed-off-by: Tobias Klauser <[email protected]> Acked-by: Dmitry Vyukov <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Enable context trackingGreentime Hu2-1/+16
This patch implements and enables context tracking for riscv (which is a prerequisite for CONFIG_NO_HZ_FULL support) It adds checking for previous state in the entry that all excepttions and interrupts goes to and calls context_tracking_user_exit() if it comes from user space. It also calls context_tracking_user_enter() if it will return to user space before restore_all. This patch is tested with the dynticks-testing testcase in qemu-system-riscv64 virt machine and Unleashed board. git://git.kernel.org/pub/scm/linux/kernel/git/frederic/dynticks-testing.git We can see the log here. The tick got mostly stopped during the execution of the user loop. _-----=> irqs-off / _----=> need-resched | / _---=> hardirq/softirq || / _--=> preempt-depth ||| / delay TASK-PID CPU# |||| TIMESTAMP FUNCTION | | | |||| | | <idle>-0 [001] d..2 604.183512: sched_switch: prev_comm=swapper/1 prev_pid=0 prev_prio=120 prev_state=R ==> next_comm=taskset next_pid=273 next_prio=120 user_loop-273 [001] d.h1 604.184788: hrtimer_expire_entry: hrtimer=000000002eda5fab function=tick_sched_timer now=604176096300 user_loop-273 [001] d.s2 604.184897: workqueue_queue_work: work struct=00000000383402c2 function=vmstat_update workqueue=00000000f36d35d4 req_cpu=1 cpu=1 user_loop-273 [001] dns2 604.185039: tick_stop: success=0 dependency=SCHED user_loop-273 [001] dn.1 604.185103: tick_stop: success=0 dependency=SCHED user_loop-273 [001] d..2 604.185154: sched_switch: prev_comm=taskset prev_pid=273 prev_prio=120 prev_state=R+ ==> next_comm=kworker/1:1 next_pid=46 next_prio=120 <...>-46 [001] .... 604.185194: workqueue_execute_start: work struct 00000000383402c2: function vmstat_update <...>-46 [001] d..2 604.185266: sched_switch: prev_comm=kworker/1:1 prev_pid=46 prev_prio=120 prev_state=I ==> next_comm=taskset next_pid=273 next_prio=120 user_loop-273 [001] d.h1 604.188812: hrtimer_expire_entry: hrtimer=000000002eda5fab function=tick_sched_timer now=604180133400 user_loop-273 [001] d..1 604.189050: tick_stop: success=1 dependency=NONE user_loop-273 [001] d..2 614.251386: sched_switch: prev_comm=user_loop prev_pid=273 prev_prio=120 prev_state=X ==> next_comm=swapper/1 next_pid=0 next_prio=120 <idle>-0 [001] d..2 614.315391: sched_switch: prev_comm=swapper/1 prev_pid=0 prev_prio=120 prev_state=R ==> next_comm=taskset next_pid=276 next_prio=120 Signed-off-by: Greentime Hu <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Support irq_work via self IPIsGreentime Hu2-0/+25
Support for arch_irq_work_raise() and arch_irq_work_has_interrupt() was missing from riscv (a prerequisite for FULL_NOHZ). Signed-off-by: Greentime Hu <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Enable LOCKDEP_SUPPORT & fixup TRACE_IRQFLAGS_SUPPORTGuo Ren2-1/+36
Lockdep is needed by proving the spinlocks and rwlocks. To suupport it, we need fixup TRACE_IRQFLAGS_SUPPORT in kernel/entry.S. This patch follow Documentation/irqflags-tracing.txt. Signed-off-by: Guo Ren <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Fixup lockdep_assert_held with wrong param cpu_runningZong Li1-1/+0
The cpu_running is not a lock-class, it lacks the dep_map member in completion. It causes the error as follow: arch/riscv/kernel/smpboot.c: In function '__cpu_up': ./include/linux/lockdep.h:364:52: error: 'struct completion' has no member named 'dep_map' 364 | #define lockdep_is_held(lock) lock_is_held(&(lock)->dep_map) | ^~ ./include/asm-generic/bug.h:113:25: note: in definition of macro 'WARN_ON' 113 | int __ret_warn_on = !!(condition); \ | ^~~~~~~~~ ./include/linux/lockdep.h:390:27: note: in expansion of macro 'lockdep_is_held' 390 | WARN_ON(debug_locks && !lockdep_is_held(l)); \ | ^~~~~~~~~~~~~~~ arch/riscv/kernel/smpboot.c:118:2: note: in expansion of macro 'lockdep_assert_held' 118 | lockdep_assert_held(&cpu_running); There are a lot of archs which use cpu_running in smpboot.c (arm, arm64, openrisc, xtensa, s390, x86, mips), but none of them try lockdep_assert_held(&cpu_running.wait.lock). So Just remove it. Signed-off-by: Zong Li <[email protected]> Signed-off-by: Guo Ren <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30riscv: Fixup static_obj() failGuo Ren1-1/+1
When enable LOCKDEP, static_obj() will cause error. Because some __initdata static variables is before _stext: static int static_obj(const void *obj) { unsigned long start = (unsigned long) &_stext, end = (unsigned long) &_end, addr = (unsigned long) obj; /* * static variable? */ if ((addr >= start) && (addr < end)) return 1; [ 0.067192] INFO: trying to register non-static key. [ 0.067325] the code is fine but needs lockdep annotation. [ 0.067449] turning off the locking correctness validator. [ 0.067718] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.7.0-rc7-dirty #44 [ 0.067945] Call Trace: [ 0.068369] [<ffffffe00020323c>] walk_stackframe+0x0/0xa4 [ 0.068506] [<ffffffe000203422>] show_stack+0x2a/0x34 [ 0.068631] [<ffffffe000521e4e>] dump_stack+0x94/0xca [ 0.068757] [<ffffffe000255a4e>] register_lock_class+0x5b8/0x5bc [ 0.068969] [<ffffffe000255abe>] __lock_acquire+0x6c/0x1d5c [ 0.069101] [<ffffffe0002550fe>] lock_acquire+0xae/0x312 [ 0.069228] [<ffffffe000989a8e>] _raw_spin_lock_irqsave+0x40/0x5a [ 0.069357] [<ffffffe000247c64>] complete+0x1e/0x50 [ 0.069479] [<ffffffe000984c38>] rest_init+0x1b0/0x28a [ 0.069660] [<ffffffe0000016a2>] 0xffffffe0000016a2 [ 0.069779] [<ffffffe000001b84>] 0xffffffe000001b84 [ 0.069953] [<ffffffe000001092>] 0xffffffe000001092 static __initdata DECLARE_COMPLETION(kthreadd_done); noinline void __ref rest_init(void) { ... complete(&kthreadd_done); Signed-off-by: Guo Ren <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
2020-07-30arm64: csum: Fix handling of bad packetsRobin Murphy1-2/+3
Although iph is expected to point to at least 20 bytes of valid memory, ihl may be bogus, for example on reception of a corrupt packet. If it happens to be less than 5, we really don't want to run away and dereference 16GB worth of memory until it wraps back to exactly zero... Fixes: 0e455d8e80aa ("arm64: Implement optimised IP checksum helpers") Reported-by: guodeqing <[email protected]> Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2020-07-30arm64: Drop unnecessary include from asm/smp.hMarc Zyngier1-1/+0
asm/pointer_auth.h is not needed anymore in asm/smp.h, as 62a679cb2825 ("arm64: simplify ptrauth initialization") removed the keys from the secondary_data structure. This also cures a compilation issue introduced by f227e3ec3b5c ("random32: update the net random state on interrupt and activity"). Fixes: 62a679cb2825 ("arm64: simplify ptrauth initialization") Fixes: f227e3ec3b5c ("random32: update the net random state on interrupt and activity") Acked-by: Catalin Marinas <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2020-07-30arm64/alternatives: move length validation inside the subsectionSami Tolvanen1-2/+2
Commit f7b93d42945c ("arm64/alternatives: use subsections for replacement sequences") breaks LLVM's integrated assembler, because due to its one-pass design, it cannot compute instruction sequence lengths before the layout for the subsection has been finalized. This change fixes the build by moving the .org directives inside the subsection, so they are processed after the subsection layout is known. Fixes: f7b93d42945c ("arm64/alternatives: use subsections for replacement sequences") Signed-off-by: Sami Tolvanen <[email protected]> Link: https://github.com/ClangBuiltLinux/linux/issues/1078 Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2020-07-30Merge branch 'kvm-arm64/misc-5.9' into kvmarm-master/nextMarc Zyngier4-17/+19
Signed-off-by: Marc Zyngier <[email protected]>
2020-07-30KVM: arm64: Move S1PTW S2 fault logic out of io_mem_abort()Will Deacon2-7/+12
To allow for re-injection of stage-2 faults on stage-1 page-table walks due to either a missing or read-only memslot, move the triage logic out of io_mem_abort() and into kvm_handle_guest_abort(), where these aborts can be handled before anything else. Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Quentin Perret <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-07-30KVM: arm64: Don't skip cache maintenance for read-only memslotsWill Deacon1-1/+1
If a guest performs cache maintenance on a read-only memslot, we should inform userspace rather than skip the instruction altogether. Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Quentin Perret <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-07-30KVM: arm64: Handle data and instruction external aborts the same wayWill Deacon1-6/+3
If the guest generates a synchronous external abort which is not handled by the host, we inject it back into the guest as a virtual SError, but only if the original fault was reported on the data side. Instruction faults are reported as "Unsupported FSC", causing the vCPU run loop to bail with -EFAULT. Although synchronous external aborts from a guest are pretty unusual, treat them the same regardless of whether they are taken as data or instruction aborts by EL2. Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Quentin Perret <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-07-30KVM: arm64: Rename kvm_vcpu_dabt_isextabt()Will Deacon3-3/+3
kvm_vcpu_dabt_isextabt() is not specific to data aborts and, unlike kvm_vcpu_dabt_issext(), has nothing to do with sign extension. Rename it to 'kvm_vcpu_abt_issea()'. Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Quentin Perret <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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