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2011-07-24KVM: MMU: optimize to handle dirty bitXiao Guangrong2-34/+25
If dirty bit is not set, we can make the pte access read-only to avoid handing dirty bit everywhere Signed-off-by: Xiao Guangrong <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2011-07-24KVM: MMU: cache mmio info on page fault pathXiao Guangrong6-21/+96
If the page fault is caused by mmio, we can cache the mmio info, later, we do not need to walk guest page table and quickly know it is a mmio fault while we emulate the mmio instruction Signed-off-by: Xiao Guangrong <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2011-07-24KVM: x86: introduce vcpu_mmio_gva_to_gpa to cleanup the codeXiao Guangrong1-11/+31
Introduce vcpu_mmio_gva_to_gpa to translate the gva to gpa, we can use it to cleanup the code between read emulation and write emulation Signed-off-by: Xiao Guangrong <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2011-07-24KVM: MMU: do not update slot bitmap if spte is nonpresentXiao Guangrong1-8/+7
Set slot bitmap only if the spte is present Signed-off-by: Xiao Guangrong <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2011-07-24KVM: MMU: fix walking shadow page tableXiao Guangrong1-4/+5
Properly check the last mapping, and do not walk to the next level if last spte is met Signed-off-by: Xiao Guangrong <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2011-07-24KVM guest: KVM Steal time registrationGlauber Costa3-0/+80
This patch implements the kvm bits of the steal time infrastructure. The most important part of it, is the steal time clock. It is an continuous clock that shows the accumulated amount of steal time since vcpu creation. It is supposed to survive cpu offlining/onlining. [marcelo: fix build with CONFIG_KVM_GUEST=n] Signed-off-by: Glauber Costa <[email protected]> Acked-by: Rik van Riel <[email protected]> Tested-by: Eric B Munson <[email protected]> CC: Jeremy Fitzhardinge <[email protected]> CC: Peter Zijlstra <[email protected]> CC: Avi Kivity <[email protected]> CC: Anthony Liguori <[email protected]> Signed-off-by: Avi Kivity <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2011-07-24[S390] use siginfo for sigtrap signalsMartin Schwidefsky1-6/+17
Provide additional information on SIGTRAP by using a sig_info signal. Use TRAP_BRKPT for breakpoints via illegal operation and TRAP_HWBKPT for breakpoints via program event recording. Provide the address of the instruction that caused the breakpoint via si_addr. While we are at it get rid of tracehook_consider_fatal_signal. Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] kvm: make sigp emerg smp capableChristian Ehrhardt2-0/+9
SIGP emerg needs to pass the source vpu adress into __LC_CPU_ADDRESS of the target guest. Signed-off-by: Christian Ehrhardt <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] disable cpu measurement alerts on a dying cpuJan Glauber1-1/+2
The cpu measurement alerts that are used for instance by oprofile for hardware sampling are not turned off on a cpu that is going offline. Add the appropriate control register bit that should be disabled to the list. Signed-off-by: Jan Glauber <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] initial cr0 bitsMartin Schwidefsky1-1/+1
Remove outdated bits from the initial cr0 register. Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] iucv cr0 enablement bitMartin Schwidefsky2-2/+2
Do not set the cr0 enablement bit for iucv by default in head[31|64].S, move the enablement to iucv_init in the iucv base layer. Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] race safe external interrupt registrationJan Glauber1-37/+46
The (un-)register_external_interrupt functions are not race safe if more than one interrupt handler is added or deleted for an external interrupt concurrently. Make the registration / unregistration of external interrupts race safe by using RCU and a spinlock. RCU is used to avoid a performance penalty in the external interrupt handler, the register and unregister functions are protected by the spinlock and are not performance critical. call_rcu must be used since the SCLP driver uses the interface with IRQs disabled. Also use the generic list implementation rather than homebrewn list code. Signed-off-by: Jan Glauber <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] cleanup program check handler prototypesMartin Schwidefsky2-13/+7
Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] remove kvm mmu reload on s390Carsten Otte2-19/+2
This patch removes the mmu reload logic for kvm on s390. Via Martin's new gmap interface, we can safely add or remove memory slots while guest CPUs are in-flight. Thus, the mmu reload logic is not needed anymore. Signed-off-by: Carsten Otte <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] Use gmap translation for accessing guest memoryCarsten Otte6-110/+194
This patch removes kvm-s390 internal assumption of a linear mapping of guest address space to user space. Previously, guest memory was translated to user addresses using a fixed offset (gmsor). The new code uses gmap_fault to resolve guest addresses. Signed-off-by: Carsten Otte <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] use gmap address spaces for kvm guest imagesCarsten Otte3-12/+40
This patch switches kvm from using (Qemu's) user address space to Martin's gmap address space. This way QEMU does not have to use a linker script in order to fit large guests at low addresses in its address space. Signed-off-by: Carsten Otte <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] kvm guest address space mappingMartin Schwidefsky11-36/+473
Add code that allows KVM to control the virtual memory layout that is seen by a guest. The guest address space uses a second page table that shares the last level pte-tables with the process page table. If a page is unmapped from the process page table it is automatically unmapped from the guest page table as well. The guest address space mapping starts out empty, KVM can map any individual 1MB segments from the process virtual memory to any 1MB aligned location in the guest virtual memory. If a target segment in the process virtual memory does not exist or is unmapped while a guest mapping exists the desired target address is stored as an invalid segment table entry in the guest page table. The population of the guest page table is fault driven. Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] fix s390 assembler code alignmentsJan Glauber21-680/+378
The alignment is missing for various global symbols in s390 assembly code. With a recent gcc and an instruction like stgrl this can lead to a specification exception if the instruction uses such a mis-aligned address. Specify the alignment explicitely and while add it define __ALIGN for s390 and use the ENTRY define to save some lines of code. Signed-off-by: Jan Glauber <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] move sie code to entry.SMartin Schwidefsky5-107/+79
The entry to / exit from sie has subtle dependencies to the first level interrupt handler. Move the sie assembler code to entry64.S and replace the SIE_HOOK callback with a test and the new _TIF_SIE bit. In addition this patch fixes several problems in regard to the check for the_TIF_EXIT_SIE bits. The old code checked the TIF bits before executing the interrupt handler and it only modified the instruction address if it pointed directly to the sie instruction. In both cases it could miss a TIF bit that normally would cause an exit from the guest and would reenter the guest context. Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] kvm: handle tprot interceptsChristian Borntraeger5-0/+53
When running a kvm guest we can get intercepts for tprot, if the host page table is read-only or not populated. This patch implements the most common case (linux memory detection). This also allows host copy on write for guest memory on newer systems. Signed-off-by: Christian Borntraeger <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-24[S390] irqs: Do not trace arch_local_{*,irq_*} functionsSteven Rostedt1-8/+8
Do not trace arch_local_save_flags(), arch_local_irq_*() and friends. Although they are marked inline, gcc may still make a function out of them and add it to the pool of functions that are traced by the function tracer. This can cause undesirable results (kernel panic, triple faults, etc). Add the notrace notation to prevent them from ever being traced. Cc: Heiko Carstens <[email protected]> Signed-off-by: Steven Rostedt <[email protected]> Signed-off-by: Martin Schwidefsky <[email protected]>
2011-07-23Merge branch 'for-linus' of ↵Linus Torvalds114-2138/+1733
git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (43 commits) Blackfin: spi-docs: further clarify GPIO CS behavior with various modes Blackfin: boards: fix pcm device name Blackfin: SMP: punt unused atomic_test_mask helper Blackfin: irqs: do not trace arch_local_{*,irq_*} functions Blackfin: bf526: restrict reboot workaround to 0.0 silicon Blackfin: bf51x: fix alternative portmux options Blackfin: bf54x: fix GPIO resume code Blackfin: dpmc: optimize SDRAM programming slightly Blackfin: dpmc: don't save/restore scratch registers Blackfin: bf538: pull gpio/port logic out of core hibernate paths Blackfin: dpmc: optimize hibernate/resume path Blackfin: dpmc: do not save/restore EVT0/EVT1/EVT4 when hibernating Blackfin: dpmc: relocate hibernate helper macros Blackfin: dpmc: omit RETE/RETN when hibernating Blackfin: dpmc: optimize SIC_IWR programming a little Blackfin: gpio/ints: generalize pint logic Blackfin: dpmc: bind to MMR names and not CPUs Blackfin: debug-mmrs: generalize pint logic Blackfin: bf54x: switch to common pint MMR struct Blackfin: bf54x: tweak MMR pint names ...
2011-07-23Merge branches 'x86-detect-hyper-for-linus', 'x86-fpu-for-linus', ↵Linus Torvalds8-33/+45
'x86-kexec-for-linus', 'x86-platform-for-linus', 'x86-quirks-for-linus', 'x86-tsc-for-linus' and 'x86-smpboot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-detect-hyper-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, hyper: Change hypervisor detection order * 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86-32, fpu: Fix DNA exception during check_fpu() * 'x86-kexec-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: kexec, x86: Fix incorrect jump back address if not preserving context * 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, config: Introduce an INTEL_MID configuration * 'x86-quirks-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, quirks: Use pci_dev->revision * 'x86-tsc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: tsc: Remove unneeded DMI-based blacklisting * 'x86-smpboot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, boot: Wait for boot cpu to show up if nr_cpus limit is about to hit
2011-07-23Merge branch 'x86-build-for-linus' of ↵Linus Torvalds2-37/+5
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-build-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, build: Do not set the root_dev field in bzImage
2011-07-23Merge branch 'x86-atomic-for-linus' of ↵Linus Torvalds4-0/+98
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-atomic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: Add support for cmpxchg_double
2011-07-23Merge branch 'timers-clocksource-for-linus' of ↵Linus Torvalds3-360/+72
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: clocksource: apb: Share APB timer code with other platforms
2011-07-23Merge branches 'x86-urgent-for-linus', 'core-debug-for-linus', ↵Linus Torvalds1-1/+2
'irq-core-for-linus' and 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: um: Make rwsem.S depend on CONFIG_RWSEM_XCHGADD_ALGORITHM * 'core-debug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: debug: Make CONFIG_EXPERT select CONFIG_DEBUG_KERNEL to unhide debug options * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: genirq: Remove unused CHECK_IRQ_PER_CPU() * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf tools, x86: Fix 32-bit compile on 64-bit system
2011-07-23virtio: expose for non-virtualization users tooOhad Ben-Cohen7-37/+0
virtio has been so far used only in the context of virtualization, and the virtio Kconfig was sourced directly by the relevant arch Kconfigs when VIRTUALIZATION was selected. Now that we start using virtio for inter-processor communications, we need to source the virtio Kconfig outside of the virtualization scope too. Moreover, some architectures might use virtio for both virtualization and inter-processor communications, so directly sourcing virtio might yield unexpected results due to conflicting selections. The simple solution offered by this patch is to always source virtio's Kconfig in drivers/Kconfig, and remove it from the appropriate arch Kconfigs. Additionally, a virtio menu entry has been added so virtio drivers don't show up in the general drivers menu. This way anyone can use virtio, though it's arguably less accessible (and neat!) for virtualization users now. Note: some architectures (mips and sh) seem to have a VIRTUALIZATION menu merely for sourcing virtio's Kconfig, so that menu is removed too. Signed-off-by: Ohad Ben-Cohen <[email protected]> Signed-off-by: Rusty Russell <[email protected]>
2011-07-23Blackfin: boards: fix pcm device nameScott Jiang2-11/+56
The pcm driver name has been changed, but the device name has not. Signed-off-by: Scott Jiang <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: SMP: punt unused atomic_test_mask helperMike Frysinger1-5/+0
No one uses this func, so just punt it. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: irqs: do not trace arch_local_{*,irq_*} functionsSteven Rostedt1-21/+21
Do not trace arch_local_save_flags(), arch_local_irq_*() and friends. Although they are marked inline, gcc may still make a function out of them and add it to the pool of functions that are traced by the function tracer. This can cause undesirable results (kernel panic, triple faults, etc). Add the notrace notation to prevent them from ever being traced. Signed-off-by: Steven Rostedt <[email protected]> Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: bf526: restrict reboot workaround to 0.0 siliconMike Frysinger1-1/+3
The bug in the BF526 rom when doing a software reset exists only in older silicon versions, so don't clear SWRST on newer parts. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: bf51x: fix alternative portmux optionsMike Frysinger2-45/+87
The BF51x's alternative portmux Kconfig options were copy & pasted from the BF52x, but never tweaked to reflect it. So drop the old options as they were never used (and were simply wrong), and add the BF51x specific pieces to the Kconfig and header. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: bf54x: fix GPIO resume codeMike Frysinger1-2/+2
Back in commit c03c2a87347b849ec927d, we fixed logic in the non-bf54x GPIO resume code to set the data levels properly before the direction to avoid spurious line glitches. But we missed the bf54x code paths. So add the same fix there. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: dpmc: optimize SDRAM programming slightlyMike Frysinger1-9/+10
No need to reload these registers constantly since they're always available (we're not making any function calls in between). Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: dpmc: don't save/restore scratch registersMike Frysinger1-6/+6
The Blackfin C ABI says we do not need to save/restore R0-R3 and P0-P2 as they are available as scratch registers. So don't bother. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: bf538: pull gpio/port logic out of core hibernate pathsMike Frysinger5-36/+65
Re-architect how we save/restore the gpio/port logic that only pertains to bf538/bf539 parts by pulling it out of the core code paths and pushing it out to bf538-specific locations. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: dpmc: optimize hibernate/resume pathMike Frysinger2-439/+572
The current save logic used in hibernation is to do a MMR load (base + offset) into a register, and then push that onto the stack. Then when restoring, pop off the stack into a register followed by a MMR store (base + offset). These use plenty of 32bit insns rather than 16bit, are pretty long winded, and full of pipeline bubbles. So, by taking advantage of MMRs that are contiguous, the multi-register push/pop insn, and register abuse, we can shrink this code considerably. When saving, the new logic does a lot of loads into the data and pointer registers before executing a single multi-register push insn. Then when restoring, we do a single multi-register pop insn followed by a lot of stores. Overall, this allows us to cut the insn count by ~30%, the code size by ~45%, and drastically reduce the register hazards that trigger bubbles in the pipeline. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: dpmc: do not save/restore EVT0/EVT1/EVT4 when hibernatingMike Frysinger1-6/+0
EVT0 is for emulation, EVT1 is for reset, and EVT4 is the "global int disable" region. None of these are used by software (or even hardware), so don't bother saving/restoring them when we hibernate since nothing ever uses these in Linux (the only thing they would be useful for is core-memory scratch, but that's just crazy talk). Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: dpmc: relocate hibernate helper macrosMike Frysinger2-26/+24
This defines only get used in the hibernate code, so remove them from the global dpmc header as no one else cares. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: dpmc: omit RETE/RETN when hibernatingMike Frysinger1-4/+0
The RETE/RETN registers are only used in emulation(JTAG) and NMI nodes, or as scratch registers, neither of which need to be saved/restored as this code doesn't execute at those core event levels. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: dpmc: optimize SIC_IWR programming a littleMike Frysinger1-9/+6
For parts with more than one SIC_IWR, we can optimize the writing a little bit using better Blackfin insns. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: gpio/ints: generalize pint logicMike Frysinger3-12/+19
Have the logic that uses peripheral interrupt blocks key off of pint defines rather than CPU names so that things are generalized across families. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: dpmc: bind to MMR names and not CPUsMike Frysinger1-4/+3
Have the code work off of MMR names rather than CPU defines so there is less code to tweak in the future with new parts. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: debug-mmrs: generalize pint logicMike Frysinger1-19/+31
Don't bind the code to specific CPU defines. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: bf54x: switch to common pint MMR structMike Frysinger1-18/+5
We have a struct in the headers describing the register layout, so drop the local duplicate one. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: bf54x: tweak MMR pint namesMike Frysinger2-2/+2
The hardware block uses the name "request" rather than "irq", so update the struct accordingly. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: bf54x: constify pint register arrayMike Frysinger1-1/+1
The array of pointers to register blocks never changes, so constify it. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: gpio: punt unused GPIO_# definesMike Frysinger2-52/+3
These defines don't accomplish much as GPIO_# is the same thing as #. Each CPU already provides helpful symbolic defines like GPIO_<PIN> which everyone uses, so just punt these # ones. Signed-off-by: Mike Frysinger <[email protected]>
2011-07-23Blackfin: convert unicode space gremlinsMike Frysinger7-27/+27
Not sure how these guys slipped in, but they're annoying me. So bring these unicode space gremlins down to earth to normal ascii spaces. Signed-off-by: Mike Frysinger <[email protected]>
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