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2010-04-25KVM: x86: Add support for saving&restoring debug registersJan Kiszka2-0/+64
So far user space was not able to save and restore debug registers for migration or after reset. Plug this hole. Signed-off-by: Jan Kiszka <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: x86: Save&restore interrupt shadow maskJan Kiszka6-13/+23
The interrupt shadow created by STI or MOV-SS-like operations is part of the VCPU state and must be preserved across migration. Transfer it in the spare padding field of kvm_vcpu_events.interrupt. As a side effect we now have to make vmx_set_interrupt_shadow robust against both shadow types being set. Give MOV SS a higher priority and skip STI in that case to avoid that VMX throws a fault on next entry. Signed-off-by: Jan Kiszka <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: x86: Do not return soft events in vcpu_eventsJan Kiszka1-3/+6
To avoid that user space migrates a pending software exception or interrupt, mask them out on KVM_GET_VCPU_EVENTS. Without this, user space would try to reinject them, and we would have to reconstruct the proper instruction length for VMX event injection. Now the pending event will be reinjected via executing the triggering instruction again. Signed-off-by: Jan Kiszka <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Fix wrong interrupt injection in enable_irq_windowsJoerg Roedel1-9/+8
The nested_svm_intr() function does not execute the vmexit anymore. Therefore we may still be in the nested state after that function ran. This patch changes the nested_svm_intr() function to return wether the irq window could be enabled. Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: drop unneeded kvm_run check in emulate_instruction()Gleb Natapov1-1/+1
vcpu->run is initialized on vcpu creation and can never be NULL here. Signed-off-by: Gleb Natapov <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Remove newlines from nested trace pointsJoerg Roedel1-6/+6
The tracing infrastructure adds its own newlines. Remove them from the trace point printk format strings. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Make lazy FPU switching work with nested svmJoerg Roedel1-4/+39
The new lazy fpu switching code may disable cr0 intercepts when running nested. This is a bug because the nested hypervisor may still want to intercept cr0 which will break in this situation. This patch fixes this issue and makes lazy fpu switching working with nested svm. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Activate nested state only when guest state is completeJoerg Roedel1-6/+9
Certain functions called during the emulated world switch behave differently when the vcpu is running nested. This is not the expected behavior during a world switch emulation. This patch ensures that the nested state is activated only if the vcpu is completly in nested state. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Don't sync nested cr8 to lapic and backJoerg Roedel1-15/+31
This patch makes syncing of the guest tpr to the lapic conditional on !nested. Otherwise a nested guest using the TPR could freeze the guest. Another important change this patch introduces is that the cr8 intercept bits are no longer ORed at vmrun emulation if the guest sets VINTR_MASKING in its VMCB. The reason is that nested cr8 accesses need alway be handled by the nested hypervisor because they change the shadow version of the tpr. Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Fix nested msr intercept handlingJoerg Roedel1-10/+3
The nested_svm_exit_handled_msr() function maps only one page of the guests msr permission bitmap. This patch changes the code to use kvm_read_guest to fix the bug. Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Annotate nested_svm_map with might_sleep()Joerg Roedel1-0/+2
The nested_svm_map() function can sleep and must not be called from atomic context. So annotate that function. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Sync all control registers on nested vmexitJoerg Roedel1-0/+4
Currently the vmexit emulation does not sync control registers were the access is typically intercepted by the nested hypervisor. But we can not count on that intercepts to sync these registers too and make the code architecturally more correct. Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Fix schedule-while-atomic on nested exception handlingJoerg Roedel1-4/+19
Move the actual vmexit routine out of code that runs with irqs and preemption disabled. Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: SVM: Don't use kmap_atomic in nested_svm_mapJoerg Roedel1-23/+24
Use of kmap_atomic disables preemption but if we run in shadow-shadow mode the vmrun emulation executes kvm_set_cr3 which might sleep or fault. So use kmap instead for nested_svm_map. Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: remove redundant prototype of load_pdptrs()Takuya Yoshikawa1-1/+0
This patch removes redundant prototype of load_pdptrs(). I found load_pdptrs() twice in kvm_host.h. Let's remove one. Signed-off-by: Takuya Yoshikawa <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: x86 emulator: Fix x86_emulate_insn() not to use the variable rc for ↵Takuya Yoshikawa1-9/+6
non-X86EMUL values This patch makes non-X86EMUL_* family functions not to use the variable rc. Be sure that this changes nothing but makes the purpose of the variable rc clearer. Signed-off-by: Takuya Yoshikawa <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: x86 emulator: X86EMUL macro replacements: x86_emulate_insn() and its ↵Takuya Yoshikawa1-33/+29
helpers This patch just replaces integer values used inside x86_emulate_insn() and its helper functions to X86EMUL_*. The purpose of this is to make it clear what will happen when the variable rc is compared to X86EMUL_* at the end of x86_emulate_insn(). Signed-off-by: Takuya Yoshikawa <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: x86 emulator: X86EMUL macro replacements: from do_fetch_insn_byte() to ↵Takuya Yoshikawa1-9/+9
x86_decode_insn() This patch just replaces the integer values used inside x86's decode functions to X86EMUL_*. By this patch, it becomes clearer that we are using X86EMUL_* value propagated from ops->read_std() in do_fetch_insn_byte(). Signed-off-by: Takuya Yoshikawa <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: inject #UD in 64bit mode from instruction that are not valid thereGleb Natapov1-5/+5
Some instruction are obsolete in a long mode. Inject #UD. Signed-off-by: Gleb Natapov <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-25KVM: use desc_ptr struct instead of kvm private descriptor_tableGleb Natapov4-66/+61
x86 arch defines desc_ptr for idt/gdt pointers, no need to define another structure in kvm code. Signed-off-by: Gleb Natapov <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-24Merge branch 'for-linus' of ↵Linus Torvalds1-7/+37
git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: Ensure we re-enable devices on resume x86/PCI: parse additional host bridge window resource types PCI: revert broken device warning PCI aerdrv: use correct bit defines and add 2ms delay to aer_root_reset x86/PCI: ignore Consumer/Producer bit in ACPI window descriptions
2010-04-24VMware Balloon driverDmitry Torokhov1-0/+2
This is a standalone version of VMware Balloon driver. Ballooning is a technique that allows hypervisor dynamically limit the amount of memory available to the guest (with guest cooperation). In the overcommit scenario, when hypervisor set detects that it needs to shuffle some memory, it instructs the driver to allocate certain number of pages, and the underlying memory gets returned to the hypervisor. Later hypervisor may return memory to the guest by reattaching memory to the pageframes and instructing the driver to "deflate" balloon. We are submitting a standalone driver because KVM maintainer (Avi Kivity) expressed opinion (rightly) that our transport does not fit well into virtqueue paradigm and thus it does not make much sense to integrate with virtio. There were also some concerns whether current ballooning technique is the right thing. If there appears a better framework to achieve this we are prepared to evaluate and switch to using it, but in the meantime we'd like to get this driver upstream. We want to get the driver accepted in distributions so that users do not have to deal with an out-of-tree module and many distributions have "upstream first" requirement. The driver has been shipping for a number of years and users running on VMware platform will have it installed as part of VMware Tools even if it will not come from a distribution, thus there should not be additional risk in pulling the driver into mainline. The driver will only activate if host is VMware so everyone else should not be affected at all. Signed-off-by: Dmitry Torokhov <[email protected]> Cc: Avi Kivity <[email protected]> Cc: Jeremy Fitzhardinge <[email protected]> Cc: Ingo Molnar <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2010-04-23x86: Disable large pages on CPUs with Atom erratum AAE44H. Peter Anvin1-0/+21
Atom erratum AAE44/AAF40/AAG38/AAH41: "If software clears the PS (page size) bit in a present PDE (page directory entry), that will cause linear addresses mapped through this PDE to use 4-KByte pages instead of using a large page after old TLB entries are invalidated. Due to this erratum, if a code fetch uses this PDE before the TLB entry for the large page is invalidated then it may fetch from a different physical address than specified by either the old large page translation or the new 4-KByte page translation. This erratum may also cause speculative code fetches from incorrect addresses." [http://download.intel.com/design/processor/specupdt/319536.pdf] Where as commit 211b3d03c7400f48a781977a50104c9d12f4e229 seems to workaround errata AAH41 (mixed 4K TLBs) it reduces the window of opportunity for the bug to occur and does not totally remove it. This patch disables mixed 4K/4MB page tables totally avoiding the page splitting and not tripping this processor issue. This is based on an original patch by Colin King. Originally-by: Colin Ian King <[email protected]> Cc: Colin Ian King <[email protected]> Cc: Ingo Molnar <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]> LKML-Reference: <[email protected]> Cc: <[email protected]>
2010-04-23x86-64: Clear a 64-bit FS/GS base on fork if selector is nonzeroH. Peter Anvin1-2/+2
When we do a thread switch, we clear the outgoing FS/GS base if the corresponding selector is nonzero. This is taken by __switch_to() as an entry invariant; it does not verify that it is true on entry. However, copy_thread() doesn't enforce this constraint, which can result in inconsistent results after fork(). Make copy_thread() match the behavior of __switch_to(). Reported-and-tested-by: Samuel Thibault <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]> LKML-Reference: <[email protected]> Cc: <[email protected]>
2010-04-23x86, pat: Update the page flags for memtype atomically instead of using ↵Robin Holt2-27/+25
memtype_lock While testing an application using the xpmem (out of kernel) driver, we noticed a significant page fault rate reduction of x86_64 with respect to ia64. For one test running with 32 cpus, one thread per cpu, it took 01:08 for each of the threads to vm_insert_pfn 2GB worth of pages. For the same test running on 256 cpus, one thread per cpu, it took 14:48 to vm_insert_pfn 2 GB worth of pages. The slowdown was tracked to lookup_memtype which acquires the spinlock memtype_lock. This heavily contended lock was slowing down vm_insert_pfn(). With the cmpxchg on page->flags method, both the 32 cpu and 256 cpu cases take approx 00:01.3 seconds to complete. Signed-off-by: Robin Holt <[email protected]> LKML-Reference: <[email protected]> Cc: Venkatesh Pallipadi <[email protected]> Cc: Rafael Wysocki <[email protected]> Reviewed-by: Suresh Siddha <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-04-23Merge branch 'linus' into perf/coreIngo Molnar15-124/+181
Merge reason: merge the latest fixes, update to latest -rc. Signed-off-by: Ingo Molnar <[email protected]>
2010-04-22x86, cacheinfo: Disable index in all four subcachesBorislav Petkov1-17/+43
When disabling an L3 cache index, make sure we disable that index in all four subcaches of the L3. Clarify nomenclature while at it, wrt to disable slots versus disable index and rename accordingly. Signed-off-by: Borislav Petkov <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-04-22x86, cacheinfo: Make L3 cache info per nodeBorislav Petkov1-14/+45
Currently, we're allocating L3 cache info and calculating indices for each online cpu which is clearly superfluous. Instead, we need to do this per-node as is each L3 cache. No functional change, only per-cpu memory savings. -v2: Allocate L3 cache descriptors array dynamically. Signed-off-by: Borislav Petkov <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-04-22x86, cacheinfo: Reorganize AMD L3 cache structureBorislav Petkov1-21/+32
Add a struct representing L3 cache attributes (subcache sizes and indices count) and move the respective members out of _cpuid4_info. Also, stash the struct pci_dev ptr into the struct simplifying the code even more. There should be no functionality change resulting from this patch except slightly slimming the _cpuid4_info per-cpu vars. Signed-off-by: Borislav Petkov <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-04-22x86, cacheinfo: Turn off L3 cache index disable feature in virtualized ↵Frank Arnold1-0/+4
environments When running a quest kernel on xen we get: BUG: unable to handle kernel NULL pointer dereference at 0000000000000038 IP: [<ffffffff8142f2fb>] cpuid4_cache_lookup_regs+0x2ca/0x3df PGD 0 Oops: 0000 [#1] SMP last sysfs file: CPU 0 Modules linked in: Pid: 0, comm: swapper Tainted: G W 2.6.34-rc3 #1 /HVM domU RIP: 0010:[<ffffffff8142f2fb>] [<ffffffff8142f2fb>] cpuid4_cache_lookup_regs+0x 2ca/0x3df RSP: 0018:ffff880002203e08 EFLAGS: 00010046 RAX: 0000000000000000 RBX: 0000000000000003 RCX: 0000000000000060 RDX: 0000000000000000 RSI: 0000000000000040 RDI: 0000000000000000 RBP: ffff880002203ed8 R08: 00000000000017c0 R09: ffff880002203e38 R10: ffff8800023d5d40 R11: ffffffff81a01e28 R12: ffff880187e6f5c0 R13: ffff880002203e34 R14: ffff880002203e58 R15: ffff880002203e68 FS: 0000000000000000(0000) GS:ffff880002200000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 0000000000000038 CR3: 0000000001a3c000 CR4: 00000000000006f0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 Process swapper (pid: 0, threadinfo ffffffff81a00000, task ffffffff81a44020) Stack: ffffffff810d7ecb ffff880002203e20 ffffffff81059140 ffff880002203e30 <0> ffffffff810d7ec9 0000000002203e40 000000000050d140 ffff880002203e70 <0> 0000000002008140 0000000000000086 ffff880040020140 ffffffff81068b8b Call Trace: <IRQ> [<ffffffff810d7ecb>] ? sync_supers_timer_fn+0x0/0x1c [<ffffffff81059140>] ? mod_timer+0x23/0x25 [<ffffffff810d7ec9>] ? arm_supers_timer+0x34/0x36 [<ffffffff81068b8b>] ? hrtimer_get_next_event+0xa7/0xc3 [<ffffffff81058e85>] ? get_next_timer_interrupt+0x19a/0x20d [<ffffffff8142fa23>] get_cpu_leaves+0x5c/0x232 [<ffffffff8106a7b1>] ? sched_clock_local+0x1c/0x82 [<ffffffff8106a9a0>] ? sched_clock_tick+0x75/0x7a [<ffffffff8107748c>] generic_smp_call_function_single_interrupt+0xae/0xd0 [<ffffffff8101f6ef>] smp_call_function_single_interrupt+0x18/0x27 [<ffffffff8100a773>] call_function_single_interrupt+0x13/0x20 <EOI> [<ffffffff8143c468>] ? notifier_call_chain+0x14/0x63 [<ffffffff810295c6>] ? native_safe_halt+0xc/0xd [<ffffffff810114eb>] ? default_idle+0x36/0x53 [<ffffffff81008c22>] cpu_idle+0xaa/0xe4 [<ffffffff81423a9a>] rest_init+0x7e/0x80 [<ffffffff81b10dd2>] start_kernel+0x40e/0x419 [<ffffffff81b102c8>] x86_64_start_reservations+0xb3/0xb7 [<ffffffff81b103c4>] x86_64_start_kernel+0xf8/0x107 Code: 14 d5 40 ff ae 81 8b 14 02 31 c0 3b 15 47 1c 8b 00 7d 0e 48 8b 05 36 1c 8b 00 48 63 d2 48 8b 04 d0 c7 85 5c ff ff ff 00 00 00 00 <8b> 70 38 48 8d 8d 5c ff ff ff 48 8b 78 10 ba c4 01 00 00 e8 eb RIP [<ffffffff8142f2fb>] cpuid4_cache_lookup_regs+0x2ca/0x3df RSP <ffff880002203e08> CR2: 0000000000000038 ---[ end trace a7919e7f17c0a726 ]--- The L3 cache index disable feature of AMD CPUs has to be disabled if the kernel is running as guest on top of a hypervisor because northbridge devices are not available to the guest. Currently, this fixes a boot crash on top of Xen. In the future this will become an issue on KVM as well. Check if northbridge devices are present and do not enable the feature if there are none. Signed-off-by: Frank Arnold <[email protected]> LKML-Reference: <[email protected]> Acked-by: Borislav Petkov <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-04-22x86, cacheinfo: Unify AMD L3 cache index disable checkingBorislav Petkov1-7/+10
All F10h CPUs starting with model 8 resp. 9, stepping 1, support L3 cache index disable. Concentrate the family, model, stepping checking at one place and enable the feature implicitly on upcoming Fam10h models. Signed-off-by: Borislav Petkov <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-04-23Merge branch 'master' into for-nextJiri Kosina120-574/+838
2010-04-22x86/PCI: parse additional host bridge window resource typesBjorn Helgaas1-6/+37
This adds support for Memory24, Memory32, and Memory32Fixed descriptors in PCI host bridge _CRS. I experimentally determined that Windows (2008 R2) accepts these descriptors and treats them as windows that are forwarded to the PCI bus, e.g., if it finds any PCI devices with BARs outside the windows, it moves them into the windows. I don't know whether any machines actually use these descriptors in PCI host bridge _CRS methods, but if any exist and they're new enough that we automatically turn on "pci=use_crs", they will work with Windows but not with Linux. Here are the details: https://bugzilla.kernel.org/show_bug.cgi?id=15817 Signed-off-by: Bjorn Helgaas <[email protected]> Signed-off-by: Jesse Barnes <[email protected]>
2010-04-21Merge branch 'kvm-updates/2.6.34' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds4-55/+53
* 'kvm-updates/2.6.34' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: x86: Fix TSS size check for 16-bit tasks KVM: Add missing srcu_read_lock() for kvm_mmu_notifier_release() KVM: Increase NR_IOBUS_DEVS limit to 200 KVM: fix the handling of dirty bitmaps to avoid overflows KVM: MMU: fix kvm_mmu_zap_page() and its calling path KVM: VMX: Save/restore rflags.vm correctly in real mode KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL KVM: Don't spam kernel log when injecting exceptions due to bad cr writes KVM: SVM: Fix memory leaks that happen when svm_create_vcpu() fails KVM: take srcu lock before call to complete_pio()
2010-04-21KVM: x86: Fix TSS size check for 16-bit tasksJan Kiszka1-1/+5
A 16-bit TSS is only 44 bytes long. So make sure to test for the correct size on task switch. Signed-off-by: Jan Kiszka <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-20x86, mrst: Conditionally register cpu hotplug notifier for apbtJacob Pan1-1/+1
APB timer is used on Moorestown platforms but not on a standard PC. If APB timer code is compiled in but not initialized at run-time due to lack of FW reported SFI table, kernel would panic when the non-boot CPUs are offlined and notifier is called. https://bugzilla.kernel.org/show_bug.cgi?id=15786 This patch ensures CPU hotplug notifier for APB timer is only registered when the APBT timer block is initialized. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-04-20Merge branch 'perf-fixes-for-linus' of ↵Linus Torvalds1-2/+6
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf: Fix unsafe frame rewinding with hot regs fetching
2010-04-20x86: correctly wire up the newuname system callChristoph Hellwig1-1/+1
Before commit e28cbf22933d0c0ccaf3c4c27a1a263b41f73859 ("improve sys_newuname() for compat architectures") 64-bit x86 had a private implementation of sys_uname which was just called sys_uname, which other architectures used for the old uname. Due to some merge issues with the uname refactoring patches we ended up calling the old uname version for both the old and new system call slots, which lead to the domainname filed never be set which caused failures with libnss_nis. Reported-and-tested-by: Andy Isaacson <[email protected]> Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2010-04-20ACPI: add boot option acpi=copy_dsdt to fix corrupt DSDTLin Ming1-0/+4
Some BIOS on Toshiba machines corrupt the DSDT, so add a new boot option acpi=copy_dsdt to workaround it. Add warning message to ask users to use this option if corrupt DSDT detected. Also build a DMI blacklist to check it and automatically copy DSDT. https://bugzilla.kernel.org/show_bug.cgi?id=14679 Signed-off-by: Lin Ming <[email protected]> Signed-off-by: Len Brown <[email protected]>
2010-04-20Fix comment typo in percpu.hJustin P. Mattock1-1/+1
Fix a typo in arch/x86/include/asm/percpu.h Signed-off-by: Justin P. Mattock <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2010-04-20KVM: fix the handling of dirty bitmaps to avoid overflowsTakuya Yoshikawa1-2/+3
Int is not long enough to store the size of a dirty bitmap. This patch fixes this problem with the introduction of a wrapper function to calculate the sizes of dirty bitmaps. Note: in mark_page_dirty(), we have to consider the fact that __set_bit() takes the offset as int, not long. Signed-off-by: Takuya Yoshikawa <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2010-04-20KVM: MMU: fix kvm_mmu_zap_page() and its calling pathXiao Guangrong1-4/+7
This patch fix: - calculate zapped page number properly in mmu_zap_unsync_children() - calculate freeed page number properly kvm_mmu_change_mmu_pages() - if zapped children page it shoud restart hlist walking KVM-Stable-Tag. Signed-off-by: Xiao Guangrong <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2010-04-20KVM: VMX: Save/restore rflags.vm correctly in real modeAvi Kivity1-9/+15
Currently we set eflags.vm unconditionally when entering real mode emulation through virtual-8086 mode, and clear it unconditionally when we enter protected mode. The means that the following sequence KVM_SET_REGS (rflags.vm=1) KVM_SET_SREGS (cr0.pe=1) Ends up with rflags.vm clear due to KVM_SET_SREGS triggering enter_pmode(). Fix by shadowing rflags.vm (and rflags.iopl) correctly while in real mode: reads and writes to those bits access a shadow register instead of the actual register. Signed-off-by: Avi Kivity <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2010-04-20KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTLAndre Przywara1-2/+6
There is a quirk for AMD K8 CPUs in many Linux kernels (see arch/x86/kernel/cpu/mcheck/mce.c:__mcheck_cpu_apply_quirks()) that clears bit 10 in that MCE related MSR. KVM can only cope with all zeros or all ones, so it will inject a #GP into the guest, which will let it panic. So lets add a quirk to the quirk and ignore this single cleared bit. This fixes -cpu kvm64 on all machines and -cpu host on K8 machines with some guest Linux kernels. Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-20KVM: Don't spam kernel log when injecting exceptions due to bad cr writesAvi Kivity1-27/+0
These are guest-triggerable. Signed-off-by: Avi Kivity <[email protected]>
2010-04-20KVM: SVM: Fix memory leaks that happen when svm_create_vcpu() failsTakuya Yoshikawa1-10/+15
svm_create_vcpu() does not free the pages allocated during the creation when it fails to complete the allocations. This patch fixes it. Signed-off-by: Takuya Yoshikawa <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-04-20KVM: take srcu lock before call to complete_pio()Gleb Natapov1-0/+2
complete_pio() may use slot table which is protected by srcu. Signed-off-by: Gleb Natapov <[email protected]> Cc: [email protected] Signed-off-by: Avi Kivity <[email protected]>
2010-04-20perf & kvm: Clean up some of the guest profiling callback API detailsZhang, Yanmin2-6/+18
Fix some build bug and programming style issues: - use valid C - fix up various style details Signed-off-by: Zhang Yanmin <[email protected]> Cc: Avi Kivity <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Sheng Yang <[email protected]> Cc: Marcelo Tosatti <[email protected]> Cc: oerg Roedel <[email protected]> Cc: Jes Sorensen <[email protected]> Cc: Gleb Natapov <[email protected]> Cc: Zachary Amsden <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Arnaldo Carvalho de Melo <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2010-04-20Merge branch 'drm-ttm-pool' into drm-core-nextDave Airlie2-8/+47
* drm-ttm-pool: drm/ttm: using kmalloc/kfree requires including slab.h drm/ttm: include linux/seq_file.h for seq_printf drm/ttm: Add sysfs interface to control pool allocator. drm/ttm: Use set_pages_array_wc instead of set_memory_wc. arch/x86: Add array variants for setting memory to wc caching. drm/nouveau: Add ttm page pool debugfs file. drm/radeon/kms: Add ttm page pool debugfs file. drm/ttm: Add debugfs output entry to pool allocator. drm/ttm: add pool wc/uc page allocator V3
2010-04-19KVM: Implement perf callbacks for guest samplingZhang, Yanmin3-1/+53
Below patch implements the perf_guest_info_callbacks on kvm. Signed-off-by: Zhang Yanmin <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
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