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2010-02-23x86, mrst: Fill in PCI functions in x86_init layerJacob Pan1-0/+3
This patch added Moorestown platform specific PCI init functions. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D0A@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-23x86, mrst: Add dummy legacy pic to platform setupJacob Pan1-0/+5
Moorestown has no legacy PIC; point it to the null legacy PIC. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D09@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-23x86, ioapic: Early enable ioapic for timer irqJacob Pan1-0/+21
Moorestown platform needs apic ready early for the system timer irq which is delievered via ioapic. Should not impact other platforms. In the longer term, once ioapic setup is moved before late time init, we will not need this patch to do early apic enabling. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D07@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-23x86, pic: Fix section mismatch in legacy picJacob Pan1-3/+3
Move legacy_pic chip dummy functions out of init section as they might be referenced at run time. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318D3AA@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-23x86, ptrace: Remove set_stopped_child_used_math() in [x]fpregs_setSuresh Siddha1-4/+0
init_fpu() already ensures that the used_math() is set for the stopped child. Remove the redundant set_stopped_child_used_math() in [x]fpregs_set() Reported-by: Oleg Nesterov <[email protected]> Signed-off-by: Suresh Siddha <[email protected]> LKML-Reference: <[email protected]> Acked-by: Rolan McGrath <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-23x86, ptrace: Simplify xstateregs_get()Suresh Siddha1-23/+7
48 bytes (bytes 464..511) of the xstateregs payload come from the kernel defined structure (xstate_fx_sw_bytes). Rest comes from the xstate regs structure in the thread struct. Instead of having multiple user_regset_copyout()'s, simplify the xstateregs_get() by first copying the SW bytes into the xstate regs structure in the thread structure and then using one user_regset_copyout() to copyout the xstateregs. Requested-by: Roland McGrath <[email protected]> Signed-off-by: Suresh Siddha <[email protected]> LKML-Reference: <[email protected]> Acked-by: Roland McGrath <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]> Cc: Oleg Nesterov <[email protected]>
2010-02-22Merge remote branch 'origin/x86/apic' into x86/mrstH. Peter Anvin10-146/+200
Conflicts: arch/x86/kernel/apic/io_apic.c
2010-02-22Merge branch 'x86/irq' into x86/apicH. Peter Anvin35-980/+487
Merge reason: Conflicts in arch/x86/kernel/apic/io_apic.c Resolved Conflicts: arch/x86/kernel/apic/io_apic.c Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-22Merge branch 'perf-fixes-for-linus' of ↵Linus Torvalds2-25/+12
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf probe: Init struct probe_point and set counter correctly hw-breakpoint: Keep track of dr7 local enable bits hw-breakpoints: Accept breakpoints on NULL address perf_events: Fix FORK events
2010-02-20Merge branch 'x86/urgent' into x86/irqH. Peter Anvin8-38/+95
Merge reason: conflict in arch/x86/kernel/apic/io_apic.c Resolved Conflicts: arch/x86/kernel/apic/io_apic.c Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19x86, apic: Remove ioapic_disable_legacy()Jacob Pan1-5/+5
The ioapic_disable_legacy() call is no longer needed for platforms do not have legacy pic. the legacy pic abstraction has taken care it automatically. This patch also initialize irq-related static variables based on information obtained from legacy_pic. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A30A7660@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19x86, pic: Make use of legacy_pic abstractionJacob Pan7-50/+59
This patch replaces legacy PIC-related global variable and functions with the new legacy_pic abstraction. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D04@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19x86, pic: Introduce legacy_pic abstractionJacob Pan1-0/+43
This patch makes i8259A like legacy programmable interrupt controller code into a driver so that legacy pic functions can be selected at runtime based on platform information, such as HW subarchitecure ID. Default structure of legacy_pic maintains the current code path for x86pc. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D03@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19x86: Initialize stack canary in secondary startJacob Pan1-0/+4
Some secondary clockevent setup code needs to call request_irq, which will cause fake stack check failure in schedule() if voluntary preemption model is chosen. It is safe to have stack canary initialized here early, since start_secondary() does not return. Signed-off-by: Jacob Pan <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D02@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19x86, ioapic: Improve handling of i8259A irq initAlek Du1-19/+4
Since we already track the number of legacy vectors by nr_legacy_irqs, we can avoid use static vector allocations -- we can use dynamic one. Signed-off-by: Alek Du <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D01@orsmsx508.amr.corp.intel.com> Signed-off-by: Jacob Pan <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19x86: Add pcibios_fixup_irqs to x86_initThomas Gleixner1-0/+2
Platforms like Moorestown want to override the pcibios_fixup_irqs default function. Add it to x86_init.pci. Signed-off-by: Thomas Gleixner <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D00@orsmsx508.amr.corp.intel.com> Acked-by: Jesse Barnes <[email protected]> Signed-off-by: Jacob Pan <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19x86: Add pci_init_irq to x86_initThomas Gleixner2-0/+2
Moorestown wants to reuse pcibios_init_irq but needs to provide its own implementation of pci_enable_irq. After we distangled the init we can move the init_irq call to x86_init and remove the pci_enable_irq != NULL check in pcibios_init_irq. pci_enable_irq is compile time initialized to pirq_enable_irq and the special cases which override it (visws and acpi) set the x86_init function pointer to noop. That allows MSRT to override pci_enable_irq and otherwise run pcibios_init_irq unmodified. Signed-off-by: Thomas Gleixner <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFF@orsmsx508.amr.corp.intel.com> Acked-by: Jesse Barnes <[email protected]> Signed-off-by: Jacob Pan <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19x86: Move pci init function to x86_initThomas Gleixner4-5/+11
The PCI initialization in pci_subsys_init() is a mess. pci_numaq_init, pci_acpi_init, pci_visws_init and pci_legacy_init are called and each implementation checks and eventually modifies the global variable pcibios_scanned. x86_init functions allow us to do this more elegant. The pci.init function pointer is preset to pci_legacy_init. numaq, acpi and visws can modify the pointer in their early setup functions. The functions return 0 when they did the full initialization including bus scan. A non zero return value indicates that pci_legacy_init needs to be called either because the selected function failed or wants the generic bus scan in pci_legacy_init to happen (e.g. visws). Signed-off-by: Thomas Gleixner <[email protected]> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFE@orsmsx508.amr.corp.intel.com> Acked-by: Jesse Barnes <[email protected]> Signed-off-by: Jacob Pan <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-19hw-breakpoint: Keep track of dr7 local enable bitsFrederic Weisbecker1-2/+5
When the user enables breakpoints through dr7, he can choose between "local" or "global" enable bits but given how linux is implemented, both have the same effect. That said we don't keep track how the user enabled the breakpoints so when the user requests the dr7 value, we only translate the "enabled" status using the global enabled bits. It means that if the user enabled a breakpoint using the local enabled bit, reading back dr7 will set the global bit and clear the local one. Apps like Wine expect a full dr7 POKEUSER/PEEKUSER match for emulated softwares that implement old reverse engineering protection schemes. We fix that by keeping track of the whole dr7 value given by the user in the thread structure to drop this bug. We'll think about something more proper later. This fixes a 2.6.32 - 2.6.33-x ptrace regression. Reported-and-tested-by: Michael Stefaniuc <[email protected]> Signed-off-by: Frederic Weisbecker <[email protected]> Acked-by: K.Prasad <[email protected]> Cc: Alan Stern <[email protected]> Cc: Maneesh Soni <[email protected]> Cc: Alexandre Julliard <[email protected]> Cc: Rafael J. Wysocki <[email protected]> Cc: Maciej Rutecki <[email protected]>
2010-02-19hw-breakpoints: Accept breakpoints on NULL addressFrederic Weisbecker1-23/+7
Before we had a generic breakpoint API, ptrace was accepting breakpoints on NULL address in x86. The new API refuse them, without given strong reasons. We need to follow the previous behaviour as some userspace apps like Wine need such NULL breakpoints to ensure old emulated software protections are still working. This fixes a 2.6.32 - 2.6.33-x ptrace regression. Reported-and-tested-by: Michael Stefaniuc <[email protected]> Signed-off-by: Frederic Weisbecker <[email protected]> Acked-by: K.Prasad <[email protected]> Acked-by: Roland McGrath <[email protected]> Cc: Alan Stern <[email protected]> Cc: Maneesh Soni <[email protected]> Cc: Alexandre Julliard <[email protected]> Cc: Rafael J. Wysocki <[email protected]> Cc: Maciej Rutecki <[email protected]>
2010-02-18x86, cacheinfo: Enable L3 CID only on AMDBorislav Petkov1-88/+98
Final stage linking can fail with arch/x86/built-in.o: In function `store_cache_disable': intel_cacheinfo.c:(.text+0xc509): undefined reference to `amd_get_nb_id' arch/x86/built-in.o: In function `show_cache_disable': intel_cacheinfo.c:(.text+0xc7d3): undefined reference to `amd_get_nb_id' when CONFIG_CPU_SUP_AMD is not enabled because the amd_get_nb_id helper is defined in AMD-specific code but also used in generic code (intel_cacheinfo.c). Reorganize the L3 cache index disable code under CONFIG_CPU_SUP_AMD since it is AMD-only anyway. Signed-off-by: Borislav Petkov <[email protected]> LKML-Reference: <20100218184210.GF20473@aftab> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-18x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1Borislav Petkov1-3/+3
The show/store_cache_disable routines depend unnecessarily on NUMA's cpu_to_node and the disabling of cache indices broke when !CONFIG_NUMA. Remove that dependency by using a helper which is always correct. While at it, enable L3 Cache Index disable on rev D1 Istanbuls which sport the feature too. Signed-off-by: Borislav Petkov <[email protected]> LKML-Reference: <20100218184339.GG20473@aftab> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-18x86, irq: Keep chip_data in create_irq_nr and destroy_irqBrandon Philips1-15/+5
Version 4: use get_irq_chip_data() in destroy_irq() to get rid of some local vars. When two drivers are setting up MSI-X at the same time via pci_enable_msix() there is a race. See this dmesg excerpt: [ 85.170610] ixgbe 0000:02:00.1: irq 97 for MSI/MSI-X [ 85.170611] alloc irq_desc for 99 on node -1 [ 85.170613] igb 0000:08:00.1: irq 98 for MSI/MSI-X [ 85.170614] alloc kstat_irqs on node -1 [ 85.170616] alloc irq_2_iommu on node -1 [ 85.170617] alloc irq_desc for 100 on node -1 [ 85.170619] alloc kstat_irqs on node -1 [ 85.170621] alloc irq_2_iommu on node -1 [ 85.170625] ixgbe 0000:02:00.1: irq 99 for MSI/MSI-X [ 85.170626] alloc irq_desc for 101 on node -1 [ 85.170628] igb 0000:08:00.1: irq 100 for MSI/MSI-X [ 85.170630] alloc kstat_irqs on node -1 [ 85.170631] alloc irq_2_iommu on node -1 [ 85.170635] alloc irq_desc for 102 on node -1 [ 85.170636] alloc kstat_irqs on node -1 [ 85.170639] alloc irq_2_iommu on node -1 [ 85.170646] BUG: unable to handle kernel NULL pointer dereference at 0000000000000088 As you can see igb and ixgbe are both alternating on create_irq_nr() via pci_enable_msix() in their probe function. ixgbe: While looping through irq_desc_ptrs[] via create_irq_nr() ixgbe choses irq_desc_ptrs[102] and exits the loop, drops vector_lock and calls dynamic_irq_init. Then it sets irq_desc_ptrs[102]->chip_data = NULL via dynamic_irq_init(). igb: Grabs the vector_lock now and starts looping over irq_desc_ptrs[] via create_irq_nr(). It gets to irq_desc_ptrs[102] and does this: cfg_new = irq_desc_ptrs[102]->chip_data; if (cfg_new->vector != 0) continue; This hits the NULL deref. Another possible race exists via pci_disable_msix() in a driver or in the number of error paths that call free_msi_irqs(): destroy_irq() dynamic_irq_cleanup() which sets desc->chip_data = NULL ...race window... desc->chip_data = cfg; Remove the save and restore code for cfg in create_irq_nr() and destroy_irq() and take the desc->lock when checking the irq_cfg. Reported-and-analyzed-by: Brandon Philips <[email protected]> Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Brandon Phiilps <[email protected]> Cc: [email protected] Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-18Merge branches 'bugzilla-14886', 'bugzilla-15000', 'bugzilla-15040', ↵Len Brown1-8/+0
'bugzilla-15108', 'pdc', 'hotplug-null-ref' and 'thinkpad' into release
2010-02-17smp: Use nr_cpus= to set nr_cpu_ids earlyYinghai Lu1-3/+4
On x86, before prefill_possible_map(), nr_cpu_ids will be NR_CPUS aka CONFIG_NR_CPUS. Add nr_cpus= to set nr_cpu_ids. so we can simulate cpus <=8 are installed on normal config. -v2: accordging to Christoph, acpi_numa_init should use nr_cpu_ids in stead of NR_CPUS. -v3: add doc in kernel-parameters.txt according to Andrew. Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Acked-by: Linus Torvalds <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]> Cc: Tony Luck <[email protected]>
2010-02-17x86, irq: Remove arch_probe_nr_irqsYinghai Lu1-22/+0
So keep nr_irqs == NR_IRQS. With radix trees is matters less. Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-17Merge branch 'linus' into x86/mmThomas Gleixner128-4223/+4542
x86/mm is on 32-rc4 and missing the spinlock namespace changes which are needed for further commits into this topic. Signed-off-by: Thomas Gleixner <[email protected]>
2010-02-17tracing: Unify arch_syscall_addr() implementationsMike Frysinger1-10/+0
Most implementations of arch_syscall_addr() are the same, so create a default version in common code and move the one piece that differs (the syscall table) to asm/syscall.h. New arch ports don't have to waste time copying & pasting this simple function. The s390/sparc versions need to be different, so document why. Signed-off-by: Mike Frysinger <[email protected]> Acked-by: David S. Miller <[email protected]> Acked-by: Paul Mundt <[email protected]> Acked-by: Heiko Carstens <[email protected]> Cc: Steven Rostedt <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Frederic Weisbecker <[email protected]>
2010-02-17x86: Add iMac9,1 to pci_reboot_dmi_tableJustin P. Mattock1-0/+8
On the iMac9,1 /sbin/reboot results in a black mangled screen. Adding this DMI entry gets the machine to reboot cleanly as it should. Signed-off-by: Justin P. Mattock <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]> Cc: <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2010-02-16core: Move early_res from arch/x86 to kernel/Yinghai Lu3-523/+10
This makes the range reservation feature available to other architectures. -v2: add get_max_mapped, max_pfn_mapped only defined in x86... to fix PPC compiling -v3: according to hpa, add CONFIG_HAVE_EARLY_RES -v4: fix typo about EARLY_RES in config Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-16x86/gart: Unexport gart_iommu_apertureFUJITA Tomonori1-1/+0
I wrongly exported gart_iommu_aperture in the commit 42590a75019a50012f25a962246498dead428433. It's not necessary so let's unexport it. Signed-off-by: FUJITA Tomonori <[email protected]> Cc: Joerg Roedel <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2010-02-16x86: Convert i8259_lock to raw_spinlockThomas Gleixner4-22/+22
Signed-off-by: Thomas Gleixner <[email protected]>
2010-02-16x86: Convert nmi_lock to raw_spinlockThomas Gleixner1-3/+3
nmi_lock must be a spinning spinlock in -rt. Signed-off-by: Thomas Gleixner <[email protected]>
2010-02-16x86: Convert set_atomicity_lock to raw_spinlockThomas Gleixner1-3/+3
Signed-off-by: Thomas Gleixner <[email protected]>
2010-02-16x86: set_personality_ia32() misses force_personality32Oleg Nesterov1-0/+1
05d43ed8a "x86: get rid of the insane TIF_ABI_PENDING bit" forgot about force_personality32. Fix. Signed-off-by: Oleg Nesterov <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2010-02-16x86: Convert ioapic_lock and vector_lock to raw_spinlockThomas Gleixner1-53/+53
Signed-off-by: Thomas Gleixner <[email protected]>
2010-02-16ACPI: remove Asus P2B-DS from acpi=ht blacklistLen Brown1-8/+0
We realized when we broke acpi=ht http://bugzilla.kernel.org/show_bug.cgi?id=14886 that acpi=ht is not needed on this box and folks have been using acpi=force on it anyway. Signed-off-by: Len Brown <[email protected]>
2010-02-15x86, mtrr: Kill over the top warnAlan Cox1-1/+1
Fixes bugzilla: http://bugzilla.kernel.org/show_bug.cgi?id=12558 Fixes bugzilla: http://bugzilla.kernel.org/show_bug.cgi?id=12317 (and if this really needed to be a warn you'd be responding to the bugs left in bugzilla from it...) Signed-off-by: Alan Cox <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-13x86, cpu: Print AMD virtualization features in /proc/cpuinfoJoerg Roedel1-0/+4
This patch adds code to cpu initialization path to detect the extended virtualization features of AMD cpus to show them in /proc/cpuinfo. Signed-off-by: Joerg Roedel <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-12x86: Add find_fw_memmap_areaYinghai Lu2-6/+15
... so we can move early_res up. Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-12x86: Make 32bit support NO_BOOTMEMYinghai Lu1-0/+3
Let's make 32bit consistent with 64bit. -v2: Andrew pointed out for 32bit that we should use -1ULL Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-12early_res: Enhance check_and_double_early_resYinghai Lu1-7/+20
... to make it always try to start from low at first. This makes it less likely for early_memtest to reserve a bad range, in particular it puts new early_res in a range that is already tested. Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-12x86: Move back find_e820_area to e820.cYinghai Lu2-57/+53
Makes early_res.c more clean, so later could move it to /kernel. Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-12x86: Add find_early_area_sizeYinghai Lu1-13/+32
Prepare to move bck find_e820_area_size back to e820.c. Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-12x86: Separate early_res related code from e820.cYinghai Lu3-541/+540
... to make e820.c smaller. -v2: fix 32bit compiling with MAX_DMA32_PFN Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-12x86: Move bios page reserve early to head32/64.cYinghai Lu2-20/+12
So prepare to make one more clean of early_res.c. -v2: don't need to reserve first page in early_res because we already mark that in e820 as reserved already. Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-12x86: Make 64 bit use early_res instead of bootmem before slabYinghai Lu2-13/+148
Finally we can use early_res to replace bootmem for x86_64 now. Still can use CONFIG_NO_BOOTMEM to enable it or not. -v2: fix 32bit compiling about MAX_DMA32_PFN -v3: folded bug fix from LKML message below Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-11x86, ptrace: regset extensions to support xstateSuresh Siddha3-2/+116
Add the xstate regset support which helps extend the kernel ptrace and the core-dump interfaces to support AVX state etc. This regset interface is designed to support all the future state that gets supported using xsave/xrstor infrastructure. Looking at the memory layout saved by "xsave", one can't say which state is represented in the memory layout. This is because if a particular state is in init state, in the xsave hdr it can be represented by bit '0'. And hence we can't really say by the xsave header wether a state is in init state or the state is not saved in the memory layout. And hence the xsave memory layout available through this regset interface uses SW usable bytes [464..511] to convey what state is represented in the memory layout. First 8 bytes of the sw_usable_bytes[464..467] will be set to OS enabled xstate mask(which is same as the 64bit mask returned by the xgetbv's xCR0). The note NT_X86_XSTATE represents the extended state information in the core file, using the above mentioned memory layout. Signed-off-by: Suresh Siddha <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Hongjiu Lu <[email protected]> Cc: Roland McGrath <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
2010-02-11Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds6-34/+28
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, apic: Don't use logical-flat mode when CPU hotplug may exceed 8 CPUs x86-32: Make AT_VECTOR_SIZE_ARCH=2 x86/agp: Fix amd64-agp module initialization regression x86, doc: Fix minor spelling error in arch/x86/mm/gup.c
2010-02-10x86: Only call dma32_reserve_bootmem 64bit !CONFIG_NUMAYinghai Lu2-10/+10
64bit NUMA already make enough space under 4G with new early_node_mem. Signed-off-by: Yinghai Lu <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: H. Peter Anvin <[email protected]>
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