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2008-01-28sh: sh7712 clock supportAndrew Murray2-0/+72
This patch provides specific clock support for the SH7712. Signed-off-by: Andrew Murray <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Add support for SH7763 CPU subtype.Yoshihiro Shimoda4-0/+520
Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Add support for SH7721 CPU subtype.Yoshihiro Shimoda3-2/+13
Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Encode L1/L2 cache shape in auxvt.Paul Mundt1-1/+28
This adds in the L1I/L1D/L2 cache shape support to their respective entries in the ELF auxvt, based on the Alpha implementation. We use this on the userspace libc side for calculating a tightly packed SHMLBA amongst other things. Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Support denormalization on SH-4 FPU.Stuart Menefy3-181/+1227
Signed-off-by: Stuart Menefy <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Preparation for uncached jumps through PMB.Stuart Menefy2-6/+6
Presently most of the 29-bit physical parts do P1/P2 segmentation with a 1:1 cached/uncached mapping, jumping between the two to control the caching behaviour. This provides the basic infrastructure to maintain this behaviour on 32-bit physical parts that don't map P1/P2 at all, using a shiny new linker section and corresponding fixmap entry. Signed-off-by: Stuart Menefy <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: GUSA atomic rollback support.Stuart Menefy1-1/+23
This implements kernel-level atomic rollback built on top of gUSA, as an alternative non-IRQ based atomicity method. This is generally a faster method for platforms that are lacking the LL/SC pairs that SH-4A and later use, and is only supportable on legacy cores. Signed-off-by: Stuart Menefy <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: comment tidying for sh64->sh migration.Paul Mundt5-20/+17
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: syscall auditing for sh5, too.Paul Mundt1-4/+6
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: SH-2A FPU support.Paul Mundt5-16/+661
Signed-off-by: Kieran Bingham <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Add SH7263 CPU support.Paul Mundt3-2/+44
This adds support for the SH7263 (SH-2A) CPU. This particular CPU is a superset of SH7203, adding some additional peripheral blocks and hooking up additional (reserved on SH7203) vectors in the INTC block. No visibly nasty surprises, yet.. Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Add SH7203 CPU support.Paul Mundt4-6/+384
This adds support for the SH7203 (SH-2A) CPU. Signed-off-by: Kieran Bingham <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Bring the SH-5 FPU in line with the SH-4 FPU API.Paul Mundt1-9/+7
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Get the mach-cayman IRQ support building.Paul Mundt4-19/+258
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Switch SH-5 to use CONFIG_PAGE_OFFSET.Paul Mundt1-11/+11
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Stub in CPU subtype setup code for SH5-101/103.Paul Mundt2-0/+22
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Plug in simple SH-5 subtype probing.Paul Mundt2-2/+78
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Kill off do_NMI stub in SH-5 ex table.Paul Mundt1-1/+1
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Share bug/debug traps across _32 and _64.Paul Mundt1-1/+1
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Move over and enable FPU support for SH-5.Paul Mundt2-0/+171
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Move over sh64 switch_to and stack unwinder.Paul Mundt3-1/+527
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Move over the SH-5 entry.S.Paul Mundt3-0/+2107
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Disable initial cache flush on SH-5.Paul Mundt1-14/+18
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Don't reference UBC code in CPU init on sh64.Paul Mundt1-1/+6
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: imask IRQ depends on sh32.Paul Mundt1-1/+2
Signed-off-by: Paul Mundt <[email protected]>
2008-01-24Kobject: convert arch/* from kobject_unregister() to kobject_put()Greg Kroah-Hartman1-1/+1
There is no need for kobject_unregister() anymore, thanks to Kay's kobject cleanup changes, so replace all instances of it with kobject_put(). Cc: Kay Sievers <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2008-01-24Kobject: change arch/sh/kernel/cpu/sh4/sq.c to use kobject_init_and_addGreg Kroah-Hartman1-5/+6
Stop using kobject_register, as this way we can control the sending of the uevent properly, after everything is properly initialized. Cc: Kay Sievers <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2007-11-07sh: Kill off the remaining ST40 cruft.Paul Mundt1-8/+0
The ST40 stuff in-tree hasn't built for some time, and hasn't been updated for over 3 years. ST maintains their own out-of-tree changes and rebases occasionally, and that's ultimately where all of the ST40 users go anyways. In order for the ST40 code to be brought up to date most of the stuff removed in this changeset would have to be rewritten anyways, so there's very little benefit in keeping the remnants around either. Signed-off-by: Paul Mundt <[email protected]>
2007-11-07sh: Fix up kgdb-on-NMI branch target.Paul Mundt1-1/+1
This was all reworked some time ago, the old debug_enter was ripped out with everything going through a debug trap jump table instead. Kill off the debug_enter target and reference kgdb_handle_exception directly. Signed-off-by: Paul Mundt <[email protected]>
2007-10-31sh: Kill off dead ipr_irq_demux().Paul Mundt1-9/+0
Signed-off-by: Paul Mundt <[email protected]>
2007-10-30sh: Add resource of USBF for SH7722.Yoshihiro Shimoda1-0/+27
Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-28sh: clkfwk: Support multi-level clock propagation.Stuart Menefy1-0/+2
Currently clock propagation only works for one level, but we have some clocks which need to propagate multiple levels, so make this recursive. Signed-off-by: Stuart Menefy <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-27sh: Fix URAM start address on SH7785.Paul Mundt1-1/+1
Not all of the SH-X2 URAM blocks are mapped in the same place, SH7785 happens to map it on the opposite end of the address space from SH7722, correct the addresses. Signed-off-by: Paul Mundt <[email protected]>
2007-09-27sh: Use boot_cpu_data for CPU probe.Paul Mundt4-129/+126
This moves off of smp_processor_id() and only sets the probe information for the boot CPU directly. This will be copied out for the secondaries, so there's no reason to do this each time. This also allows for some header tidying. Signed-off-by: Paul Mundt <[email protected]>
2007-09-27sh: Fix plat_irq_setup_pins() for SH7785.Paul Mundt1-4/+0
There was some debug code left in here that caused the pin changes to never be hit. Kill that off, and all is well. Signed-off-by: Paul Mundt <[email protected]>
2007-09-27sh: Disable L2 reporting for present URAM only parts.Paul Mundt1-5/+2
The probing logic works for both URAM and L2, with no way to distinguish between the two. Disable the probing for now and let the CPU subtypes that have this in a real L2 configuration explicitly say so. Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: Initial SH-X3 SMP support.Paul Mundt2-1/+125
This adds basic support for SH-X3 SMP (4 CPUs). More IPI and cache debugging is necessary, mostly interfacing the d-cache coherency and the I-cache broadcast invalidates. Only for testing at present! Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: Hook up the SH-X3 SMP intc register groups.Magnus Damm1-1/+1
Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: Bring SMP support back from the dead.Paul Mundt1-5/+11
There was a very preliminary bunch of SMP code scattered around for the SH7604 microcontrollers from way back when, and it has mostly suffered bitrot since then. With the tree already having been slowly getting prepped for SMP, this plugs in most of the remaining platform-independent bits. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: intc - initial SMP support.Magnus Damm1-21/+57
This implements initial support for the SMP INTC (particularly INTC2) controllers. These are largely implemented as conventional blocks, with register sets grouped together at fixed strides relative to the CPU id. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: Wire up URAM node on SH7785.Paul Mundt1-0/+8
Add SH7785 URAM as node 1, follows the SH-X3 change. Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: INTC stubs for SH7343 and SH7770 builds.Paul Mundt2-0/+8
Get the SH7343 and SH7770 stuff linking again. Both of these still require proper INTC support. Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: intc - irl mode update for sh7780 and sh7785Magnus Damm2-4/+84
This patch contains the following fixes and improvements: - Fix address typo for INTMSK2 / INTMSKCLR2 registers on sh7780. - Adds IRQ_MODE_IRLnnnn_MASK using intc controller for IRL masking. - Good old IRQ_MODE_IRLnnnn should not register any intc controller. - plat_irq_setup_pins() now selects IRL or IRQ mode. - the holding function is now disabled using ICR0. By default all external pin interrupts are disabled. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: remove CONFIG_CPU_HAS_INTC_IRQMagnus Damm1-2/+1
All processor specific interrupt code is now converted to make use of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is because of that pointless. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: Kill off volatile silliness in sq_flush_range().Paul Mundt1-2/+2
CC arch/sh/kernel/cpu/sh4/sq.o arch/sh/kernel/cpu/sh4/sq.c: In function 'sq_flush_range': arch/sh/kernel/cpu/sh4/sq.c:65: warning: passing argument 1 of 'prefetch' discards qualifiers from pointer target type This didn't actually need to be volatile in the first place, so just kill off the qualifier entirely. Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: intc - add support for sh7206Magnus Damm1-51/+158
This patch converts the cpu specific interrupt setup code for sh7206 from ipr to intc. New vectors are also added to match the information provided by the datasheet. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: intc - add support for sh7619Magnus Damm1-37/+56
This patch converts the cpu specific interrupt setup code for sh7619 from ipr to intc. New vectors are also added to match the information provided by the datasheet. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: fix irqs for the second serial port on sh7206Magnus Damm1-4/+4
This patch makes sure the serial port interrupt irqs matches the datasheet. Only irqs for SCIF1 are changed. While at some cosmetic spaces are added. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: intc - primary priority masking fixesMagnus Damm1-5/+28
This patch contains various intc fixes for problems reported by Markus Brunner on the linuxsh-dev mailing list: http://marc.info/?l=linuxsh-dev&m=118701948224991&w=1 Apart from added comments, the fixes are: - add intc_set_priority() function prototype to hw_irq.h - fix off-by-one error in intc_set_priority() - make sure _INTC_WIDTH() is set for primary priority masking Big thanks to Markus for finding these problems. Version two fixes a compile error and an inverted primary check. Signed-off-by: Magnus Damm <[email protected]> Acked-by: Markus Brunner <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: intc - mark data structures as __initdataMagnus Damm9-71/+70
With the intc core improved it is now possible to put the intc data structures in the initdata section. Version two of this patch puts the __initdata inside DECLARE_INTC_DESC() and removes the __initdata included in the board specific r2d code. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
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