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2015-08-17powerpc: Add a vga alias node for P1022Jason Jin2-1/+3
In u-boot, when set the video as console, the name 'vga' is used as a general name for the video device, during the fdt_fixup_stdout process, the 'vga' name is used to search in the dtb to setup the 'linux,stdout-path' node. Though the P1022 DIU is not VGA-compatible device, to meet the 'vga' name used in u-boot, the vga alias node is added for P1022 in this patch. At the same time, a display alias is also added so that no other components grow dependencies on the vga alias node. Signed-off-by: Jason Jin <[email protected]> Signed-off-by: Wang Dongsheng <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-14Merge branches 'pci/hotplug', 'pci/iommu', 'pci/irq' and ↵Bjorn Helgaas1-5/+1
'pci/virtualization' into next * pci/hotplug: PCI: pciehp: Remove ignored MRL sensor interrupt events PCI: pciehp: Remove unused interrupt events PCI: pciehp: Handle invalid data when reading from non-existent devices PCI: Hold pci_slot_mutex while searching bus->slots list PCI: Protect pci_bus->slots with pci_slot_mutex, not pci_bus_sem PCI: pciehp: Simplify pcie_poll_cmd() PCI: Use "slot" and "pci_slot" for struct hotplug_slot and struct pci_slot * pci/iommu: PCI: Remove pci_ats_enabled() PCI: Stop caching ATS Invalidate Queue Depth PCI: Move ATS declarations to linux/pci.h so they're all together PCI: Clean up ATS error handling PCI: Use pci_physfn() rather than looking up physfn by hand PCI: Inline the ATS setup code into pci_ats_init() PCI: Rationalize pci_ats_queue_depth() error checking PCI: Reduce size of ATS structure elements PCI: Embed ATS info directly into struct pci_dev PCI: Allocate ATS struct during enumeration iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth * pci/irq: PCI: Kill off set_irq_flags() usage * pci/virtualization: PCI: Add ACS quirks for Intel I219-LM/V
2015-08-14powerpc/eeh: Probe after unbalanced kref checkDaniel Axtens1-3/+3
In the complete hotplug case, EEH PEs are supposed to be released and set to NULL. Normally, this is done by eeh_remove_device(), which is called from pcibios_release_device(). However, if something is holding a kref to the device, it will not be released, and the PE will remain. eeh_add_device_late() has a check for this which will explictly destroy the PE in this case. This check in eeh_add_device_late() occurs after a call to eeh_ops->probe(). On PowerNV, probe is a pointer to pnv_eeh_probe(), which will exit without probing if there is an existing PE. This means that on PowerNV, devices with outstanding krefs will not be rediscovered by EEH correctly after a complete hotplug. This is affecting CXL (CAPI) devices in the field. Put the probe after the kref check so that the PE is destroyed and affected devices are correctly rediscovered by EEH. Fixes: d91dafc02f42 ("powerpc/eeh: Delay probing EEH device during hotplug") Cc: [email protected] Cc: Gavin Shan <[email protected]> Signed-off-by: Daniel Axtens <[email protected]> Acked-by: Gavin Shan <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-14powerpc: Add an inline function to update POWER8 HID0Gautham R. Shenoy2-2/+11
Section 3.7 of Version 1.2 of the Power8 Processor User's Manual prescribes that updates to HID0 be preceded by a SYNC instruction and followed by an ISYNC instruction (Page 91). Create an inline function name update_power8_hid0() which follows this recipe and invoke it from the static split core path. Signed-off-by: Gautham R. Shenoy <[email protected]> Reviewed-by: Sam Bobroff <[email protected]> Tested-by: Sam Bobroff <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-12Merge branch 'locking/arch-atomic' into locking/core, because it's ready for ↵Ingo Molnar2-19/+7
upstream Signed-off-by: Ingo Molnar <[email protected]>
2015-08-12powerpc/prom: Use DRCONF flags while processing detected LMBsAnshuman Khandual1-3/+4
Replace hard coded values with existing DRCONF flags while procesing detected LMBs from the device tree. Does not change any functionality. Signed-off-by: Anshuman Khandual <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-12powerpc/xmon: Drop the valid variable completely in dump_segments()Anshuman Khandual1-4/+3
The value of 'valid' is always zero when 'esid' is zero, and if 'esid' is non-zero then the value of 'valid' is irrelevant because we are using logical or in the if expression. In fact 'valid' can be dropped completely from dump_segments() by simply doing the check with SLB_ESID_V directly in the if. Signed-off-by: Anshuman Khandual <[email protected]> [mpe: Rewrite change log] Signed-off-by: Michael Ellerman <[email protected]>
2015-08-12powerpc/prom: Simplify the logic to fetch SLB sizeAnshuman Khandual1-11/+7
The code to fetch the SLB size from the device tree wants to first look for "slb-size" and then if that's not found "ibm,slb-size". We can simplify the code by looking for the properties and then if we find one of them we set mmu_slb_size. We also change the function name from check_cpu_slb_size() to init_mmu_slb_size() as the function doesn't check anything, it only initialises mmu_slb_size. Signed-off-by: Anshuman Khandual <[email protected]> [mpe: Rewrite change log] Signed-off-by: Michael Ellerman <[email protected]>
2015-08-12powerpc/slb: Add documentation on runtime patching of SLB encodingAnshuman Khandual1-1/+15
This patch adds some documentation to patch_slb_encoding() explaining how it works. Signed-off-by: Anshuman Khandual <[email protected]> [mpe: Update change log and mention the signedness of the immediate] Signed-off-by: Michael Ellerman <[email protected]>
2015-08-12powerpc/slb: Rename all the 'slot' occurrences to 'entry'Anshuman Khandual1-4/+3
The SLB code uses 'slot' and 'entry' interchangeably, change it to always use 'entry'. Signed-off-by: Anshuman Khandual <[email protected]> [mpe: Rewrite change log] Signed-off-by: Michael Ellerman <[email protected]>
2015-08-12powerpc/slb: Remove a duplicate extern variableAnshuman Khandual1-1/+0
This patch just removes one redundant entry for one extern variable 'slb_compare_rr_to_size' from the scope. This patch does not change any functionality. Signed-off-by: Anshuman Khandual <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-10cleanup IORESOURCE_CACHEABLE vs ioremap()Dan Williams1-1/+1
Quoting Arnd: I was thinking the opposite approach and basically removing all uses of IORESOURCE_CACHEABLE from the kernel. There are only a handful of them.and we can probably replace them all with hardcoded ioremap_cached() calls in the cases they are actually useful. All existing usages of IORESOURCE_CACHEABLE call ioremap() instead of ioremap_nocache() if the resource is cacheable, however ioremap() is uncached by default. Clearly none of the existing usages care about the cacheability. Particularly devm_ioremap_resource() never worked as advertised since it always fell back to plain ioremap(). Clean this up as the new direction we want is to convert ioremap_<type>() usages to memremap(..., flags). Suggested-by: Arnd Bergmann <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Signed-off-by: Dan Williams <[email protected]>
2015-08-10powerpc/time: Migrate to new 'set-state' interfaceViresh Kumar1-12/+12
Migrate powerpc driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. We weren't doing anything in ->set_mode(ONSHOT) and so set_state_oneshot() isn't implemented. Cc: Benjamin Herrenschmidt <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: [email protected] Signed-off-by: Viresh Kumar <[email protected]> Signed-off-by: Daniel Lezcano <[email protected]>
2015-08-07powerpc/fsl: Force coherent memory on e500mc derivativesScott Wood4-13/+20
In CoreNet systems it is not allowed to mix M and non-M mappings to the same memory, and coherent DMA accesses are considered to be M mappings for this purpose. Ignoring this has been observed to cause hard lockups in non-SMP kernels on e6500. Furthermore, e6500 implements the LRAT (logical to real address table) which allows KVM guests to control the WIMGE bits. This means that KVM cannot force the M bit on the way it usually does, so the guest had better set it itself. Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/booke64: Move mb() to __set_pte_at() with kernel-addr testScott Wood2-10/+11
map_kernel() doesn't catch all places that create kernel PTEs. In particular, vmalloc() calls set_pte_at() directly. This causes a crash when booting a non-SMP kernel on e6500. Move the sync to __set_pte(), to be executed only for kernel addresses. Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/config: enable aquantia PHYShaohui Xie1-0/+1
Aquantia PHYs used on platforms such as T2080RDB, T1024RDB. Signed-off-by: Shaohui Xie <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/85xx: enable teranetics PHYShaohui Xie1-0/+1
The PHY uses XAUI interface to connect to MAC, mostly the PHY used on riser card. Signed-off-by: Shaohui Xie <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/t1023rdb: add ina220 current sensor nodeShengzhou Liu1-0/+11
Add support for INA220 current sensor. Signed-off-by: Shengzhou Liu <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/t1024rdb: add ina220 current sensor nodeShengzhou Liu1-0/+6
Add support for INA220 current sensor. Signed-off-by: Shengzhou Liu <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/32: Few optimisations in memcpyLEROY Christophe1-5/+5
This patch adds a few optimisations in memcpy functions by using lbzu/stbu instead of lxb/stb and by re-ordering insn inside a loop to reduce latency due to loading Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/32: cacheable_memcpy becomes memcpyLEROY Christophe1-8/+8
cacheable_memcpy uses dcbz instruction and is more efficient than memcpy when the destination is in RAM. If the destination is in an io area, memcpy_toio() is normally used, not memcpy This patch renames memcpy as generic_memcpy, and renames cacheable_memcpy as memcpy On MPC885, we get approximatly 7% increase of the transfer rate on an FTP reception Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/32: Merge the new memset() with the old oneLEROY Christophe1-27/+7
cacheable_memzero() which has become the new memset() and the old memset() are quite similar, so just merge them. Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/32: memset(0): use cacheable_memzeroLEROY Christophe1-4/+4
cacheable_memzero uses dcbz instruction and is more efficient than memset(0) when the destination is in RAM This patch renames memset as generic_memset, and defines memset as a prolog to cacheable_memzero. This prolog checks if the byte to set is 0. If not, it falls back to generic_memcpy() cacheable_memzero disappears as it is not referenced anywhere anymore Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07Partially revert "powerpc: Remove duplicate cacheable_memcpy/memzero functions"LEROY Christophe1-0/+127
This partially reverts commit 'powerpc: Remove duplicate cacheable_memcpy/memzero functions ("b05ae4ee602b7dc90771408ccf0972e1b3801a35")' Functions cacheable_memcpy/memzero are more efficient than memcpy/memset as they use the dcbz instruction which avoids refill of the cacheline with the data that we will overwrite. Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc: use memset_io() to clear CPM MuramLEROY Christophe1-1/+1
CPM muram is not cached, so use memset_io() instead of memset() Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/mm: Don't call __flush_dcache_icache_phys() with PA>VAScott Wood2-8/+13
__flush_dcache_icache_phys() requires the ability to access the memory with the MMU disabled, which means that on a 32-bit system any memory above 4 GiB is inaccessible. In particular, mpc86xx is 32-bit and can have more than 4 GiB of RAM. Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc: add support for csum_add()LEROY Christophe1-0/+16
The C version of csum_add() as defined in include/net/checksum.h gives the following assembly in ppc32: 0: 7c 04 1a 14 add r0,r4,r3 4: 7c 64 00 10 subfc r3,r4,r0 8: 7c 63 19 10 subfe r3,r3,r3 c: 7c 63 00 50 subf r3,r3,r0 and the following in ppc64: 0xc000000000001af8 <+0>: add r3,r3,r4 0xc000000000001afc <+4>: cmplw cr7,r3,r4 0xc000000000001b00 <+8>: mfcr r4 0xc000000000001b04 <+12>: rlwinm r4,r4,29,31,31 0xc000000000001b08 <+16>: add r3,r4,r3 0xc000000000001b0c <+20>: clrldi r3,r3,32 0xc000000000001b10 <+24>: blr include/net/checksum.h also offers the possibility to define an arch specific function. This patch provides a specific csum_add() inline function. Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc: put csum_tcpudp_magic inlineLEROY Christophe3-46/+12
csum_tcpudp_magic() is only a few instructions, and does modify really few registers. So it is not worth having it as a separate function and suffer function branching and saving of volatile registers. This patch makes it inline by use of the already existing csum_tcpudp_nofold() function. Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/85xx: Use kconfig fragmentsScott Wood12-1074/+296
Unify mpc85xx and corenet configs using fragments, to ease maintenance and avoid the sort of drift that the previous patch fixed. Hardware and software options are separated, with the hope that other embedded platforms could share the software options, and to make it easier to maintain custom/alternate configs that focus on either hardware or software options. Due to the previous patch, this patch should not affect the results of any of the affected defconfigs -- only how those results are achieved. The resulting config is more or less the union of the options that any of the configs previously selected. No attempt was made in this (or the previous) patch to edit out questionable options, but this patch will make it easier to do so in future patches. Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/85xx: Make defconfigs consistentScott Wood4-31/+262
The mpc85xx and corenet configs have many differences between them that can't be explained by the target hardware of each config. The next patch will consolidate these targets using kconfig fragments; this patch shows what the resulting defconfigs will look like (generated by using savedefconfig on a fragment-generated config). Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc: Update corenet32_smp_defconfig for modern distrosMichael Ellerman1-0/+6
corenet32_smp_defconfig is missing some things that modern distros require, enable them. Signed-off-by: Michael Ellerman <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/corenet32: enable DMA in defconfigYao Yuan1-0/+2
By default we enable DMA(CONFIG_FSL_DMA) support which are needed on P2041RDB, P3041DS, P4080DS, B4860QDS, etc. Signed-off-by: Yuan Yao <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07powerpc/corenet: enable eSDHCYangbo Lu2-0/+4
Signed-off-by: Yangbo Lu <[email protected]> Signed-off-by: Scott Wood <[email protected]>
2015-08-07treewide: Fix typo compatability -> compatibilityLaurent Pinchart1-1/+1
Even though 'compatability' has a dedicated entry in the Wiktionary, it's listed as 'Mispelling of compatibility'. Fix it. Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: David S. Miller <[email protected]> Acked-by: Daniel Vetter <[email protected]> for the atomic_helper.c Signed-off-by: Jiri Kosina <[email protected]>
2015-08-07treewide: Fix typo in printkMasanari Iida1-1/+1
This patch fix spelling typo inv various part of sources. Signed-off-by: Masanari Iida <[email protected]> Acked-by: Randy Dunlap <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2015-08-07signal: fix information leak in copy_siginfo_from_user32Amanieu d'Antras1-2/+0
This function can leak kernel stack data when the user siginfo_t has a positive si_code value. The top 16 bits of si_code descibe which fields in the siginfo_t union are active, but they are treated inconsistently between copy_siginfo_from_user32, copy_siginfo_to_user32 and copy_siginfo_to_user. copy_siginfo_from_user32 is called from rt_sigqueueinfo and rt_tgsigqueueinfo in which the user has full control overthe top 16 bits of si_code. This fixes the following information leaks: x86: 8 bytes leaked when sending a signal from a 32-bit process to itself. This leak grows to 16 bytes if the process uses x32. (si_code = __SI_CHLD) x86: 100 bytes leaked when sending a signal from a 32-bit process to a 64-bit process. (si_code = -1) sparc: 4 bytes leaked when sending a signal from a 32-bit process to a 64-bit process. (si_code = any) parsic and s390 have similar bugs, but they are not vulnerable because rt_[tg]sigqueueinfo have checks that prevent sending a positive si_code to a different process. These bugs are also fixed for consistency. Signed-off-by: Amanieu d'Antras <[email protected]> Cc: Oleg Nesterov <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Russell King <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Chris Metcalf <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Michael Ellerman <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2015-08-06powerpc/ftrace: add powerpc timebase as a trace clock sourceNaveen N. Rao4-1/+35
Add a new powerpc-specific trace clock using the timebase register, similar to x86-tsc. This gives us - a fast, monotonic, hardware clock source for trace entries, and - a clock that can be used to correlate events across cpus as well as across hypervisor and guests. Signed-off-by: Naveen N. Rao <[email protected]> Acked-by: Steven Rostedt <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-06powerpc/4xx: Fix return value check in hsta_msi_probe()Wei Yongjun1-2/+2
In case of error, the functions platform_get_resource() and kmalloc() returns NULL not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: Wei Yongjun <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-06powerpc: Remove redundant breaksJoe Perches2-2/+0
break; break; isn't useful. Remove one. Signed-off-by: Joe Perches <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-06powerpc: pci: use %pR for printing struct resourceKevin Hao1-54/+18
Use %pR to simplify the debug code. This also make the debug info more readable. Signed-off-by: Kevin Hao <[email protected]> [mpe: Unsplit multi-line printk strings] Signed-off-by: Michael Ellerman <[email protected]>
2015-08-06powerpc/powernv: Invoke opal_cec_reboot2() on unrecoverable HMI.Mahesh Salgaonkar1-0/+19
Invoke new opal_cec_reboot2() call with reboot type OPAL_REBOOT_PLATFORM_ERROR (for unrecoverable HMI interrupts) to inform BMC/OCC about this error, so that BMC can collect relevant data for error analysis and decide what component to de-configure before rebooting. Signed-off-by: Mahesh Salgaonkar <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-06powerpc/powernv: Invoke opal_cec_reboot2() on unrecoverable machine check ↵Mahesh Salgaonkar4-1/+45
errors. On non-recoverable MCE errors in kernel space, Linux kernel panics and system reboots. On BMC based system opal-prd runs as a daemon in the host. Hence, kernel crash may prevent opal-prd to detect and analyze this MCE error. This may land us in a situation where the faulty memory never gets de-configured and Linux would keep hitting same MCE error again and again. If this happens in early stage of kernel initialization, then Linux will keep crashing and rebooting in a loop. This patch fixes this issue by invoking new opal_cec_reboot2() call with reboot type OPAL_REBOOT_PLATFORM_ERROR to inform BMC/OCC about this error, so that BMC can collect relevant data for error analysis and decide what component to de-configure before rebooting. This patch is dependent on OPAL patchset posted on skiboot mailing list at https://lists.ozlabs.org/pipermail/skiboot/2015-July/001771.html that introduces opal_cec_reboot2() opal call. Signed-off-by: Mahesh Salgaonkar <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-06powerpc/powernv: Pull all HMI events before panic.Mahesh Salgaonkar1-2/+24
In the event of unrecovered HMI the existing code panics as soon as it receives the first unrecovered HMI event. This makes host to report partial information about HMIs before panic. There may be more errors which would have caused the HMI and hence more HMI event would have been generated waiting to be pulled by host. This patch implements a logic to pull and display all the HMI event before going down panic path. Signed-off-by: Mahesh Salgaonkar <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-06powerpc/powernv: display reason for Malfunction Alert HMI.Mahesh Salgaonkar2-0/+193
The V2 version of HMI event now carries additional information for Malfunction Alert. It now contains error information about CORE and NX checkstop. This patch checks and displays the check stop reason before panic. Signed-off-by: Mahesh Salgaonkar <[email protected]> Acked-by: Stewart Smith <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-08-04rcu,locking: Privatize smp_mb__after_unlock_lock()Paul E. McKenney1-2/+0
RCU is the only thing that uses smp_mb__after_unlock_lock(), and is likely the only thing that ever will use it, so this commit makes this macro private to RCU. Signed-off-by: Paul E. McKenney <[email protected]> Cc: Will Deacon <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: "[email protected]" <[email protected]>
2015-08-03sched/preempt, powerpc, kvm: Use need_resched() instead of should_resched()Konstantin Khlebnikov1-1/+1
Function should_resched() is equal to (!preempt_count() && need_resched()). In preemptive kernel preempt_count here is non-zero because of vc->lock. Signed-off-by: Konstantin Khlebnikov <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Cc: Alexander Graf <[email protected]> Cc: Boris Ostrovsky <[email protected]> Cc: David Vrabel <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Mike Galbraith <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: http://lkml.kernel.org/r/20150715095203.12246.72922.stgit@buzz Signed-off-by: Ingo Molnar <[email protected]>
2015-08-03locking/static_keys: Add a new static_key interfacePeter Zijlstra1-2/+17
There are various problems and short-comings with the current static_key interface: - static_key_{true,false}() read like a branch depending on the key value, instead of the actual likely/unlikely branch depending on init value. - static_key_{true,false}() are, as stated above, tied to the static_key init values STATIC_KEY_INIT_{TRUE,FALSE}. - we're limited to the 2 (out of 4) possible options that compile to a default NOP because that's what our arch_static_branch() assembly emits. So provide a new static_key interface: DEFINE_STATIC_KEY_TRUE(name); DEFINE_STATIC_KEY_FALSE(name); Which define a key of different types with an initial true/false value. Then allow: static_branch_likely() static_branch_unlikely() to take a key of either type and emit the right instruction for the case. This means adding a second arch_static_branch_jump() assembly helper which emits a JMP per default. In order to determine the right instruction for the right state, encode the branch type in the LSB of jump_entry::key. This is the final step in removing the naming confusion that has led to a stream of avoidable bugs such as: a833581e372a ("x86, perf: Fix static_key bug in load_mm_cr4()") ... but it also allows new static key combinations that will give us performance enhancements in the subsequent patches. Tested-by: Rabin Vincent <[email protected]> # arm Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Michael Ellerman <[email protected]> # ppc Acked-by: Heiko Carstens <[email protected]> # s390 Cc: Andrew Morton <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Paul E. McKenney <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-08-03jump_label: Rename JUMP_LABEL_{EN,DIS}ABLE to JUMP_LABEL_{JMP,NOP}Peter Zijlstra1-1/+1
Since we've already stepped away from ENABLE is a JMP and DISABLE is a NOP with the branch_default bits, and are going to make it even worse, rename it to make it all clearer. This way we don't mix multiple levels of logic attributes, but have a plain 'physical' name for what the current instruction patching status of a jump label is. This is a first step in removing the naming confusion that has led to a stream of avoidable bugs such as: a833581e372a ("x86, perf: Fix static_key bug in load_mm_cr4()") Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Paul E. McKenney <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] [ Beefed up the changelog. ] Signed-off-by: Ingo Molnar <[email protected]>
2015-08-03locking, arch: use WRITE_ONCE()/READ_ONCE() in ↵Andrey Konovalov1-2/+2
smp_store_release()/smp_load_acquire() Replace ACCESS_ONCE() macro in smp_store_release() and smp_load_acquire() with WRITE_ONCE() and READ_ONCE() on x86, arm, arm64, ia64, metag, mips, powerpc, s390, sparc and asm-generic since ACCESS_ONCE() does not work reliably on non-scalar types. WRITE_ONCE() and READ_ONCE() were introduced in the following commits: 230fa253df63 ("kernel: Provide READ_ONCE and ASSIGN_ONCE") 43239cbe79fc ("kernel: Change ASSIGN_ONCE(val, x) to WRITE_ONCE(x, val)") Signed-off-by: Andrey Konovalov <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Davidlohr Bueso <[email protected]> Acked-by: Michael Ellerman <[email protected]> (powerpc) Acked-by: Ralf Baechle <[email protected]> Cc: Alexander Duyck <[email protected]> Cc: Andre Przywara <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Christian Borntraeger <[email protected]> Cc: David S. Miller <[email protected]> Cc: Davidlohr Bueso <[email protected]> Cc: Dmitry Vyukov <[email protected]> Cc: Fenghua Yu <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Heiko Carstens <[email protected]> Cc: James Hogan <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Paul E. McKenney <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Russell King <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Tony Luck <[email protected]> Cc: Will Deacon <[email protected]> Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-07-30PCI: Hold pci_slot_mutex while searching bus->slots listYijing Wang1-5/+1
Previously, pci_setup_device() and similar functions searched the pci_bus->slots list without any locking. It was possible for another thread to update the list while we searched it. Add pci_dev_assign_slot() to search the list while holding pci_slot_mutex. [bhelgaas: changelog, fold in CONFIG_SYSFS fix] Tested-by: Guenter Roeck <[email protected]> Signed-off-by: Yijing Wang <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
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