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2010-10-21Merge branch 'sched-core-for-linus' of ↵Linus Torvalds1-4/+0
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (29 commits) sched: Export account_system_vtime() sched: Call tick_check_idle before __irq_enter sched: Remove irq time from available CPU power sched: Do not account irq time to current task x86: Add IRQ_TIME_ACCOUNTING sched: Add IRQ_TIME_ACCOUNTING, finer accounting of irq time sched: Add a PF flag for ksoftirqd identification sched: Consolidate account_system_vtime extern declaration sched: Fix softirq time accounting sched: Drop group_capacity to 1 only if local group has extra capacity sched: Force balancing on newidle balance if local group has capacity sched: Set group_imb only a task can be pulled from the busiest cpu sched: Do not consider SCHED_IDLE tasks to be cache hot sched: Drop all load weight manipulation for RT tasks sched: Create special class for stop/migrate work sched: Unindent labels sched: Comment updates: fix default latency and granularity numbers tracing/sched: Add sched_pi_setprio tracepoint sched: Give CPU bound RT tasks preference sched: Try not to migrate higher priority RT tasks ...
2010-10-21of/flattree: Eliminate need to provide early_init_dt_scan_chosen_archGrant Likely1-2/+10
This patch refactors the early init parsing of the chosen node so that architectures aren't forced to provide an empty implementation of early_init_dt_scan_chosen_arch. Instead, if an architecture wants to do something different, it can either use a wrapper function around early_init_dt_scan_chosen(), or it can replace it altogether. This patch was written in preparation to adding device tree support to both x86 ad MIPS. Signed-off-by: Grant Likely <[email protected]> Tested-by: David Daney <[email protected]>
2010-10-21of/device: Rework to use common platform_device_alloc() for allocating devicesGrant Likely1-7/+4
The current code allocates and manages platform_devices created from the device tree manually. It also uses an unsafe shortcut for allocating the platform_device and the resource table at the same time. (which I added in the last rework; sorry). This patch refactors the code to use platform_device_alloc() for allocating new devices. This reduces the amount of custom code implemented by of_platform, eliminates the unsafe alloc trick, and has the side benefit of letting the platform_bus code manage freeing the device data and resources when the device is freed. Signed-off-by: Grant Likely <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Michal Simek <[email protected]>
2010-10-20Merge branch 'linus' into irq/coreIngo Molnar4-12/+13
Merge reason: update to almost-final-.36 Signed-off-by: Ingo Molnar <[email protected]>
2010-10-19perf, powerpc: Fix power_pmu_event_init to not use event->ctxPaul Mackerras1-1/+1
Commit c3f00c70 ("perf: Separate find_get_context() from event initialization") changed the generic perf_event code to call perf_event_alloc, which calls the arch-specific event_init code, before looking up the context for the new event. Unfortunately, power_pmu_event_init uses event->ctx->task to see whether the new event is a per-task event or a system-wide event, and thus crashes since event->ctx is NULL at the point where power_pmu_event_init gets called. (The reason it needs to know whether it is a per-task event is because there are some hardware events on Power systems which only count when the processor is not idle, and there are some fixed-function counters which count such events. For example, the "run cycles" event counts cycles when the processor is not idle. If the user asks to count cycles, we can use "run cycles" if this is a per-task event, since the processor is running when the task is running, by definition. We can't use "run cycles" if the user asks for "cycles" on a system-wide counter.) Fortunately the information we need is in the event->attach_state field, so we just use that instead. Signed-off-by: Paul Mackerras <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Frederic Weisbecker <[email protected]> LKML-Reference: <20101019055535.GA10398@drongo> Signed-off-by: Ingo Molnar <[email protected]> Reported-by: Alexey Kardashevskiy <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2010-10-18sched: Consolidate account_system_vtime extern declarationVenkatesh Pallipadi1-4/+0
Just a minor cleanup patch that makes things easier to the following patches. No functionality change in this patch. Signed-off-by: Venkatesh Pallipadi <[email protected]> Signed-off-by: Peter Zijlstra <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2010-10-18irq_work: Add generic hardirq context callbacksPeter Zijlstra3-22/+23
Provide a mechanism that allows running code in IRQ context. It is most useful for NMI code that needs to interact with the rest of the system -- like wakeup a task to drain buffers. Perf currently has such a mechanism, so extract that and provide it as a generic feature, independent of perf so that others may also benefit. The IRQ context callback is generated through self-IPIs where possible, or on architectures like powerpc the decrementer (the built-in timer facility) is set to generate an interrupt immediately. Architectures that don't have anything like this get to do with a callback from the timer tick. These architectures can call irq_work_run() at the tail of any IRQ handlers that might enqueue such work (like the perf IRQ handler) to avoid undue latencies in processing the work. Signed-off-by: Peter Zijlstra <[email protected]> Acked-by: Kyle McMartin <[email protected]> Acked-by: Martin Schwidefsky <[email protected]> [ various fixes ] Signed-off-by: Huang Ying <[email protected]> LKML-Reference: <1287036094.7768.291.camel@yhuang-dev> Signed-off-by: Ingo Molnar <[email protected]>
2010-10-18Update broken web addresses in arch directory.Justin P. Mattock1-1/+1
The patch below updates broken web addresses in the arch directory. Signed-off-by: Justin P. Mattock <[email protected]> Signed-off-by: Maciej W. Rozycki <[email protected]> Cc: Finn Thain <[email protected]> Cc: Randy Dunlap <[email protected]> Reviewed-by: Finn Thain <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2010-10-15llseek: automatically add .llseek fopArnd Bergmann6-1/+9
All file_operations should get a .llseek operation so we can make nonseekable_open the default for future file operations without a .llseek pointer. The three cases that we can automatically detect are no_llseek, seq_lseek and default_llseek. For cases where we can we can automatically prove that the file offset is always ignored, we use noop_llseek, which maintains the current behavior of not returning an error from a seek. New drivers should normally not use noop_llseek but instead use no_llseek and call nonseekable_open at open time. Existing drivers can be converted to do the same when the maintainer knows for certain that no user code relies on calling seek on the device file. The generated code is often incorrectly indented and right now contains comments that clarify for each added line why a specific variant was chosen. In the version that gets submitted upstream, the comments will be gone and I will manually fix the indentation, because there does not seem to be a way to do that using coccinelle. Some amount of new code is currently sitting in linux-next that should get the same modifications, which I will do at the end of the merge window. Many thanks to Julia Lawall for helping me learn to write a semantic patch that does all this. ===== begin semantic patch ===== // This adds an llseek= method to all file operations, // as a preparation for making no_llseek the default. // // The rules are // - use no_llseek explicitly if we do nonseekable_open // - use seq_lseek for sequential files // - use default_llseek if we know we access f_pos // - use noop_llseek if we know we don't access f_pos, // but we still want to allow users to call lseek // @ open1 exists @ identifier nested_open; @@ nested_open(...) { <+... nonseekable_open(...) ...+> } @ open exists@ identifier open_f; identifier i, f; identifier open1.nested_open; @@ int open_f(struct inode *i, struct file *f) { <+... ( nonseekable_open(...) | nested_open(...) ) ...+> } @ read disable optional_qualifier exists @ identifier read_f; identifier f, p, s, off; type ssize_t, size_t, loff_t; expression E; identifier func; @@ ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off) { <+... ( *off = E | *off += E | func(..., off, ...) | E = *off ) ...+> } @ read_no_fpos disable optional_qualifier exists @ identifier read_f; identifier f, p, s, off; type ssize_t, size_t, loff_t; @@ ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off) { ... when != off } @ write @ identifier write_f; identifier f, p, s, off; type ssize_t, size_t, loff_t; expression E; identifier func; @@ ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off) { <+... ( *off = E | *off += E | func(..., off, ...) | E = *off ) ...+> } @ write_no_fpos @ identifier write_f; identifier f, p, s, off; type ssize_t, size_t, loff_t; @@ ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off) { ... when != off } @ fops0 @ identifier fops; @@ struct file_operations fops = { ... }; @ has_llseek depends on fops0 @ identifier fops0.fops; identifier llseek_f; @@ struct file_operations fops = { ... .llseek = llseek_f, ... }; @ has_read depends on fops0 @ identifier fops0.fops; identifier read_f; @@ struct file_operations fops = { ... .read = read_f, ... }; @ has_write depends on fops0 @ identifier fops0.fops; identifier write_f; @@ struct file_operations fops = { ... .write = write_f, ... }; @ has_open depends on fops0 @ identifier fops0.fops; identifier open_f; @@ struct file_operations fops = { ... .open = open_f, ... }; // use no_llseek if we call nonseekable_open //////////////////////////////////////////// @ nonseekable1 depends on !has_llseek && has_open @ identifier fops0.fops; identifier nso ~= "nonseekable_open"; @@ struct file_operations fops = { ... .open = nso, ... +.llseek = no_llseek, /* nonseekable */ }; @ nonseekable2 depends on !has_llseek @ identifier fops0.fops; identifier open.open_f; @@ struct file_operations fops = { ... .open = open_f, ... +.llseek = no_llseek, /* open uses nonseekable */ }; // use seq_lseek for sequential files ///////////////////////////////////// @ seq depends on !has_llseek @ identifier fops0.fops; identifier sr ~= "seq_read"; @@ struct file_operations fops = { ... .read = sr, ... +.llseek = seq_lseek, /* we have seq_read */ }; // use default_llseek if there is a readdir /////////////////////////////////////////// @ fops1 depends on !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier readdir_e; @@ // any other fop is used that changes pos struct file_operations fops = { ... .readdir = readdir_e, ... +.llseek = default_llseek, /* readdir is present */ }; // use default_llseek if at least one of read/write touches f_pos ///////////////////////////////////////////////////////////////// @ fops2 depends on !fops1 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier read.read_f; @@ // read fops use offset struct file_operations fops = { ... .read = read_f, ... +.llseek = default_llseek, /* read accesses f_pos */ }; @ fops3 depends on !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier write.write_f; @@ // write fops use offset struct file_operations fops = { ... .write = write_f, ... + .llseek = default_llseek, /* write accesses f_pos */ }; // Use noop_llseek if neither read nor write accesses f_pos /////////////////////////////////////////////////////////// @ fops4 depends on !fops1 && !fops2 && !fops3 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier read_no_fpos.read_f; identifier write_no_fpos.write_f; @@ // write fops use offset struct file_operations fops = { ... .write = write_f, .read = read_f, ... +.llseek = noop_llseek, /* read and write both use no f_pos */ }; @ depends on has_write && !has_read && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier write_no_fpos.write_f; @@ struct file_operations fops = { ... .write = write_f, ... +.llseek = noop_llseek, /* write uses no f_pos */ }; @ depends on has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier read_no_fpos.read_f; @@ struct file_operations fops = { ... .read = read_f, ... +.llseek = noop_llseek, /* read uses no f_pos */ }; @ depends on !has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; @@ struct file_operations fops = { ... +.llseek = noop_llseek, /* no read or write fn */ }; ===== End semantic patch ===== Signed-off-by: Arnd Bergmann <[email protected]> Cc: Julia Lawall <[email protected]> Cc: Christoph Hellwig <[email protected]>
2010-10-15Merge remote branch 'jwb/next' into nextBenjamin Herrenschmidt7-4/+360
2010-10-14powerpc/85xx: add DIU support to the Freecale P1022DS reference boardTimur Tabi3-2/+216
The Freescale P1022DS has an on-chip video controller called the DIU, and a driver for this device already exists. Update the platform file for the P1022DS reference board to enable the driver, and update the defconfig for Freescale MPC85xx boards to add the driver. [Edited to resolve header add/add conflict and drop #define DEBUG. -- broonie] Signed-off-by: Timur Tabi <[email protected]> Acked-by: Kumar Gala <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2010-10-14powerpc/44x: Update ppc44x_defconfigJosh Boyer1-4/+5
Make sure the new bluestone board is selected for the multiplatform defconfig. Also build logfs and squashfs as modules. Signed-off-by: Josh Boyer <[email protected]>
2010-10-14fsl_rio: Add comments for sRIO registers.Shaohui Xie1-25/+40
Add some comments to make sRIO registers map better readable. Signed-off-by: Shaohui Xie <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl-booke: Add e55xx (64-bit) smp defconfigKumar Gala2-3/+85
The p5020 SoC from Freescale is the first 64-bit Book-E processor and utilizes the two e5500 cores. Adding a defconfig that enables basic kernel for e5500 based processors. Also added the p5020 / e5500 support to the ppc64e defconfig. Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl-booke: Add p5020 DS board supportKumar Gala3-0/+82
The P5020DS is in the same family of boards as the P4080 DS and thus shares the corenet_ds code. Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl-booke64: Use TLB CAMs to cover linear mapping on FSL 64-bit chipsKumar Gala6-10/+29
On Freescale parts typically have TLB array for large mappings that we can bolt the linear mapping into. We utilize the code that already exists on PPC32 on the 64-bit side to setup the linear mapping to be cover by bolted TLB entries. We utilize a quarter of the variable size TLB array for this purpose. Additionally, we limit the amount of memory to what we can cover via bolted entries so we don't get secondary faults in the TLB miss handlers. We should fix this limitation in the future. Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl-booke: Add support for FSL Arch v1.0 MMU in setup_page_sizesKumar Gala2-3/+54
Update setup_page_sizes() to support for a MMU v1.0 FSL style MMU implementation. In such a processor, we don't have TLB0PS or EPTCFG registers (and access to these registers may cause exceptions). We need to parse the older format of TLBnCFG for page size support. Additionaly, assume since we are an FSL implementation that we have 2 TLB arrays and the second array contains the variable size pages. Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl-booke: Add support for FSL 64-bit e5500 coreKumar Gala6-4/+61
The new e5500 core is similar to the e500mc core but adds 64-bit support. We support running it in 32-bit mode as it is identical to the e500mc. Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/85xx: add cache-sram supportHarninder Rai5-0/+540
It adds cache-sram support in P1/P2 QorIQ platforms as under: * A small abstraction over powerpc's remote heap allocator * Exports mpc85xx_cache_sram_alloc()/free() APIs * Supports only one contiguous SRAM window * Drivers can do the following in Kconfig to use these APIs "select FSL_85XX_CACHE_SRAM if MPC85xx" * Required SRAM size and the offset where SRAM should be mapped must be provided at kernel command line as : cache-sram-size=<value> cache-sram-offset=<offset> Signed-off-by: Harninder Rai <[email protected]> Signed-off-by: Vivek Mahajan <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/85xx: add ngPIXIS FPGA device tree node to the P1022DS boardTimur Tabi1-0/+11
The device tree for Freescale's P1022DS reference board is missing the node for the ngPIXIS FPGA. Signed-off-by: Timur Tabi <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc: Fix compile error with paca code on ppc64eKumar Gala1-1/+1
arch/powerpc/kernel/paca.c: In function 'allocate_lppacas': arch/powerpc/kernel/paca.c:111:1: error: parameter name omitted arch/powerpc/kernel/paca.c:111:1: error: parameter name omitted Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl-booke: Add p3041 DS board supportKumar Gala3-0/+76
The P3041DS is in the same family of boards as the P4080DS and thus shares the corenet_ds code. Signed-off-by: Kumar Gala <[email protected]>
2010-10-14oprofile/fsl emb: Don't set MSR[PMM] until after clearing the interrupt.Scott Wood1-7/+8
On an arch 2.06 hypervisor, a pending perfmon interrupt will be delivered to the hypervisor at any point the guest is running, regardless of MSR[EE]. In order to reflect this interrupt, the hypervisor has to mask the interrupt in PMGC0 -- and set MSRP[PMMP] to intercept futher guest accesses to the PMRs to detect when to unmask (and prevent the guest from unmasking early, or seeing inconsistent state). This has the side effect of ignoring any changes the guest makes to MSR[PMM], so wait until after the interrupt is clear, and thus the hypervisor should have cleared MSRP[PMMP], before setting MSR[PMM]. The counters wil not actually run until PMGC0[FAC] is cleared in pmc_start_ctrs(), so this will not reduce the effectiveness of PMM. Signed-off-by: Scott Wood <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl-booke: Add PCI device ids for P2040/P3041/P5010/P5020 QoirQ chipsKumar Gala1-0/+8
Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/mpc8xxx_gpio: Add support for 'qoriq-gpio' controllersKumar Gala1-0/+3
Add 'fsl,qoriq-gpio' compatiable to the list we search for to bind against for mpc8xxx_gpio. This compatiable will be used on P1-P5xxx QorIQ devices like P4080. Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl_booke: Add support to boot from core other than 0Matthew McClintock2-3/+9
First we check to see if we are the first core booting up. This is accomplished by comparing the boot_cpuid with -1, if it is we assume this is the first core coming up. Secondly, we need to update the initial thread info structure to reflect the actual cpu we are running on otherwise smp_processor_id() and related functions will return the default initialization value of the struct or 0. Signed-off-by: Matthew McClintock <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/p1022: Add probing for individual DMA channelsTimur Tabi1-0/+2
Like the MPC8610 HPCD, the P1022DS ASoC DMA driver probes on individual DMA channel nodes, so the DMA controller nodes' compatible string must be listed in p1022_ds_ids[] to work. Signed-off-by: Timur Tabi <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl_soc: Search all global-utilities nodes for rstccrMatthew McClintock1-7/+13
The first global-utilities node might not contain the rstcr property, so we should search all the nodes Signed-off-by: Matthew McClintock <[email protected]> Acked-by: Timur Tabi <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc: Fix invalid page flags in create TLB CAM path for PTE_64BITPaul Gortmaker2-1/+9
There exists a four line chunk of code, which when configured for 64 bit address space, can incorrectly set certain page flags during the TLB creation. It turns out that this is code which isn't used, but might still serve a purpose. Since it isn't obvious why it exists or why it causes problems, the below description covers both in detail. For powerpc bootstrap, the physical memory (at most 768M), is mapped into the kernel space via the following path: MMU_init() | + adjust_total_lowmem() | + map_mem_in_cams() | + settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0); On settlbcam(), the kernel will create TLB entries according to the flag, PAGE_KERNEL_X. settlbcam() { ... TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid); ^ These entries cannot be invalidated by the kernel since MAS1_IPROT is set on TLB property. ... if (flags & _PAGE_USER) { TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); } For classic BookE (flags & _PAGE_USER) is 'zero' so it's fine. But on boards like the the Freescale P4080, we want to support 36-bit physical address on it. So the following options may be set: CONFIG_FSL_BOOKE=y CONFIG_PTE_64BIT=y CONFIG_PHYS_64BIT=y As a result, boards like the P4080 will introduce PTE format as Book3E. As per the file: arch/powerpc/include/asm/pgtable-ppc32.h * #elif defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT) * #include <asm/pte-book3e.h> So PAGE_KERNEL_X is __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX) and the book3E version of _PAGE_KERNEL_RWX is defined with: (_PAGE_BAP_SW | _PAGE_BAP_SR | _PAGE_DIRTY | _PAGE_BAP_SX) Note the _PAGE_BAP_SR, which is also defined in the book3E _PAGE_USER: #define _PAGE_USER (_PAGE_BAP_UR | _PAGE_BAP_SR) /* Can be read */ So the possibility exists to wrongly assign the user MAS3_U<RWX> bits to kernel (PAGE_KERNEL_X) address space via the following code fragment: if (flags & _PAGE_USER) { TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); } Here is a dump of the TLB info from Simics with the above code present: ------ L2 TLB1 GT SSS UUU V I Row Logical Physical SS TLPID TID WIMGE XWR XWR F P V ----- ----------------- ------------------- -- ----- ----- ----- --- --- - - - 0 c0000000-cfffffff 000000000-00fffffff 00 0 0 M XWR XWR 0 1 1 1 d0000000-dfffffff 010000000-01fffffff 00 0 0 M XWR XWR 0 1 1 2 e0000000-efffffff 020000000-02fffffff 00 0 0 M XWR XWR 0 1 1 Actually this conditional code was used for two legacy functions: 1: support KGDB to set break point. KGDB already dropped this; now uses its core write to set break point. 2: io_block_mapping() to create TLB in segmentation size (not PAGE_SIZE) for device IO space. This use case is also removed from the latest PowerPC kernel. However, there may still be a use case for it in the future, like large user pages, so we can't remove it entirely. As an alternative, we match on all bits of _PAGE_USER instead of just any bits, so the case where just _PAGE_BAP_SR is set can't sneak through. With this done, the TLB appears without U having XWR as below: ------- L2 TLB1 GT SSS UUU V I Row Logical Physical SS TLPID TID WIMGE XWR XWR F P V ----- ----------------- ------------------- -- ----- ----- ----- --- --- - - - 0 c0000000-cfffffff 000000000-00fffffff 00 0 0 M XWR 0 1 1 1 d0000000-dfffffff 010000000-01fffffff 00 0 0 M XWR 0 1 1 2 e0000000-efffffff 020000000-02fffffff 00 0 0 M XWR 0 1 1 Signed-off-by: Tiejun Chen <[email protected]> Signed-off-by: Paul Gortmaker <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/mpc83xx: Support for MPC8308 P1M boardIlya Yanok3-3/+336
This patch adds support for MPC8308 P1M board. Supported devices: DUART Dual Ethernet NOR flash Both I2C controllers USB in peripheral mode PCI Express Signed-off-by: Ilya Yanok <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/85xx: flush dcache before resetting coresMatthew McClintock1-0/+50
When we do an mpic_reset_core we need to make sure the dcache is flushed. Signed-off-by: Matthew McClintock <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/85xx: Minor fixups for kexec on 85xxMatthew McClintock1-13/+11
Make kexec_down_cpus atmoic since it will be incremented by all cores as they are coming down. Remove duplicate calls to mpc85xx_smp_kexec_down, now it's called by the crash and normal kexec pathway only once. Increase the timeout to wait for other cores to shutdown. Signed-off-by: Matthew McClintock <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/85xx: Remove call to mpic_teardown_this_cpu in kexecMatthew McClintock1-2/+0
We no longer need to call this explicitly as a generic version is called by default. Signed-off-by: Matthew McClintock <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/kexec: make masking/disabling interrupts genericMatthew McClintock4-12/+30
Right now just the kexec crash pathway turns turns off the interrupts. Pull that out and make a generic version for use elsewhere Signed-off-by: Matthew McClintock <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc: export ppc_proc_freq and ppc_tb_freq as GPL symbolsTimur Tabi1-1/+2
Export the global variable 'ppc_tb_freq', so that modules (like the Book-E watchdog driver) can use it. To maintain consistency, ppc_proc_freq is changed to a GPL-only export. This is okay, because any module that needs this symbol should be an actual Linux driver, which must be GPL-licensed. Signed-off-by: Timur Tabi <[email protected]> Acked-by: Josh Boyer <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-14powerpc/fsl-pci: Fix MSI support on 83xx platformsKumar Gala3-7/+55
The following commit broke 83xx because it assumed the 83xx platforms exposed the "IMMR" address in BAR0 like the 85xx/86xx/QoriQ devices do: commit 3da34aae03d498ee62f75aa7467de93cce3030fd Author: Kumar Gala <[email protected]> Date: Tue May 12 15:51:56 2009 -0500 powerpc/fsl: Support unique MSI addresses per PCIe Root Complex However that is not true, so we have to search through the inbound window settings on 83xx to find which one matches the IMMR address to determine its PCI address. Reported-by: Ilya Yanok <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
2010-10-13powerpc/44x: Add support for the AMCC APM821xx SoCTirumala Marri6-0/+355
This patch adds CPU, device tree, defconfig and bluestone board support for APM821xx SoC. Signed-off-by: Tirumala R Marri <[email protected]> Signed-off-by: Josh Boyer <[email protected]>
2010-10-13powerpc/Makefiles: Change to new flag variablesmatt mooney11-32/+17
Replace EXTRA_CFLAGS with ccflags-y and EXTRA_AFLAGS with asflags-y. Signed-off-by: matt mooney <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/spufs: Use llseek in all file operationsArnd Bergmann1-0/+18
The default for llseek is changing, so we need explicit operations everywhere. Signed-off-by: Arnd Bergmann <[email protected]> Cc: Jeremy Kerr <[email protected]> Cc: [email protected] Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/pseries/xics: Use cpu_possible_mask rather than cpu_all_maskNishanth Aravamudan1-1/+1
Current firmware only allows us to send IRQs to the first processor or all processors. We currently check to see if the passed in mask is equal to the all_mask, but the firmware is only considering whether the request is for the equivalent of the possible_mask. Thus, we think the request is for some subset of CPUs and only assign IRQs to the first CPU (on systems without irqbalance running) as evidenced by /proc/interrupts. By using possible_mask instead, we account for this and proper interleaving of interrupts occurs. Signed-off-by: Nishanth Aravamudan <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/pci: Cleanup device dma setup codeNishanth Aravamudan1-3/+1
Use set_dma_ops and remove unused oddly-named temp pointer sd. Signed-off-by: Milton Miller <[email protected]> Signed-off-by: Nishanth Aravamudan <[email protected]> Acked-by: Grant Likely <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/pseries: Use kmemdupNishanth Aravamudan1-2/+1
While looking at some code paths I came across this code that zeros memory then copies over the entire length. Signed-off-by: Milton Miller <[email protected]> Signed-off-by: Nishanth Aravamudan <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/viobus: Free TCE table on device releaseNishanth Aravamudan1-1/+6
Release the TCE table as the XXX suggests, except on FW_FEATURE_ISERIES, where the tables are allocated globally and reused. Signed-off-by: Milton Miller <[email protected]> Signed-off-by: Nishanth Aravamudan <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/vio: Use put_device() on device_register failureNishanth Aravamudan1-2/+1
The kernel doc for device_register (and device_initialize) very clearly state to call put_device not kfree after calling, even on error. Signed-off-by: Milton Miller <[email protected]> Signed-off-by: Nishanth Aravamudan <[email protected]> Acked-by: Grant Likely <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/dma: Fix check for direct DMA supportNishanth Aravamudan1-1/+1
The current check is wrong because it does not take the DMA offset intot account, and in the case of a driver which doesn't actually support 64bits would falsely report that device as working. Signed-off-by: Milton Miller <[email protected]> Signed-off-by: Nishanth Aravamudan <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/dma: Fix dma_iommu_dma_supported compareNishanth Aravamudan1-10/+11
The table offset is in entries, each of which imply a dma address of an IOMMU page. Also, we should check the device can reach the whole IOMMU table. Signed-off-by: Milton Miller <[email protected]> Signed-off-by: Nishanth Aravamudan <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/pci: Fix return type of BUID_{HI,LO} macrosNishanth Aravamudan1-2/+2
BUID_HI and BUID_LO are used to pass data to call_rtas, which expects ints or u32s. But the macro doesn't cast the return, so the result is still u64. Use the upper_32_bits and lower_32_bits macros that have been added to kernel.h. Found by getting printf format errors trying to debug print the args, no actual code change for 64 bit kernels where the macros are actually used. Signed-off-by: Milton Miller <[email protected]> Signed-off-by: Nishanth Aravamudan <[email protected]> Acked-by: Linas Vepstas <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc/irq.c: Add of_node_put to avoid memory leakJulia Lawall1-1/+3
In this case, a device_node structure is stored in another structure that is then freed without first decrementing the reference count of the device_node structure. The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r exists@ expression x; identifier f; position p1,p2; @@ x@p1->f = \(of_find_node_by_path\|of_find_node_by_name\|of_find_node_by_phandle\|of_get_parent\|of_get_next_parent\|of_get_next_child\|of_find_compatible_node\|of_match_node\|of_find_node_by_type\|of_find_node_with_property\|of_find_matching_node\|of_parse_phandle\|of_node_get\)(...); ... when != of_node_put(x) kfree@p2(x) @script:python@ p1 << r.p1; p2 << r.p2; @@ cocci.print_main("call",p1) cocci.print_secs("free",p2) // </smpl> Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc: Remove pr_<level> uses of KERN_<level>Joe Perches2-3/+3
Signed-off-by: Joe Perches <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
2010-10-13powerpc: Use static const char arraysJoe Perches2-3/+3
Signed-off-by: Joe Perches <[email protected]> Reviewed-by: Stephen Rothwell <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>