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2019-05-03mips: Dump memblock regions for debuggingSerge Semin1-0/+2
It is useful to have the whole memblock memory space printed to console when basic memlock initializations are done. It can be performed by ready-to-use method memblock_dump_all(), which prints the available and reserved memory spaces if memblock=debug kernel parameter is specified. Lets call it at the very end of arch_mem_init() function, when all memblock memory and reserved regions are defined, but before any serious allocation is performed. Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Stephen Rothwell <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Juergen Gross <[email protected]> Cc: Serge Semin <[email protected]> Cc: [email protected] Cc: [email protected]
2019-05-02Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-2/+3
Three trivial overlapping conflicts. Signed-off-by: David S. Miller <[email protected]>
2019-05-02mips: Add reserve-nomap memory type supportSerge Semin3-1/+12
It might be necessary to prevent the virtual mapping creation for a requested memory region. For instance there is a "no-map" property indicating exactly this feature. In this case we need to not only reserve the specified region by pretending it doesn't exist in the memory space, but completely remove the range from system just by removing it from memblock. The same way it's done in default early_init_dt_reserve_memory_arch() method. Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Matt Redfearn <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Stephen Rothwell <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Juergen Gross <[email protected]> Cc: [email protected] Cc: [email protected]
2019-05-02mips: Use memblock to reserve the __nosave memory rangeSerge Semin1-2/+3
Originally before legacy bootmem was removed, the memory for the range was correctly reserved by reserve_bootmem_region(). But since memblock has been selected for early memory allocation the function can be utilized only after paging is fully initialized (as it is done by memblock_free_all() function). So calling it from arch_mem_init() method is prone to errors, and at this stage we need to reserve the memory in the memblock allocator. Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Matt Redfearn <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Stephen Rothwell <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Juergen Gross <[email protected]> Cc: [email protected] Cc: [email protected]
2019-05-02mips: Discard post-CMA-init foreach loopSerge Semin1-5/+0
Really the loop is pointless, since it walks over memblock-reserved memory regions and mark them as reserved in memblock. Before bootmem was removed from the kernel, this loop had been used to map the memory reserved by CMA into the legacy bootmem allocator. But now the early memory allocator is memblock, which is used by CMA for reservation, so we don't need any mapping anymore. Reviewed-by: Matt Redfearn <[email protected]> Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Stephen Rothwell <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Juergen Gross <[email protected]> Cc: [email protected] Cc: [email protected]
2019-05-02mips: Reserve memory for the kernel image resourcesSerge Semin1-27/+3
The reserved_end variable had been used by the bootmem_init() code to find a lowest limit of memory available for memmap blob. The original code just tried to find a free memory space higher than kernel was placed. This limitation seems justified for the memmap ragion search process, but I can't see any obvious reason to reserve the unused space below kernel seeing some platforms place it much higher than standard 1MB. Moreover the RELOCATION config enables it to be loaded at any memory address. So lets reserve the memory occupied by the kernel only, leaving the region below being free for allocations. After doing this we can now discard the code freeing a space between kernel _text and VMLINUX_LOAD_ADDRESS symbols since it's going to be free anyway (unless marked as reserved by platforms). Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Matt Redfearn <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Stephen Rothwell <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Juergen Gross <[email protected]> Cc: [email protected] Cc: [email protected]
2019-05-02MIPS: Remove duplicate EBase configurationPaul Burton1-17/+3
Clean up our configuration of the EBase register by making configure_exception_vector() write to it unconditionally on systems implementing MIPSr2 or higher, and removing the duplicate code in per_cpu_trap_init(). The latter would have duplicated work on systems with vectored interrupts, and didn't set BEV for safety like the configure_exception_vector() version of the code does. Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Serge Semin <[email protected]> Tested-by: Serge Semin <[email protected]> Cc: [email protected]
2019-05-02MIPS: Sync icache for whole exception vectorPaul Burton1-1/+1
Rather than performing cache flushing for a fixed 0x400 bytes, use the actual size of the vector in order to ensure we cover all emitted code on systems that make use of vectored interrupts. Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Serge Semin <[email protected]> Tested-by: Serge Semin <[email protected]> Cc: [email protected]
2019-05-02MIPS: Always allocate exception vector for MIPSr2+Paul Burton1-20/+15
Currently we allocate the exception vector on systems which use a vectored interrupt mode, but otherwise attempt to reuse whatever exception vector the bootloader uses. This can be problematic for a number of reasons: 1) The memory isn't properly marked reserved in the memblock allocator. We've relied on the fact that EBase is generally in the memory below the kernel image which we don't free, but this is about to change. 2) Recent versions of U-Boot place their exception vector high in kseg0, in memory which isn't protected by being lower than the kernel anyway & can end up being clobbered. 3) We are unnecessarily reliant upon there being memory at the address EBase points to upon entry to the kernel. This is often the case, but if the bootloader doesn't configure EBase & leaves it with its default value then we rely upon there being memory at physical address 0 for no good reason. Improve this situation by allocating the exception vector in all cases when running on MIPSr2 or higher, and reserving the memory for MIPSr1 or lower. This ensures we don't clobber the exception vector in any configuration, and for MIPSr2 & higher removes the need for memory at physical address 0. Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Serge Semin <[email protected]> Tested-by: Serge Semin <[email protected]> Cc: [email protected]
2019-05-02MIPS: Use memblock_phys_alloc() for exception vectorPaul Burton1-4/+4
Allocate the exception vector using memblock_phys_alloc() which gives us a physical address, rather than the previous convoluted setup which obtained a virtual address using memblock_alloc(), converted it to a physical address & then back to a virtual address. Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Serge Semin <[email protected]> Tested-by: Serge Semin <[email protected]> Cc: [email protected]
2019-04-26clk: Remove CLK_IS_BASIC clk flagStephen Boyd1-1/+1
This flag was historically used to indicate that a clk is a "basic" type of clk like a mux, divider, gate, etc. This never turned out to be very useful though because it was hard to cleanly split "basic" clks from other clks in a system. This one flag was a way for type introspection and it just didn't scale. If anything, it was used by the TI clk driver to indicate that a clk_hw wasn't contained in the SoC specific clk structure. We can get rid of this define now that TI is finding those clks a different way. Cc: Tero Kristo <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: <[email protected]> Cc: Thierry Reding <[email protected]> Cc: Kevin Hilman <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Acked-by: Thierry Reding <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2019-04-26Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpfDavid S. Miller1-2/+3
Alexei Starovoitov says: ==================== pull-request: bpf 2019-04-25 The following pull-request contains BPF updates for your *net* tree. The main changes are: 1) the bpf verifier fix to properly mark registers in all stack frames, from Paul. 2) preempt_enable_no_resched->preempt_enable fix, from Peter. 3) other misc fixes. ==================== Signed-off-by: David S. Miller <[email protected]>
2019-04-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller5-7/+13
Two easy cases of overlapping changes. Signed-off-by: David S. Miller <[email protected]>
2019-04-25MIPS: eBPF: Make ebpf_to_mips_reg() staticYueHaibing1-2/+3
Fix sparse warning: arch/mips/net/ebpf_jit.c:196:5: warning: symbol 'ebpf_to_mips_reg' was not declared. Should it be static? Reported-by: Hulk Robot <[email protected]> Signed-off-by: YueHaibing <[email protected]> Acked-by: Yonghong Song <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]> Signed-off-by: Alexei Starovoitov <[email protected]>
2019-04-24mips: Combine memblock init and memory reservation loopsSerge Semin1-41/+7
Before bootmem was completely removed from the kernel, the last loop in the bootmem_init() had been used to reserve the correspondingly marked regions, initialize sparsemem sections and to free the low memory pages, which then would be used for early memory allocations. After the bootmem removing patchset had been merged the loop was left to do the first two things only. But it didn't do them quite well. First of all it leaves the BOOT_MEM_INIT_RAM memory types unreserved, which is definitely bug (although it isn't noticeable due to being used by the kernel region only, which is fully marked as reserved). Secondly the reservation is supposed to be done for any memory including the high one. (I couldn't figure out why the highmem was ignored in the first place, since platforms and dts' may declare any memory region for reservation) Thirdly the reserved_end variable had been used here to not accidentally free memory occupied by kernel. Since we already reserved the corresponding region higher in this method there is no need in using the variable here anymore. Fourthly the sparsemem should be aware of all the memory types in the system including the ROM_DATA even if it is going to be reserved for the whole system uptime. Finally after all these notes are fixed the loop of memory reservation can be freely merged into the memory installation loop as it's done in this patch. Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Matt Redfearn <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Stephen Rothwell <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Juergen Gross <[email protected]> Cc: [email protected] Cc: [email protected]
2019-04-24mips: Discard rudiments from bootmem_initSerge Semin1-20/+5
There is a pointless code left in the bootmem_init() method since the bootmem allocator removal. First part resides the PFN ranges calculation loop. The conditional expressions and continue operator are useless there, since nothing is done after them. Second part is in RAM ranges installation loop. We can simplify the conditions cascade a bit without much of the logic redefinition, so to reduce the code length. In particular the end boundary value can be verified after the possible reduction to be below max_low_pfn. Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Matt Redfearn <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Stephen Rothwell <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Juergen Gross <[email protected]> Cc: [email protected] Cc: [email protected]
2019-04-24mips: Make sure kernel .bss exists in boot mem poolSerge Semin1-0/+3
Current MIPS platform code makes sure the kernel text, data and init sections are added to the boot memory map pool right after the arch-specific memory setup method has been executed. But for some reason the MIPS platform code skipped the kernel .bss section, which definitely should be in the boot mem pool as well in any case. Lets fix this just be adding the space between __bss_start and __bss_stop. Reviewed-by: Matt Redfearn <[email protected]> Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Stephen Rothwell <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Juergen Gross <[email protected]> Cc: [email protected] Cc: [email protected]
2019-04-23mips: vdso: drop unnecessary cc-ldoptionNick Desaulniers1-3/+1
Towards the goal of removing cc-ldoption, it seems that --hash-style= was added to binutils 2.17.50.0.2 in 2006. The minimal required version of binutils for the kernel according to Documentation/process/changes.rst is 2.20. --build-id was added in 2.18 according to binutils-gdb/ld/NEWS. Link: https://gcc.gnu.org/ml/gcc/2007-01/msg01141.html Cc: [email protected] Suggested-by: Masahiro Yamada <[email protected]> Signed-off-by: Nick Desaulniers <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Matt Redfearn <[email protected]> Cc: Joel Stanley <[email protected]> Cc: Hassan Naveed <[email protected]> Cc: [email protected] Cc: [email protected]
2019-04-23Merge tag 'syscalls-5.1' of ↵Linus Torvalds3-0/+12
git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull syscall numbering updates from Arnd Bergmann: "arch: add pidfd and io_uring syscalls everywhere This comes a bit late, but should be in 5.1 anyway: we want the newly added system calls to be synchronized across all architectures in the release. I hope that in the future, any newly added system calls can be added to all architectures at the same time, and tested there while they are in linux-next, avoiding dependencies between the architecture maintainer trees and the tree that contains the new system call" * tag 'syscalls-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: arch: add pidfd and io_uring syscalls everywhere
2019-04-23arch: mostly remove <asm/segment.h>Christoph Hellwig1-1/+0
A few architectures use <asm/segment.h> internally, but nothing in common code does. Remove all the empty or almost empty versions of it, including the asm-generic one. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2019-04-22Merge tag 'mips_fixes_5.1_3' of ↵Linus Torvalds2-7/+1
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Paul Burton: "A couple more MIPS fixes: - Fix indirect syscall tracing & seccomp filtering for big endian MIPS64 kernels, which previously loaded the syscall number incorrectly & would always use zero. - Fix performance counter IRQ setup for Atheros/ath79 SoCs, allowing perf to function on those systems. And not really a fix, but a useful addition: - Add a Broadcom mailing list to the MAINTAINERS entry for BMIPS systems to allow relevant engineers to track patch submissions" * tag 'mips_fixes_5.1_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: perf: ath79: Fix perfcount IRQ assignment MIPS: scall64-o32: Fix indirect syscall number load MAINTAINERS: BMIPS: Add internal Broadcom mailing list
2019-04-22Merge tag 'v5.1-rc6' into for-5.2/blockJens Axboe5-5/+14
Pull in v5.1-rc6 to resolve two conflicts. One is in BFQ, in just a comment, and is trivial. The other one is a conflict due to a later fix in the bio multi-page work, and needs a bit more care. * tag 'v5.1-rc6': (770 commits) Linux 5.1-rc6 block: make sure that bvec length can't be overflow block: kill all_q_node in request_queue x86/cpu/intel: Lower the "ENERGY_PERF_BIAS: Set to normal" message's log priority coredump: fix race condition between mmget_not_zero()/get_task_mm() and core dumping mm/kmemleak.c: fix unused-function warning init: initialize jump labels before command line option parsing kernel/watchdog_hld.c: hard lockup message should end with a newline kcov: improve CONFIG_ARCH_HAS_KCOV help text mm: fix inactive list balancing between NUMA nodes and cgroups mm/hotplug: treat CMA pages as unmovable proc: fixup proc-pid-vm test proc: fix map_files test on F29 mm/vmstat.c: fix /proc/vmstat format for CONFIG_DEBUG_TLBFLUSH=y CONFIG_SMP=n mm/memory_hotplug: do not unlock after failing to take the device_hotplug_lock mm: swapoff: shmem_unuse() stop eviction without igrab() mm: swapoff: take notice of completion sooner mm: swapoff: remove too limiting SWAP_UNUSE_MAX_TRIES mm: swapoff: shmem_find_swap_entries() filter out other types slab: store tagged freelist for off-slab slabmgmt ... Signed-off-by: Jens Axboe <[email protected]>
2019-04-19net: socket: implement 64-bit timestampsArnd Bergmann1-2/+2
The 'timeval' and 'timespec' data structures used for socket timestamps are going to be redefined in user space based on 64-bit time_t in future versions of the C library to deal with the y2038 overflow problem, which breaks the ABI definition. Unlike many modern ioctl commands, SIOCGSTAMP and SIOCGSTAMPNS do not use the _IOR() macro to encode the size of the transferred data, so it remains ambiguous whether the application uses the old or new layout. The best workaround I could find is rather ugly: we redefine the command code based on the size of the respective data structure with a ternary operator. This lets it get evaluated as late as possible, hopefully after that structure is visible to the caller. We cannot use an #ifdef here, because inux/sockios.h might have been included before any libc header that could determine the size of time_t. The ioctl implementation now interprets the new command codes as always referring to the 64-bit structure on all architectures, while the old architecture specific command code still refers to the old architecture specific layout. The new command number is only used when they are actually different. Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-04-19Make anon_inodes unconditionalDavid Howells1-1/+0
Make the anon_inodes facility unconditional so that it can be used by core VFS code and pidfd code. Signed-off-by: David Howells <[email protected]> Signed-off-by: Al Viro <[email protected]> [[email protected]: adapt commit message to mention pidfds] Signed-off-by: Christian Brauner <[email protected]>
2019-04-18mtd: rawnand: Clarify Kconfig entry MTD_NANDMiquel Raynal11-11/+11
MTD_NAND is large and encloses much more than what the symbol is actually used for: raw NAND. Clarify the symbol by naming it MTD_RAW_NAND instead. Signed-off-by: Miquel Raynal <[email protected]>
2019-04-18mtd: nand: Clarify Kconfig entry for software Hamming ECC entriesMiquel Raynal1-1/+1
The software Hamming ECC correction implementation is referred as MTD_NAND_ECC which is too generic. Rename it MTD_NAND_ECC_SW_HAMMING. Also rename MTD_NAND_ECC_SMC which is an SMC quirk in the Hamming implementation as MTD_NAND_ECC_SW_HAMMING_SMC. Signed-off-by: Miquel Raynal <[email protected]>
2019-04-18mtd: nand: Clarify Kconfig entry for software BCH ECC algorithmMiquel Raynal2-2/+2
There is no point in having two distinct entries, merge them and rename the symbol for more clarity: MTD_NAND_ECC_SW_BCH Signed-off-by: Miquel Raynal <[email protected]>
2019-04-16MIPS: perf: ath79: Fix perfcount IRQ assignmentPetr Štetiar1-6/+0
Currently it's not possible to use perf on ath79 due to genirq flags mismatch happening on static virtual IRQ 13 which is used for performance counters hardware IRQ 5. On TP-Link Archer C7v5: CPU0 2: 0 MIPS 2 ath9k 4: 318 MIPS 4 19000000.eth 7: 55034 MIPS 7 timer 8: 1236 MISC 3 ttyS0 12: 0 INTC 1 ehci_hcd:usb1 13: 0 gpio-ath79 2 keys 14: 0 gpio-ath79 5 keys 15: 31 AR724X PCI 1 ath10k_pci $ perf top genirq: Flags mismatch irq 13. 00014c83 (mips_perf_pmu) vs. 00002003 (keys) On TP-Link Archer C7v4: CPU0 4: 0 MIPS 4 19000000.eth 5: 7135 MIPS 5 1a000000.eth 7: 98379 MIPS 7 timer 8: 30 MISC 3 ttyS0 12: 90028 INTC 0 ath9k 13: 5520 INTC 1 ehci_hcd:usb1 14: 4623 INTC 2 ehci_hcd:usb2 15: 32844 AR724X PCI 1 ath10k_pci 16: 0 gpio-ath79 16 keys 23: 0 gpio-ath79 23 keys $ perf top genirq: Flags mismatch irq 13. 00014c80 (mips_perf_pmu) vs. 00000080 (ehci_hcd:usb1) This problem is happening, because currently statically assigned virtual IRQ 13 for performance counters is not claimed during the initialization of MIPS PMU during the bootup, so the IRQ subsystem doesn't know, that this interrupt isn't available for further use. So this patch fixes the issue by simply booking hardware IRQ 5 for MIPS PMU. Tested-by: Kevin 'ldir' Darbyshire-Bryant <[email protected]> Signed-off-by: Petr Štetiar <[email protected]> Acked-by: John Crispin <[email protected]> Acked-by: Marc Zyngier <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Jason Cooper <[email protected]>
2019-04-15MIPS: scall64-o32: Fix indirect syscall number loadAurelien Jarno1-1/+1
Commit 4c21b8fd8f14 (MIPS: seccomp: Handle indirect system calls (o32)) added indirect syscall detection for O32 processes running on MIPS64, but it did not work correctly for big endian kernel/processes. The reason is that the syscall number is loaded from ARG1 using the lw instruction while this is a 64-bit value, so zero is loaded instead of the syscall number. Fix the code by using the ld instruction instead. When running a 32-bit processes on a 64 bit CPU, the values are properly sign-extended, so it ensures the value passed to syscall_trace_enter is correct. Recent systemd versions with seccomp enabled whitelist the getpid syscall for their internal processes (e.g. systemd-journald), but call it through syscall(SYS_getpid). This fix therefore allows O32 big endian systems with a 64-bit kernel to run recent systemd versions. Signed-off-by: Aurelien Jarno <[email protected]> Cc: <[email protected]> # v3.15+ Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2019-04-15arch: add pidfd and io_uring syscalls everywhereArnd Bergmann3-0/+12
Add the io_uring and pidfd_send_signal system calls to all architectures. These system calls are designed to handle both native and compat tasks, so all entries are the same across architectures, only arm-compat and the generic tale still use an old format. Acked-by: Michael Ellerman <[email protected]> (powerpc) Acked-by: Heiko Carstens <[email protected]> (s390) Acked-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2019-04-12Revert "MIPS: ralink: fix cpu clock of mt7621 and add dt clk devices"Paul Burton3-93/+33
Commit e6046b5e69a0 ("MIPS: ralink: fix cpu clock of mt7621 and add dt clk devices") includes a file that doesn't exist, causing build failures... Revert it. References: https://lore.kernel.org/linux-mips/CAJsYDVJvviz8a2oVmb0XL3OB+=Eecu-3kC9T9vsmxpuC_BqDSA@mail.gmail.com/ Signed-off-by: Paul Burton <[email protected]>
2019-04-10Merge branch 'linus' into locking/core, to pick up fixesIngo Molnar5-5/+14
Signed-off-by: Ingo Molnar <[email protected]>
2019-04-09Merge tag 'mips_fixes_5.1_2' of ↵Linus Torvalds3-3/+11
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Paul Burton: "A few minor MIPS fixes: - Provide struct pt_regs * from get_irq_regs() to kgdb_nmicallback() when handling an IPI triggered by kgdb_roundup_cpus(), matching the behavior of other architectures & resolving kgdb issues for SMP systems. - Defer a pointer dereference until after a NULL check in the irq_shutdown callback for SGI IP27 HUB interrupts. - A defconfig update for the MSCC Ocelot to enable some necessary drivers" * tag 'mips_fixes_5.1_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: generic: Add switchdev, pinctrl and fit to ocelot_defconfig MIPS: SGI-IP27: Fix use of unchecked pointer in shutdown_bridge_irq MIPS: KGDB: fix kgdb support for SMP platforms.
2019-04-09MIPS: generic: Enable CONFIG_JUMP_LABELPaul Burton1-0/+1
Enable CONFIG_JUMP_LABEL for generic configs in order to better optimize at runtime and get better test coverage for our jump label support. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2019-04-09MIPS: jump_label: Use compact branches for >= r6Paul Burton2-8/+34
MIPSr6 introduced compact branches which have no delay slots. Make use of them for jump labels in order to avoid the need for a nop to fill the branch or jump delay slot, saving 4 bytes of code for each static branch. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2019-04-09MIPS: jump_label: Remove redundant nopsPaul Burton1-2/+1
Both arch_static_branch() & arch_static_branch_jump() emit a control transfer instruction (ie. branch or jump) without disabling assembler re-ordering. As such the assembler will automatically fill their delay slots. Both functions follow their branch or jump with an explicit nop that at first appears to be there to fill the delay slot, but given that the assembler will do that the explicit nops serve no purpose & we end up with our branch or jump followed by 2 nops. Remove the redundant nops. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2019-04-09Merge tag 'mips_fixes_5.1_1' into mips-nextPaul Burton5-17/+13
A small batch of MIPS fixes for 5.1: - An interrupt masking fix for Loongson-based Lemote 2F systems (fixing a regression from v3.19). - A relocation fix for configurations in which the devicetree is stored in an ELF section (fixing a regression from v4.7). - Fix jump labels for MIPSr6 kernels where they previously could inadvertently place a control transfer instruction in a forbidden slot & take unexpected exceptions (fixing MIPSr6 support added in v4.0). - Extend an existing USB power workaround for the Netgear WNDR3400 to v2 boards in addition to the v3 ones that already used it. - Remove the custom MIPS32 definition of __kernel_fsid_t to make it consistent with MIPS64 & every other architecture, in particular resolving issues for code which tries to print the val field whose type previously differed (though had identical memory layout). Merged into mips-next to gain the MIPSr6 jump label fix before enabling jump labels by default for generic kernel builds. Signed-off-by: Paul Burton <[email protected]>
2019-04-08mips/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()Will Deacon4-4/+26
The mmiowb() macro is horribly difficult to use and drivers will continue to work most of the time if they omit a call when it is required. Rather than rely on driver authors getting this right, push mmiowb() into arch_spin_unlock() for mips. If this is deemed to be a performance issue, a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide the barrier in cases where no I/O writes were performed inside the critical section. Acked-by: Paul Burton <[email protected]> Acked-by: Linus Torvalds <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-04-08arch: Use asm-generic header for asm/mmiowb.hWill Deacon1-0/+1
Hook up asm-generic/mmiowb.h to Kbuild for all architectures so that we can subsequently include asm/mmiowb.h from core code. Cc: Masahiro Yamada <[email protected]> Cc: Arnd Bergmann <[email protected]> Acked-by: Linus Torvalds <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-04-06block: remove CONFIG_LBDAFChristoph Hellwig7-7/+0
Currently support for 64-bit sector_t and blkcnt_t is optional on 32-bit architectures. These types are required to support block device and/or file sizes larger than 2 TiB, and have generally defaulted to on for a long time. Enabling the option only increases the i386 tinyconfig size by 145 bytes, and many data structures already always use 64-bit values for their in-core and on-disk data structures anyway, so there should not be a large change in dynamic memory usage either. Dropping this option removes a somewhat weird non-default config that has cause various bugs or compiler warnings when actually used. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Jens Axboe <[email protected]>
2019-04-05syscalls: Remove start and number from syscall_get_arguments() argsSteven Rostedt (Red Hat)2-2/+3
At Linux Plumbers, Andy Lutomirski approached me and pointed out that the function call syscall_get_arguments() implemented in x86 was horribly written and not optimized for the standard case of passing in 0 and 6 for the starting index and the number of system calls to get. When looking at all the users of this function, I discovered that all instances pass in only 0 and 6 for these arguments. Instead of having this function handle different cases that are never used, simply rewrite it to return the first 6 arguments of a system call. This should help out the performance of tracing system calls by ptrace, ftrace and perf. Link: http://lkml.kernel.org/r/[email protected] Cc: Oleg Nesterov <[email protected]> Cc: Kees Cook <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Dominik Brodowski <[email protected]> Cc: Dave Martin <[email protected]> Cc: "Dmitry V. Levin" <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Paul Burton <[email protected]> # MIPS parts Acked-by: Max Filippov <[email protected]> # For xtensa changes Acked-by: Will Deacon <[email protected]> # For the arm64 bits Reviewed-by: Thomas Gleixner <[email protected]> # for x86 Reviewed-by: Dmitry V. Levin <[email protected]> Reported-by: Andy Lutomirski <[email protected]> Signed-off-by: Steven Rostedt (VMware) <[email protected]>
2019-04-04MIPS: ralink: fix cpu clock of mt7621 and add dt clk devicesChuanhong Guo3-33/+93
For a long time the mt7621 uses a fixed cpu clock which causes a problem if the cpu frequency is not 880MHz. This patch fixes the cpu clock calculation and adds the cpu/bus clkdev which will be used in dts. Ported from OpenWrt: c7ca224299 ramips: fix cpu clock of mt7621 and add dt clk devices Signed-off-by: Weijie Gao <[email protected]> Signed-off-by: Chuanhong Guo <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: John Crispin <[email protected]> Cc: [email protected]
2019-04-04MIPS: generic: Add switchdev, pinctrl and fit to ocelot_defconfigHoratiu Vultur1-0/+8
Some of the configuration were not selected by default anymore, therefore enable them again. Also remove some configs which are used for MSCC Ocelot. Signed-off-by: Horatiu Vultur <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]>
2019-04-03locking/rwsem: Remove rwsem-spinlock.c & use rwsem-xadd.c for all archsWaiman Long1-7/+0
Currently, we have two different implementation of rwsem: 1) CONFIG_RWSEM_GENERIC_SPINLOCK (rwsem-spinlock.c) 2) CONFIG_RWSEM_XCHGADD_ALGORITHM (rwsem-xadd.c) As we are going to use a single generic implementation for rwsem-xadd.c and no architecture-specific code will be needed, there is no point in keeping two different implementations of rwsem. In most cases, the performance of rwsem-spinlock.c will be worse. It also doesn't get all the performance tuning and optimizations that had been implemented in rwsem-xadd.c over the years. For simplication, we are going to remove rwsem-spinlock.c and make all architectures use a single implementation of rwsem - rwsem-xadd.c. All references to RWSEM_GENERIC_SPINLOCK and RWSEM_XCHGADD_ALGORITHM in the code are removed. Suggested-by: Peter Zijlstra <[email protected]> Signed-off-by: Waiman Long <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Linus Torvalds <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Davidlohr Bueso <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Paul E. McKenney <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Tim Chen <[email protected]> Cc: Will Deacon <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2019-04-03arch/tlb: Clean up simple architecturesPeter Zijlstra1-8/+0
For the architectures that do not implement their own tlb_flush() but do already use the generic mmu_gather, there are two options: 1) the platform has an efficient flush_tlb_range() and asm-generic/tlb.h doesn't need any overrides at all. 2) the platform lacks an efficient flush_tlb_range() and we select MMU_GATHER_NO_RANGE to minimize full invalidates. Convert all 'simple' architectures to one of these two forms. alpha: has no range invalidate -> 2 arc: already used flush_tlb_range() -> 1 c6x: has no range invalidate -> 2 hexagon: has an efficient flush_tlb_range() -> 1 (flush_tlb_mm() is in fact a full range invalidate, so no need to shoot down everything) m68k: has inefficient flush_tlb_range() -> 2 microblaze: has no flush_tlb_range() -> 2 mips: has efficient flush_tlb_range() -> 1 (even though it currently seems to use flush_tlb_mm()) nds32: already uses flush_tlb_range() -> 1 nios2: has inefficient flush_tlb_range() -> 2 (no limit on range iteration) openrisc: has inefficient flush_tlb_range() -> 2 (no limit on range iteration) parisc: already uses flush_tlb_range() -> 1 sparc32: already uses flush_tlb_range() -> 1 unicore32: has inefficient flush_tlb_range() -> 2 (no limit on range iteration) xtensa: has efficient flush_tlb_range() -> 1 Note this also fixes a bug in the existing code for a number platforms. Those platforms that did: tlb_end_vma() -> if (!full_mm) flush_tlb_*() tlb_flush -> if (full_mm) flush_tlb_mm() missed the case of shift_arg_pages(), which doesn't have @fullmm set, nor calls into tlb_*vma(), but still frees page-tables and thus needs an invalidate. The new code handles this by detecting a non-empty range, and either issuing the matching range invalidate or a full invalidate, depending on the capabilities. No change in behavior intended. Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Aneesh Kumar K.V <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Dave Hansen <[email protected]> Cc: David S. Miller <[email protected]> Cc: Greentime Hu <[email protected]> Cc: Guan Xuetao <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Helge Deller <[email protected]> Cc: Jonas Bonn <[email protected]> Cc: Ley Foon Tan <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Mark Salter <[email protected]> Cc: Max Filippov <[email protected]> Cc: Michal Simek <[email protected]> Cc: Nick Piggin <[email protected]> Cc: Paul Burton <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Richard Henderson <[email protected]> Cc: Richard Kuo <[email protected]> Cc: Rik van Riel <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Vineet Gupta <[email protected]> Cc: Will Deacon <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2019-04-03asm-generic/tlb, arch: Provide generic VIPT cache flushPeter Zijlstra1-9/+0
The one obvious thing SH and ARM want is a sensible default for tlb_start_vma(). (also: https://lkml.org/lkml/2004/1/15/6 ) Avoid all VIPT architectures providing their own tlb_start_vma() implementation and rely on architectures to provide a no-op flush_cache_range() when it is not relevant. This patch makes tlb_start_vma() default to flush_cache_range(), which should be right and sufficient. The only exceptions that I found where (oddly): - m68k-mmu - sparc64 - unicore Those architectures appear to have flush_cache_range(), but their current tlb_start_vma() does not call it. No change in behavior intended. Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Will Deacon <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Aneesh Kumar K.V <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Dave Hansen <[email protected]> Cc: David Miller <[email protected]> Cc: Guan Xuetao <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Nick Piggin <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Rik van Riel <[email protected]> Cc: Thomas Gleixner <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2019-03-28MIPS: SGI-IP27: Fix use of unchecked pointer in shutdown_bridge_irqThomas Bogendoerfer1-2/+1
smatch complaint: arch/mips/sgi-ip27/ip27-irq.c:123 shutdown_bridge_irq() warn: variable dereferenced before check 'hd' (see line 121) Fix it by removing local variable and use hd->pin directly. Fixes: 69a07a41d908 ("MIPS: SGI-IP27: rework HUB interrupts") Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]> Reviewed-by: Mukesh Ojha <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2019-03-28MIPS: KGDB: fix kgdb support for SMP platforms.Chong Qiao1-1/+2
KGDB_call_nmi_hook is called by other cpu through smp call. MIPS smp call is processed in ipi irq handler and regs is saved in handle_int. So kgdb_call_nmi_hook get regs by get_irq_regs and regs will be passed to kgdb_cpu_enter. Signed-off-by: Chong Qiao <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Acked-by: Daniel Thompson <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Will Deacon <[email protected]> Cc: Christophe Leroy <[email protected]> Cc: [email protected] Cc: [email protected] Cc: QiaoChong <[email protected]>
2019-03-25MIPS: KVM: Use prandom_u32_max() to generate tlbwr indexPaul Burton1-3/+1
Emulation of the tlbwr instruction, which writes a TLB entry to a random index in the TLB, currently uses get_random_bytes() to generate a 4 byte random number which we then mask to form the index. This is overkill in a couple of ways: - We don't need 4 bytes here since we mask the value to form a 6 bit number anyway, so we waste /dev/random entropy generating 3 random bytes that are unused. - We don't need crypto-grade randomness here - the architecture spec allows implementations to use any algorithm & merely encourages that some pseudo-randomness be used rather than a simple counter. The fast prandom_u32() function fits that criteria well. So rather than using get_random_bytes() & consuming /dev/random entropy, switch to using the faster prandom_u32_max() which provides what we need here whilst also performing the masking/modulo for us. Signed-off-by: Paul Burton <[email protected]> Reported-by: George Spelvin <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected]
2019-03-20syscall_get_arch: add "struct task_struct *" argumentDmitry V. Levin2-4/+4
This argument is required to extend the generic ptrace API with PTRACE_GET_SYSCALL_INFO request: syscall_get_arch() is going to be called from ptrace_request() along with syscall_get_nr(), syscall_get_arguments(), syscall_get_error(), and syscall_get_return_value() functions with a tracee as their argument. The primary intent is that the triple (audit_arch, syscall_nr, arg1..arg6) should describe what system call is being called and what its arguments are. Reverts: 5e937a9ae913 ("syscall_get_arch: remove useless function arguments") Reverts: 1002d94d3076 ("syscall.h: fix doc text for syscall_get_arch()") Reviewed-by: Andy Lutomirski <[email protected]> # for x86 Reviewed-by: Palmer Dabbelt <[email protected]> Acked-by: Paul Moore <[email protected]> Acked-by: Paul Burton <[email protected]> # MIPS parts Acked-by: Michael Ellerman <[email protected]> (powerpc) Acked-by: Kees Cook <[email protected]> # seccomp parts Acked-by: Mark Salter <[email protected]> # for the c6x bit Cc: Elvira Khabirova <[email protected]> Cc: Eugene Syromyatnikov <[email protected]> Cc: Oleg Nesterov <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Dmitry V. Levin <[email protected]> Signed-off-by: Paul Moore <[email protected]>