aboutsummaryrefslogtreecommitdiff
path: root/arch/mips
AgeCommit message (Collapse)AuthorFilesLines
2018-06-24MIPS: Use !pci_is_root_bus(bus) in ops-bridge.cJoshua Kinard1-2/+2
This is a manual cherrypick of commit c7ddc3d137b7 from Alastair Bridgewater's IP35 tree that replaces two cases of "if (bus->number > 0)" with a more correct "if (!pci_is_root_bus(bus))" in arch/mips/pci/ops-bridge.c. Cc: [email protected] Cc: Alastair Bridgewater <[email protected]> Suggested-by: Alastair Bridgewater <[email protected]> Signed-off-by: Joshua Kinard <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/17501/ Signed-off-by: Paul Burton <[email protected]> Cc: Linux/MIPS <[email protected]>
2018-06-24MIPS: Schedule on CPUs we need to lose FPU for a mode switchPaul Burton3-47/+42
Commit 6b8322576e9d ("MIPS: Force CPUs to lose FP context during mode switches") ensures that we react to PR_SET_FP_MODE prctl syscalls quickly by broadcasting an IPI in order to cause CPUs to lose FPU access when necessary. Whilst it achieves that, unfortunately it causes all sorts of strange race conditions because: 1) The IPI may arrive at a point where the FPU is in the process of being enabled, but that process is not yet complete leading to a state we aren't prepared to handle. For example: [ 370.215903] do_cpu invoked from kernel context![#1]: [ 370.221064] CPU: 0 PID: 963 Comm: fp-prctl Not tainted 4.9.0-rc5-00323-g210db32-dirty #226 [ 370.229420] task: a8000000fd672e00 task.stack: a8000000fd630000 [ 370.235399] $ 0 : 0000000000000000 0000000000000001 0000000000000001 a8000000fd630000 [ 370.243882] $ 4 : a8000000fd672e00 0000000000000000 0000000000000453 0000000000000000 [ 370.252317] $ 8 : 0000000000000000 a8000000fd637c28 1000000000000000 0000000000000010 [ 370.260753] $12 : 00000000140084e0 ffffffff80109c00 0000000000000000 0000000000000002 [ 370.269179] $16 : ffffffff8092f080 a8000000fd672e00 ffffffff80107fe8 a8000000fd485000 [ 370.277612] $20 : ffffffff8084d328 ffffffff80940000 0000000000000009 ffffffff80930000 [ 370.286038] $24 : 0000000000000000 900000001612048c [ 370.294476] $28 : a8000000fd630000 a8000000fd637ac0 ffffffff80937300 ffffffff8010807c [ 370.302909] Hi : 0000000000000000 [ 370.306595] Lo : 0000000000000200 [ 370.310376] epc : ffffffff80115d38 _save_fp+0x10/0xa0 [ 370.315784] ra : ffffffff8010807c prepare_for_fp_mode_switch+0x94/0x1b0 [ 370.322707] Status: 140084e2 KX SX UX KERNEL EXL [ 370.327980] Cause : 1080002c (ExcCode 0b) [ 370.332091] PrId : 0001a428 (MIPS P6600) [ 370.336179] Modules linked in: [ 370.339486] Process fp-prctl (pid: 963, threadinfo=a8000000fd630000, task=a8000000fd672e00, tls=00000000756e67d0) [ 370.349724] Stack : 0000000000000000 a8000000fd557dc0 0000000000000000 ffffffff801ca8e0 [ 370.358161] 0000000000000000 a8000000fd637b9c 0000000000000009 ffffffff80923780 [ 370.366575] ffffffff80850000 ffffffff8011610c 00000000000000b8 ffffffff801a5084 [ 370.374989] ffffffff8084a370 ffffffff8084a388 ffffffff80923780 ffffffff80923828 [ 370.383395] 0000000000010000 ffffffff809237a8 0000000000020000 ffffffff80a40000 [ 370.391817] 000000000000007c 00000000004a0000 00000000756dedd0 ffffffff801a5188 [ 370.400230] a800000002014900 0000000000000001 ffffffff80923780 0000000080923828 [ 370.408644] ffffffff80923780 ffffffff80923780 ffffffff80923828 ffffffff801a521c [ 370.417066] ffffffff80923780 ffffffff80923828 0000000000010000 ffffffff801a8f84 [ 370.425472] ffffffff80a40000 a8000000fd637c20 ffffffff80a39240 0000000000000001 [ 370.433885] ... [ 370.436562] Call Trace: [ 370.439222] [<ffffffff80115d38>] _save_fp+0x10/0xa0 [ 370.444305] [<ffffffff8010807c>] prepare_for_fp_mode_switch+0x94/0x1b0 [ 370.451035] [<ffffffff801ca8e0>] flush_smp_call_function_queue+0xf8/0x230 [ 370.457991] [<ffffffff8011610c>] ipi_call_interrupt+0xc/0x20 [ 370.463814] [<ffffffff801a5084>] __handle_irq_event_percpu+0xc4/0x1a8 [ 370.470404] [<ffffffff801a5188>] handle_irq_event_percpu+0x20/0x68 [ 370.476734] [<ffffffff801a521c>] handle_irq_event+0x4c/0x88 [ 370.482486] [<ffffffff801a8f84>] handle_edge_irq+0x12c/0x210 [ 370.488316] [<ffffffff801a47a0>] generic_handle_irq+0x38/0x48 [ 370.494280] [<ffffffff804a2dbc>] gic_handle_shared_int+0x194/0x268 [ 370.500616] [<ffffffff801a47a0>] generic_handle_irq+0x38/0x48 [ 370.506529] [<ffffffff80107e60>] do_IRQ+0x18/0x28 [ 370.511445] [<ffffffff804a1524>] plat_irq_dispatch+0xc4/0x140 [ 370.517339] [<ffffffff80106230>] ret_from_irq+0x0/0x4 [ 370.522583] [<ffffffff8010fad4>] do_ri+0x4fc/0x7e8 [ 370.527546] [<ffffffff80106220>] ret_from_exception+0x0/0x10 2) The IPI may arrive during kernel use of the FPU, since we generally only disable preemption around use of the FPU & leave interrupts enabled. This can lead to us unexpectedly losing access to the FPU in places where it previously had not been possible. For example: do_cpu invoked from kernel context![#2]: CPU: 2 PID: 7338 Comm: fp-prctl Tainted: G D 4.7.0-00424-g49b0c82 #2 task: 838e4000 ti: 88d38000 task.ti: 88d38000 $ 0 : 00000000 00000001 ffffffff 88d3fef8 $ 4 : 838e4000 88d38004 00000000 00000001 $ 8 : 3400fc01 801f8020 808e9100 24000000 $12 : dbffffff 807b69d8 807b0000 00000000 $16 : 00000000 80786150 00400fc4 809c0398 $20 : 809c0338 0040273c 88d3ff28 808e9d30 $24 : 808e9d30 00400fb4 $28 : 88d38000 88d3fe88 00000000 8011a2ac Hi : 0040273c Lo : 88d3ff28 epc : 80114178 _restore_fp+0x10/0xa0 ra : 8011a2ac mipsr2_decoder+0xd5c/0x1660 Status: 1400fc03 KERNEL EXL IE Cause : 1080002c (ExcCode 0b) PrId : 0001a920 (MIPS I6400) Modules linked in: Process fp-prctl (pid: 7338, threadinfo=88d38000, task=838e4000, tls=766527d0) Stack : 00000000 00000000 00000000 88d3fe98 00000000 00000000 809c0398 809c0338 808e9100 00000000 88d3ff28 00400fc4 00400fc4 0040273c 7fb69e18 004a0000 004a0000 004a0000 7664add0 8010de18 00000000 00000000 88d3fef8 88d3ff28 808e9100 00000000 766527d0 8010e534 000c0000 85755000 8181d580 00000000 00000000 00000000 004a0000 00000000 766527d0 7fb69e18 004a0000 80105c20 ... Call Trace: [<80114178>] _restore_fp+0x10/0xa0 [<8011a2ac>] mipsr2_decoder+0xd5c/0x1660 [<8010de18>] do_ri+0x90/0x6b8 [<80105c20>] ret_from_exception+0x0/0x10 At first glance a simple fix may seem to be to disable interrupts around kernel use of the FPU rather than merely preemption, however this would introduce further overhead outside of the mode switch path & doesn't solve the third problem: 3) The IPI may arrive whilst the kernel is running code that will lead to a preempt_disable() call & FPU usage soon. If this happens then the IPI will be serviced & we'll proceed to enable an FPU whilst the mode switch is in progress, leading to strange & inconsistent behaviour. Further to all of this is a separate but related problem: 4) There are various paths through which we may enable the FPU without the user having triggered a coprocessor 1 disabled exception. These paths are those in which we emulate instructions & then enable the FPU with the expectation that the user might execute an FP instruction shortly afterwards. However these paths have not previously checked whether an FP mode switch is underway for the task, and therefore could enable the FPU whilst such a mode switch is in progress leading to strange & inconsistent behaviour for user code. This patch fixes all of the above by taking a step back & re-examining our approach to FP mode switches. Up until now we have taken these basic steps: a) Prevent any threads that are part of the affected process from being able to obtain ownership of the FPU. b) Cause any threads that are part of the affected process and already have ownership of an FPU to lose it. c) Set the thread flags for each thread that is part of the affected process to reflect the new FP mode. d) Allow threads to obtain ownership of the FPU again. This approach is however more complex than necessary. All that we really require is that the mode switch has occurred for all threads that are part of the affected process before mips_set_process_fp_mode(), and thus the PR_SET_FP_MODE prctl() syscall, returns. This doesn't require that we stop threads from owning or using an FPU whilst a mode switch occurs, only that we force them to relinquish it after the mode switch has occurred such that they next own an FPU with the correct mode configured. Our basic steps therefore simplify to: A) Set the thread flags for each thread that is part of the affected process to reflect the new FP mode. B) Cause any threads that are part of the affected process and already have ownership of an FPU to lose it. We implement B) by forcing each CPU which might be running a thread which is part of the affected process to schedule a no-op function, which causes the affected thread to lose its FPU ownership when it is descheduled. The end result is simpler FP mode switching with less overhead in the FPU enable path (ie. enable_restore_fp_context()) and fewer moving parts. Signed-off-by: Paul Burton <[email protected]> Fixes: 9791554b45a2 ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS") Fixes: 6b8322576e9d ("MIPS: Force CPUs to lose FP context during mode switches") Cc: James Hogan <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: [email protected] Cc: stable <[email protected]> # v4.0+
2018-06-24MIPS: lantiq: remove unnecessary of_platform_default_populate callRob Herring1-8/+0
The DT core will call of_platform_default_populate, so it is not necessary for arch specific code to call it unless there are custom match entries, auxdata or parent device. Neither of those apply here, so remove the call. Cc: John Crispin <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19592/ Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2018-06-24MIPS: generic: remove unnecessary of_platform_populate callRob Herring1-13/+0
The DT core will call of_platform_populate, so it is not necessary for arch specific code to call it unless there are custom match entries, auxdata or parent device. Neither of those apply here, so remove the call. Cc: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19591/ Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2018-06-24MIPS: bmips: remove unnecessary call to register "simple-bus"Rob Herring1-7/+0
The DT core will register "simple-bus" by default, so it is not necessary for arch specific code to do so unless there are custom match entries, auxdata or parent device. Neither of those apply here, so remove the call. Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19590/ Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2018-06-24MIPS: netlogic: remove unnecessary of_platform_bus_probe callRob Herring1-14/+0
The DT core code will probe "simple-bus" by default, so remove the Netlogic specific call. The probing of simple-bus happens at arch_initcall_sync, so the call being removed here is already a nop. Cc: Ralf Baechle <[email protected]> Cc: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19589/ Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2018-06-24MIPS: octeon: use of_platform_populate to probe devicesRob Herring1-1/+1
of_platform_bus_probe is deprecated in favor of of_platform_populate. of_platform_populate is stricter requiring compatible properties for matching rather than name or type. Octeon uses compatible strings for matching, so convert it to of_platform_populate. Cc: Ralf Baechle <[email protected]> Cc: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19588/ Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2018-06-24MIPS: Fix ejtag handler on SMPHeiher1-0/+46
On SMP systems, the shared ejtag debug buffer may be overwritten by other cores, because every cores can generate ejtag exception at same time. Unfortunately, in that context, it's difficult to relax more registers to access per cpu buffers. so use ll/sc to serialize the access. [[email protected]: This could in theory be backported at least as far back as the beginning of the git era, however in general it's exceedingly rare that anyone would hit this without further changes, so it doesn't seem worthwhile marking for backport.] Signed-off-by: Heiher <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19507/ Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: boot: merge build rules of vmlinux.*.itb by using pattern ruleMasahiro Yamada1-18/+9
Merge the build rule of vmlinux.{gz,bz2,lzma,lzo}.itb, and also move 'targets' close to the related code. [[email protected]: - Remove leading tabs from assignments to itb_addr_cells, since after this patch moves the additions to the 'targets' variable the assignments to itb_addr_cells wound up being treated as part of the uImage rule above them, causing the .its to incorrectly be generated with empty ADDR_CELLS.] Signed-off-by: Masahiro Yamada <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19095/ Signed-off-by: Paul Burton <[email protected]> Cc: Kees Cook <[email protected]> Cc: [email protected]
2018-06-24MIPS: boot: add missing targets for vmlinux.*.itsMasahiro Yamada1-0/+6
The build rule of vmlinux.*.its is invoked by $(call if_changed,...) but it always rebuilds the target needlessly due to missing targets. Signed-off-by: Masahiro Yamada <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19092/ Signed-off-by: Paul Burton <[email protected]> Cc: Kees Cook <[email protected]> Cc: [email protected]
2018-06-24MIPS: boot: fix build rule of vmlinux.its.SMasahiro Yamada1-2/+4
As Documentation/kbuild/makefile.txt says, it is a typical mistake to forget the FORCE prerequisite for the rule invoked by if_changed. Add the FORCE to the prerequisite, but it must be filtered-out from the files passed to the 'cat' command. Because this rule generates .vmlinux.its.S.cmd, vmlinux.its.S must be specified as targets so that the .cmd file is included. Signed-off-by: Masahiro Yamada <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19097/ Signed-off-by: Paul Burton <[email protected]> Cc: Kees Cook <[email protected]> Cc: [email protected]
2018-06-24MIPS: boot: do not include $(cpp_flags) for preprocessing ITSMasahiro Yamada1-6/+6
$(CPP) is used here to perform macro replacement in ITS. Do not pass $(cpp_flags) because it pulls in more options for dependency file generation etc. but none of which is necessary here. ITS files do not include any header file, so $(call if_change,...) is enough. Signed-off-by: Masahiro Yamada <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19093/ Signed-off-by: Paul Burton <[email protected]> Cc: Kees Cook <[email protected]> Cc: [email protected]
2018-06-24Revert "MIPS: boot: Define __ASSEMBLY__ for its.S build"Masahiro Yamada1-1/+0
This reverts commit 0f9da844d87796ac31b04e81ee95e155e9043132. It is true that commit 0f9da844d877 ("MIPS: boot: Define __ASSEMBLY__ for its.S build") fixed the build error, but it should not have defined __ASSEMBLY__ just for textual substitution in arbitrary data. The file is image tree source in this case, but the purpose of using CPP is to replace some macros. I merged a better solution, commit a95b37e20db9 ("kbuild: get <linux/compiler_types.h> out of <linux/kconfig.h>"). The original fix-up is no longer needed. Signed-off-by: Masahiro Yamada <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19096/ Signed-off-by: Paul Burton <[email protected]> Cc: Kees Cook <[email protected]> Cc: [email protected]
2018-06-24MIPS: Octeon: assign bool true/false not 1/0Nicholas Mc Guire1-1/+1
Booleans should be assigned true/false not 1/0 as comparison is not needed Signed-off-by: Nicholas Mc Guire <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19559/ Signed-off-by: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: David Daney <[email protected]> Cc: "Steven J. Hill" <[email protected]> Cc: Joe Perches <[email protected]> Cc: Colin Ian King <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: remove unneeded includes from dma-mapping.hChristoph Hellwig2-8/+1
Keep this file as light as possible as it gets pulled into every driver using dma mapping APIs. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19552/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: remove the old dma-default implementationChristoph Hellwig5-460/+1
Now unused. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19551/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: bmips: use generic dma noncoherent opsChristoph Hellwig4-84/+21
Provide phys_to_dma/dma_to_phys helpers, and the special arch_sync_dma_for_cpu_all hook, everything else is generic Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19550/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: jazz: split dma mapping operations from dma-defaultChristoph Hellwig4-65/+144
Jazz actually has a very basic IOMMU, so split the ops into a separate implementation from the generic default support (which is about to go away anyway). Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19548/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: ath25: use generic dma noncoherent opsChristoph Hellwig4-72/+25
Provide phys_to_dma/dma_to_phys helpers only if PCI support is enabled, everything else is generic. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19547/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: IP32: use generic dma noncoherent opsChristoph Hellwig4-94/+39
Provide phys_to_dma/dma_to_phys helpers, everything else is generic. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19546/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: loongson64: use generic dma noncoherent opsChristoph Hellwig5-71/+20
Provide phys_to_dma/dma_to_phys helpers, everything else is generic. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19545/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: use generic dma noncoherent ops for simple noncoherent platformsChristoph Hellwig8-28/+216
Convert everything not overriding dma-coherence.h to the generic noncoherent ops. The new dma-noncoherent.c file duplicates a lot of the code in dma-default.c, but that file will be gone by the end of this series. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19544/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: move coherentio setup to setup.cChristoph Hellwig2-23/+24
We want to be able to use it even when not building dma-default.c in the near future. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19543/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: IP27: use dma_direct_opsChristoph Hellwig3-71/+15
IP27 is coherent and has a reasonably direct mapping, just with a little per-bus offset added into the dma address. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19542/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: use dma_direct_ops for coherent I/OChristoph Hellwig2-15/+2
Switch the simple cache coherent architectures that don't require any DMA address translation to dma_direct_ops. We'll soon use at least parts of the direct DMA ops implementation for all platforms, so select the symbol globally. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19540/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: loongson: remove loongson-3 handling from dma-coherence.hChristoph Hellwig1-15/+1
Loongson3 is dma coherent and uses swiotlb, so it will never used any of these helpers. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19541/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: loongson: untangle dma implementationsChristoph Hellwig5-24/+6
Only loongson-3 is DMA coherent and uses swiotlb. So move the dma address translations stubs directly to the loongson-3 code, and remove a few Kconfig indirections. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19539/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: Octeon: move swiotlb declarations out of dma-coherence.hChristoph Hellwig4-22/+3
No need to pull them into a global header. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19538/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: Octeon: remove mips dma-default stubsChristoph Hellwig1-48/+0
Octeon doesn't use the dma-default code, and now doesn't built it either, so these stubs can be removed. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19537/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: make the default mips dma implementation optionalChristoph Hellwig9-2/+59
Octeon and loonson64 already don't use it at all, and we're going to migrate more plaforms away from it. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19536/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: remove the mips_dma_map_ops indirectionChristoph Hellwig2-6/+4
And use mips_default_dma_map_ops directly. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19535/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: consolidate the swiotlb implementationsChristoph Hellwig8-153/+84
Octeon and Loongson share exactly the same code, move it into a common implementation, and use that implementation directly from get_arch_dma_ops. Also provide the expected dma-direct.h helpers directly instead of delegating to platform dma-coherence.h headers. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19534/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: loongson: remove loongson_dma_supportedChristoph Hellwig1-8/+1
swiotlb_dma_supported will always return true for a mask large enough to cover the DMA addresses for all physical memory, which is the right thing to do for swiotlb based dma ops. This function returned false if the mask was bigger than a firmware set dma_mask_bits that apparently can be either 32 or 64, and which seems completely buggys if it actually is not 64, as the false return negates the whole point of swiotlb. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19533/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: Octeon: refactor swiotlb codeChristoph Hellwig3-94/+71
Share a common set of swiotlb operations, and to instead branch out in __phys_to_dma/__dma_to_phys for the PCI vs non-PCI case. Also use const structures for the PCI methods so that attackers can't use them as exploit vectors. Signed-off-by: Christoph Hellwig <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19532/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: Octeon: unexport __phys_to_dma and __dma_to_physChristoph Hellwig1-3/+0
These functions are just low-level helpers for the swiotlb and dma-direct implementations, and should never be used by drivers. Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Paul Burton <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19531/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: remove CONFIG_DMA_COHERENTChristoph Hellwig5-24/+6
We can just check for !CONFIG_DMA_NONCOHERENT instead and simplify things a lot. Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Paul Burton <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19530/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: simplify CONFIG_DMA_NONCOHERENT ifdefsChristoph Hellwig3-6/+6
CONFIG_DMA_MAYBE_COHERENT already selects CONFIG_DMA_NONCOHERENT, so we can remove the extra conditions. Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Paul Burton <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19529/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: remove a dead ifdef from mach-ath25/dma-coherence.hChristoph Hellwig1-5/+0
ath25 is alwas non-coherent, so keeping these ifdefs doesn't make any sense. Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Paul Burton <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19528/ Signed-off-by: Paul Burton <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: David Daney <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: Tom Bogendoerfer <[email protected]> Cc: Huacai Chen <[email protected]> Cc: [email protected] Cc: [email protected]
2018-06-24MIPS: kexec: fix typosYegor Yefremov1-2/+2
Correct a couple of typos within comments in arch/mips/kernel/relocate_kernel.S. [[email protected]: Add a commit message.] Signed-off-by: Yegor Yefremov <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19218/ Signed-off-by: Paul Burton <[email protected]>
2018-06-24MIPS: Make elf2ecoff work on 64bit host machinesThomas Bogendoerfer2-44/+48
Use fixed width integer types for ecoff structs to make elf2ecoff work on 64bit host machines. Signed-off-by: Thomas Bogendoerfer <[email protected]> Reviewed-by: Paul Burton <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19483/ Signed-off-by: Paul Burton <[email protected]>
2018-06-21atomics/treewide: Make unconditional inc/dec ops optionalMark Rutland1-38/+0
Many of the inc/dec ops are mandatory, but for most architectures inc/dec are simply trivial wrappers around their corresponding add/sub ops. Let's make all the inc/dec ops optional, so that we can get rid of these boilerplate wrappers. The instrumented atomics are updated accordingly. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <[email protected]> Reviewed-by: Will Deacon <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Cc: Boqun Feng <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/lkml/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2018-06-21atomics/treewide: Make test ops optionalMark Rutland1-84/+0
Some of the atomics return the result of a test applied after the atomic operation, and almost all architectures implement these as trivial wrappers around the underlying atomic. Specifically: * <atomic>_inc_and_test(v) is (<atomic>_inc_return(v) == 0) * <atomic>_dec_and_test(v) is (<atomic>_dec_return(v) == 0) * <atomic>_sub_and_test(i, v) is (<atomic>_sub_return(i, v) == 0) * <atomic>_add_negative(i, v) is (<atomic>_add_return(i, v) < 0) Rather than have these definitions duplicated in all architectures, with minor inconsistencies in formatting and documentation, let's make these operations optional, with default fallbacks as above. Implementations must now provide a preprocessor symbol. The instrumented atomics are updated accordingly. Both x86 and m68k have custom implementations, which are left as-is, given preprocessor symbols to avoid being overridden. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <[email protected]> Reviewed-by: Will Deacon <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Cc: Boqun Feng <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/lkml/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2018-06-21atomics/treewide: Make atomic64_fetch_add_unless() optionalMark Rutland1-24/+0
Architectures with atomic64_fetch_add_unless() provide a preprocessor symbol if they do so, and all other architectures have trivial C implementations of atomic64_add_unless() which are near-identical. Let's unify the trivial definitions of atomic64_fetch_add_unless() in <linux/atomic.h>, so that we always have both atomic64_fetch_add_unless() and atomic64_add_unless() with less boilerplate code. This means that atomic64_add_unless() is always implemented in core code, and the instrumented atomics are updated accordingly. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <[email protected]> Reviewed-by: Will Deacon <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Cc: Boqun Feng <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/lkml/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2018-06-21atomics/treewide: Make atomic_fetch_add_unless() optionalMark Rutland1-24/+0
Several architectures these have a near-identical implementation based on atomic_read() and atomic_cmpxchg() which we can instead define in <linux/atomic.h>, so let's do so, using something close to the existing x86 implementation with try_cmpxchg(). Where an architecture provides its own atomic_fetch_add_unless(), it must define a preprocessor symbol for it. The instrumented atomics are updated accordingly. Note that arch/arc's existing atomic_fetch_add_unless() had redundant barriers, as these are already present in its atomic_cmpxchg() implementation. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Will Deacon <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Cc: Boqun Feng <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Vineet Gupta <[email protected]> Link: https://lore.kernel.org/lkml/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2018-06-21atomics/treewide: Make atomic64_inc_not_zero() optionalMark Rutland1-2/+0
We define a trivial fallback for atomic_inc_not_zero(), but don't do the same for atomic64_inc_not_zero(), leading most architectures to define the same boilerplate. Let's add a fallback in <linux/atomic.h>, and remove the redundant implementations. Note that atomic64_add_unless() is always defined in <linux/atomic.h>, and promotes its arguments to the requisite types, so we need not do this explicitly. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <[email protected]> Reviewed-by: Will Deacon <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Cc: Boqun Feng <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/lkml/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2018-06-21atomics/treewide: Rename __atomic_add_unless() => atomic_fetch_add_unless()Mark Rutland1-2/+2
While __atomic_add_unless() was originally intended as a building-block for atomic_add_unless(), it's now used in a number of places around the kernel. It's the only common atomic operation named __atomic*(), rather than atomic_*(), and for consistency it would be better named atomic_fetch_add_unless(). This lack of consistency is slightly confusing, and gets in the way of scripting atomics. Given that, let's clean things up and promote it to an official part of the atomics API, in the form of atomic_fetch_add_unless(). This patch converts definitions and invocations over to the new name, including the instrumented version, using the following script: ---- git grep -w __atomic_add_unless | while read line; do sed -i '{s/\<__atomic_add_unless\>/atomic_fetch_add_unless/}' "${line%%:*}"; done git grep -w __arch_atomic_add_unless | while read line; do sed -i '{s/\<__arch_atomic_add_unless\>/arch_atomic_fetch_add_unless/}' "${line%%:*}"; done ---- Note that we do not have atomic{64,_long}_fetch_add_unless(), which will be introduced by later patches. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <[email protected]> Reviewed-by: Will Deacon <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Cc: Boqun Feng <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/lkml/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2018-06-21bpf/error-inject/kprobes: Clear current_kprobe and enable preempt in kprobeMasami Hiramatsu1-2/+2
Clear current_kprobe and enable preemption in kprobe even if pre_handler returns !0. This simplifies function override using kprobes. Jprobe used to require to keep the preemption disabled and keep current_kprobe until it returned to original function entry. For this reason kprobe_int3_handler() and similar arch dependent kprobe handers checks pre_handler result and exit without enabling preemption if the result is !0. After removing the jprobe, Kprobes does not need to keep preempt disabled even if user handler returns !0 anymore. But since the function override handler in error-inject and bpf is also returns !0 if it overrides a function, to balancing the preempt count, it enables preemption and reset current kprobe by itself. That is a bad design that is very buggy. This fixes such unbalanced preempt-count and current_kprobes setting in kprobes, bpf and error-inject. Note: for powerpc and x86, this removes all preempt_disable from kprobe_ftrace_handler because ftrace callbacks are called under preempt disabled. Signed-off-by: Masami Hiramatsu <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Acked-by: Naveen N. Rao <[email protected]> Cc: Alexei Starovoitov <[email protected]> Cc: Ananth N Mavinakayanahalli <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: David S. Miller <[email protected]> Cc: Fenghua Yu <[email protected]> Cc: Heiko Carstens <[email protected]> Cc: James Hogan <[email protected]> Cc: Josef Bacik <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Rich Felker <[email protected]> Cc: Russell King <[email protected]> Cc: Steven Rostedt <[email protected]> Cc: Tony Luck <[email protected]> Cc: Vineet Gupta <[email protected]> Cc: Will Deacon <[email protected]> Cc: Yoshinori Sato <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: https://lore.kernel.org/lkml/152942494574.15209.12323837825873032258.stgit@devbox Signed-off-by: Ingo Molnar <[email protected]>
2018-06-21MIPS/kprobes: Don't call the ->break_handler() in MIPS kprobes codeMasami Hiramatsu1-14/+7
Don't call the ->break_handler() from the MIPS kprobes code, because it was only used by jprobes which got removed. Signed-off-by: Masami Hiramatsu <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Cc: Ananth N Mavinakayanahalli <[email protected]> Cc: Andrew Morton <[email protected]> Cc: James Hogan <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Steven Rostedt <[email protected]> Cc: [email protected] Cc: [email protected] Link: https://lore.kernel.org/lkml/152942482953.15209.843924518200700137.stgit@devbox Signed-off-by: Ingo Molnar <[email protected]>
2018-06-21MIPS/kprobes: Remove jprobe implementationMasami Hiramatsu2-58/+0
Remove arch dependent setjump/longjump functions and unused fields in kprobe_ctlblk for jprobes from arch/mips. Signed-off-by: Masami Hiramatsu <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Cc: Ananth N Mavinakayanahalli <[email protected]> Cc: Andrew Morton <[email protected]> Cc: James Hogan <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Steven Rostedt <[email protected]> Cc: [email protected] Cc: [email protected] Link: https://lore.kernel.org/lkml/152942451058.15209.3459785416221980965.stgit@devbox Signed-off-by: Ingo Molnar <[email protected]>
2018-06-20sched/swait: Rename to exclusivePeter Zijlstra1-2/+2
Since swait basically implemented exclusive waits only, make sure the API reflects that. $ git grep -l -e "\<swake_up\>" -e "\<swait_event[^ (]*" -e "\<prepare_to_swait\>" | while read file; do sed -i -e 's/\<swake_up\>/&_one/g' -e 's/\<swait_event[^ (]*/&_exclusive/g' -e 's/\<prepare_to_swait\>/&_exclusive/g' $file; done With a few manual touch-ups. Suggested-by: Linus Torvalds <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: Linus Torvalds <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected]
Powered by cgit, Gruvboxed by Blaster4385.