| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
A proper clock driver for ralink SoCs has been added. This driver is also
a reset provider for the SoC. Hence there is no need to have reset related
code in 'arch/mips/ralink' folder anymore. The only code that remains is
the one related with mips_reboot_setup where a PCI reset is performed.
We maintain this because I cannot test old ralink board with PCI to be
sure all works if we remove also this code.
Signed-off-by: Sergio Paracuellos <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>
|
|
Reset lines with indices smaller than 8 are currently considered invalid
by the rt2880-reset reset controller.
The MT7621 SoC uses a number of these low reset lines. The DTS defines
reset lines "hsdma", "fe", and "mcm" with respective values 5, 6, and 2.
As a result of the above restriction, these resets cannot be asserted or
de-asserted by the reset controller. In cases where the bootloader does
not de-assert these lines, this results in e.g. the MT7621's internal
switch staying in reset.
Change the reset controller to only ignore the system reset, so all
reset lines with index greater than 0 are considered valid.
Signed-off-by: Sander Vanheule <[email protected]>
Acked-by: John Crispin <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>
|
|
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Enrico Weigelt <[email protected]>
Reviewed-by: Kate Stewart <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
ralink_halt() does nothing that machine_halt() doesn't already do, so it
adds no value.
It actually causes incorrect behaviour due to the "unreachable()" at the
end. This tells the compiler that the end of the function will never be
reached, which isn't true. The compiler responds by not adding a
'return' instruction, so control simply moves on to whatever bytes come
afterwards in memory. In my tested, that was the ralink_restart()
function. This means that an attempt to 'halt' the machine would
actually cause a reboot.
So remove ralink_halt() so that a 'halt' really does halt.
Fixes: c06e836ada59 ("MIPS: ralink: adds reset code")
Signed-off-by: NeilBrown <[email protected]>
Cc: John Crispin <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: [email protected]
Cc: <[email protected]> # 3.9+
Patchwork: https://patchwork.linux-mips.org/patch/18851/
Signed-off-by: James Hogan <[email protected]>
|
|
The old address is no longer valid. Use the my new one instead.
Signed-off-by: John Crispin <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13201/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The reset_ops structure is never modified. Make it const.
Signed-off-by: Philipp Zabel <[email protected]>
Acked-by: John Crispin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12618/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Some pcie cards have problems after a reboot without this.
Signed-off-by: John Crispin <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11446/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Setting pm_power_off is apprently wrong and makes drivers such as
gpio-poweroff not work.
Signed-off-by: John Crispin <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11445/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Add a helper for reseting different devices on the SoC.
Signed-off-by: John Crispin <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5804/
Patchwork: https://patchwork.linux-mips.org/patch/5797/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Resetting these SoCs requires no real magic. The code is straight forward.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/4891/
|