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2007-07-10[MIPS] Transform old-style macros to newer "__noreturn"Robert P. J. Day3-4/+4
Convert old/obsolete NORET_TYPE and ATTRIB_NORET macros to use the newer standard of "__noreturn" as defined in compiler-gcc.h. Signed-off-by: Robert P. J. Day <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-07-10[MIPS] SMTC: Use current_cpu_data instead of cpu_data[smp_processor_id]Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <[email protected]>
2007-07-09sched: zap the migration init / cache-hot balancing codeIngo Molnar1-11/+0
the SMP load-balancer uses the boot-time migration-cost estimation code to attempt to improve the quality of balancing. The reason for this code is that the discrete priority queues do not preserve the order of scheduling accurately, so the load-balancer skips tasks that were running on a CPU 'recently'. this code is fundamental fragile: the boot-time migration cost detector doesnt really work on systems that had large L3 caches, it caused boot delays on large systems and the whole cache-hot concept made the balancing code pretty undeterministic as well. (and hey, i wrote most of it, so i can say it out loud that it sucks ;-) under CFS the same purpose of cache affinity can be achieved without any special cache-hot special-case: tasks are sorted in the 'timeline' tree and the SMP balancer picks tasks from the left side of the tree, thus the most cache-cold task is balanced automatically. Signed-off-by: Ingo Molnar <[email protected]>
2007-07-06[MIPS] Fix scheduling latency issue on 24K, 34K and 74K coresRalf Baechle1-2/+13
The idle loop goes to sleep using the WAIT instruction if !need_resched(). This has is suffering from from a race condition that if if just after need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but we've just completed the test so go to sleep anyway. This would be trivial to fix by just disabling interrupts during that sequence as in: local_irq_disable(); if (!need_resched()) __asm__("wait"); local_irq_enable(); but the processor architecture leaves it undefined if a processor calling WAIT with interrupts disabled will ever restart its pipeline and indeed some processors have made use of the freedom provided by the architecture definition. This has been resolved and the Config7.WII bit indicates that the use of WAIT is safe on 24K, 24KE and 34K cores. It also is safe on 74K starting revision 2.1.0 so enable the use of WAIT with interrupts disabled for 74K based on a c0_prid of at least that. Signed-off-by: Ralf Baechle <[email protected]>
2007-07-06[MIPS] Fix timer/performance interrupt detectionChris Dearman1-4/+4
Signed-off-by: Chris Dearman <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-07-06[MIPS] AP/SP: Avoid triggering the 34K E125 performance issueRalf Baechle1-4/+0
C0_status doesn't need to be initialized at this point anyway; the register will be initialized later. Signed-off-by: Ralf Baechle <[email protected]>
2007-07-04[MIPS] VSMP: Fix initialization ordering bug.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <[email protected]>
2007-06-26[MIPS] Count timer interrupts correctly.Chris Dearman1-1/+1
Signed-off-by: Chris Dearman <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-06-26[MIPS] use compat_siginfo in rt_sigframe_n32Pavel Kiryukhin2-65/+3
Signed-off-by: Pavel Kiryukhin <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-06-26[MIPS] 20K: Handle WAIT related bugs according to errata informationRalf Baechle1-1/+11
We used to avoid the WAIT entirely on the 20K but really only need to do this on early revs of the 20K. Without this a 20K was a bit of a power hog. Well, in the lower power power hog category ;-) Signed-off-by: Ralf Baechle <[email protected]>
2007-06-20[MIPS] Don't drag a platform specific header into generic arch code.Ralf Baechle3-10/+29
For some platforms it's definitions may conflict. So that's the one-liner. The rest is 10 square kilometers of collateral damage fixup this include used to paper over. Signed-off-by: Ralf Baechle <[email protected]>
2007-06-14[MIPS] Separate performance counter interruptsChris Dearman2-19/+37
Support for performance counter overflow interrupt that is on a separate interrupt from the timer. Signed-off-by: Chris Dearman <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-06-11[MIPS] Fix modpost warnings by making start_secondary __cpuinitRalf Baechle1-1/+1
WARNING: arch/mips/kernel/built-in.o(.text+0x9a58): Section mismatch: reference to .init.text:cpu_report (between 'start_secondary' and 'smp_prepare_boot_cpu') WARNING: arch/mips/kernel/built-in.o(.text+0x9a60): Section mismatch: reference to .init.text:per_cpu_trap_init (between 'start_secondary' and 'smp_prepare_boot_cpu') WARNING: arch/mips/kernel/built-in.o(.text+0x9adc): Section mismatch: reference to .init.text:cpu_probe (between 'start_secondary' and 'smp_prepare_boot_cpu') mipsel-linux-objcopy -S -O srec --remove-section=.reginfo --remove-section=.mdebug --remove-section=.comment --remove-section=.note --remove-section=.pdr --remove-section=.options --remove-section=.MIPS.options vmlinux arch/mips/boot/vmlinux.srec Signed-off-by: Ralf Baechle <[email protected]>
2007-06-11[MIPS] SMTC: The MT ASE requires to initialize c0_pagemask and c0_wired.Ralf Baechle1-0/+7
Signed-off-by: Ralf Baechle <[email protected]>
2007-06-11[MIPS] SMTC: Don't continue in set_vi_srs_handler on detected bad arguments.Ralf Baechle1-2/+3
Signed-off-by: Ralf Baechle <[email protected]>
2007-06-11[MIPS] SMTC: Fix warning.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <[email protected]>
2007-06-11[MIPS] Wire up utimensat, signalfd, timerfd, eventfdAtsushi Nemoto4-1/+17
Signed-off-by: Atsushi Nemoto <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-06-11[MIPS] Always install the DSP exception handler.Chris Dearman1-2/+1
Some non-DSP enabled cores 24K / 34K can generate a DSP exception where they are actually expected to produce a reserved instruction exception. Signed-off-by: Chris Dearman <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-06-11[MIPS] SMTC: Don't set and restore irqregs ptr from self_ipi.Ralf Baechle1-3/+0
This did corrupt register s0 which the caller of self_ipi expects to be unchanged. This is a kernel bug which will only be triggered with the compilers which compile __smtc_ipi_replay to use s0 across the invocation of self_ipi. Gcc 4.1.2 does this, for example. Signed-off-by: Ralf Baechle <[email protected]>
2007-06-06[MIPS] Fix warning by moving do_default_vi into CONFIG_CPU_MIPSR2_SRSAtsushi Nemoto1-6/+6
This fixes the warning: arch/mips/kernel/traps.c:931: warning: 'do_default_vi' defined but not used Signed-off-by: Atsushi Nemoto <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-06-06[MIPS] Fix some system calls with long long argumentsAtsushi Nemoto3-2/+12
* O32 fadvise64() pass long long arguments by register pairs. Add sys32 version for 64 bit kernel. * N32 readahead() can pass a long long argument by one register. No need to use sys32_readahead. Signed-off-by: Atsushi Nemoto <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-06-06[MIPS] Remove duplicate fpu enable hazard code.Chris Dearman1-1/+1
Use common code from hazards.h instead. Signed-off-by: Chris Dearman <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-05-21Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixLinus Torvalds1-2/+2
* git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fix: mm/slab: fix section mismatch warning mm: fix section mismatch warnings init/main: use __init_refok to fix section mismatch kbuild: introduce __init_refok/__initdata_refok to supress section mismatch warnings all-archs: consolidate .data section definition in asm-generic all-archs: consolidate .text section definition in asm-generic kbuild: add "Section mismatch" warning whitelist for powerpc kbuild: make better section mismatch reports on i386, arm and mips kbuild: make modpost section warnings clearer kconfig: search harder for curses library in check-lxdialog.sh kbuild: include limits.h in sumversion.c for PATH_MAX powerpc: Fix the MODALIAS generation in modpost for of devices
2007-05-21Detach sched.h from mm.hAlexey Dobriyan1-1/+1
First thing mm.h does is including sched.h solely for can_do_mlock() inline function which has "current" dereference inside. By dealing with can_do_mlock() mm.h can be detached from sched.h which is good. See below, why. This patch a) removes unconditional inclusion of sched.h from mm.h b) makes can_do_mlock() normal function in mm/mlock.c c) exports can_do_mlock() to not break compilation d) adds sched.h inclusions back to files that were getting it indirectly. e) adds less bloated headers to some files (asm/signal.h, jiffies.h) that were getting them indirectly Net result is: a) mm.h users would get less code to open, read, preprocess, parse, ... if they don't need sched.h b) sched.h stops being dependency for significant number of files: on x86_64 allmodconfig touching sched.h results in recompile of 4083 files, after patch it's only 3744 (-8.3%). Cross-compile tested on all arm defconfigs, all mips defconfigs, all powerpc defconfigs, alpha alpha-up arm i386 i386-up i386-defconfig i386-allnoconfig ia64 ia64-up m68k mips parisc parisc-up powerpc powerpc-up s390 s390-up sparc sparc-up sparc64 sparc64-up um-x86_64 x86_64 x86_64-up x86_64-defconfig x86_64-allnoconfig as well as my two usual configs. Signed-off-by: Alexey Dobriyan <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-05-19all-archs: consolidate .data section definition in asm-genericSam Ravnborg1-1/+1
With this consolidation we can now modify the .data section definition in one spot for all archs. Signed-off-by: Sam Ravnborg <[email protected]>
2007-05-19all-archs: consolidate .text section definition in asm-genericSam Ravnborg1-1/+1
Move definition of .text section to asm-generic. Signed-off-by: Sam Ravnborg <[email protected]>
2007-05-11[MIPS] Drop __devinit tag from allocate_irqno() and free_irqno()Atsushi Nemoto1-2/+2
This fix these warnings: WARNING: arch/mips/kernel/built-in.o - Section mismatch: reference to .init.text:free_irqno from __ksymtab_gpl between '__ksymtab_free_irqno' (at offset 0x0) and '__ksymtab_allocate_irqno' WARNING: arch/mips/kernel/built-in.o - Section mismatch: reference to .init.text:allocate_irqno from __ksymtab_gpl after '__ksymtab_allocate_irqno' (at offset 0x8) Signed-off-by: Atsushi Nemoto <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-05-11[MIPS] clocksource: use CLOCKSOURCE_MASK() macroFranck Bui-Huu1-1/+1
Signed-off-by: Franck Bui-Huu <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-05-11[MIPS] MT: Reenable EIC support and add support for SOCit SC.Chris Dearman1-5/+5
Signed-off-by: Chris Dearman <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-05-11[MIPS] Define and use vi_handler_t for vectored interrupt handlers.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <[email protected]>
2007-05-11[MIPS] Fix do_default_vi to use get_irq_regs to get the irq register ptr.Ralf Baechle1-2/+2
Harmless bug because this function is only called in case of another kernel bug anyway which is also why this was missed for so long. Signed-off-by: Ralf Baechle <[email protected]>
2007-05-11[MIPS] Make do_default_vi staticRalf Baechle1-1/+1
Signed-off-by: Ralf Baechle <[email protected]>
2007-05-11[MIPS] early_printk: allow the early console to run earlierFranck Bui-Huu1-0/+6
Signed-off-by: Franck Bui-Huu <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-05-11[MIPS] early_printk: use init sectionFranck Bui-Huu1-2/+3
Signed-off-by: Franck Bui-Huu <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-05-09rename thread_info to stackRoman Zippel1-1/+1
This finally renames the thread_info field in task structure to stack, so that the assumptions about this field are gone and archs have more freedom about placing the thread_info structure. Nonbroken archs which have a proper thread pointer can do the access to both current thread and task structure via a single pointer. It'll allow for a few more cleanups of the fork code, from which e.g. ia64 could benefit. Signed-off-by: Roman Zippel <[email protected]> [[email protected]: build fix] Cc: Richard Henderson <[email protected]> Cc: Ivan Kokshaysky <[email protected]> Cc: Russell King <[email protected]> Cc: Ian Molton <[email protected]> Cc: Haavard Skinnemoen <[email protected]> Cc: Mikael Starvik <[email protected]> Cc: David Howells <[email protected]> Cc: Yoshinori Sato <[email protected]> Cc: "Luck, Tony" <[email protected]> Cc: Hirokazu Takata <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Roman Zippel <[email protected]> Cc: Greg Ungerer <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Heiko Carstens <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Paul Mundt <[email protected]> Cc: Kazumoto Kojima <[email protected]> Cc: Richard Curnow <[email protected]> Cc: William Lee Irwin III <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Jeff Dike <[email protected]> Cc: Paolo 'Blaisorblade' Giarrusso <[email protected]> Cc: Miles Bader <[email protected]> Cc: Andi Kleen <[email protected]> Cc: Chris Zankel <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-05-09wrap access to thread_infoRoman Zippel1-1/+1
Recently a few direct accesses to the thread_info in the task structure snuck back, so this wraps them with the appropriate wrapper. Signed-off-by: Roman Zippel <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-05-08header cleaning: don't include smp_lock.h when not usedRandy Dunlap10-10/+0
Remove includes of <linux/smp_lock.h> where it is not used/needed. Suggested by Al Viro. Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc, sparc64, and arm (all 59 defconfigs). Signed-off-by: Randy Dunlap <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-05-08Fixes and cleanups for earlyprintk aka boot consoleGerd Hoffmann1-5/+0
The console subsystem already has an idea of a boot console, using the CON_BOOT flag. The implementation has some flaws though. The major problem is that presence of a boot console makes register_console() ignore any other console devices (unless explicitly specified on the kernel command line). This patch fixes the console selection code to *not* consider a boot console a full-featured one, so the first non-boot console registering will become the default console instead. This way the unregister call for the boot console in the register_console() function actually triggers and the handover from the boot console to the real console device works smoothly. Added a printk for the handover, so you know which console device the output goes to when the boot console stops printing messages. The disable_early_printk() call is obsolete with that patch, explicitly disabling the early console isn't needed any more as it works automagically with that patch. I've walked through the tree, dropped all disable_early_printk() instances found below arch/ and tagged the consoles with CON_BOOT if needed. The code is tested on x86, sh (thanks to Paul) and mips (thanks to Ralf). Changes to last version: Rediffed against -rc3, adapted to mips cleanups by Ralf, fixed "udbg-immortal" cmd line arg on powerpc. Signed-off-by: Gerd Hoffmann <[email protected]> Acked-by: Paul Mundt <[email protected]> Acked-by: Ralf Baechle <[email protected]> Cc: Andi Kleen <[email protected]> Cc: Alan Cox <[email protected]> Cc: Richard Henderson <[email protected]> Cc: Ivan Kokshaysky <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Jeremy Fitzhardinge <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-05-08simplify the stacktrace codeChristoph Hellwig1-16/+6
Simplify the stacktrace code: - remove the unused task argument to save_stack_trace, it's always current - remove the all_contexts flag, it's alwasy 0 Signed-off-by: Christoph Hellwig <[email protected]> Cc: Paul Mundt <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Andi Kleen <[email protected]> Cc: Akinobu Mita <[email protected]> Acked-by: Ingo Molnar <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-05-02[PATCH] x86: Allow percpu variables to be page-alignedJeremy Fitzhardinge1-1/+1
Let's allow page-alignment in general for per-cpu data (wanted by Xen, and Ingo suggested KVM as well). Because larger alignments can use more room, we increase the max per-cpu memory to 64k rather than 32k: it's getting a little tight. Signed-off-by: Rusty Russell <[email protected]> Signed-off-by: Jeremy Fitzhardinge <[email protected]> Signed-off-by: Andi Kleen <[email protected]> Acked-by: Ingo Molnar <[email protected]> Cc: Andi Kleen <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
2007-04-27[MIPS] Remove unused _THREAD_SIZE_ORDER from asm-offset.c.Ralf Baechle1-1/+0
Signed-off-by: Ralf Baechle <[email protected]>
2007-04-27[MIPS] Register PCI host bridge resource earlierThomas Bogendoerfer1-2/+2
PCI based SNI RM machines have their EISA bus behind an Intel PCI/EISA bridge. So the PCI IO range must start at 0x0000. Changing that will break the PCI bus, because i8259.c already has registered it's IO addresses before the PCI bus gets initialized. Below is a patch, which will register the PCI host bridge resources inside register_pci_controller(). It also changes i8259.c to use insert_region(), because request_resource() will fail, if the IO space of the PIT hanging of the PCI host bridge (maybe passing the resource parent to init_i8259_irqs() is a cleaner fix for that). Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-04-27[MIPS] Fix AP/SP to work in the reality of modern kernels.Ralf Baechle2-7/+5
Signed-off-by: Ralf Baechle <[email protected]>
2007-04-20[MIPS] Fix BUG(), BUG_ON() handlingAtsushi Nemoto1-2/+2
With commit 63dc68a8cf60cb110b147dab1704d990808b39e2, kernel can not handle BUG() and BUG_ON() properly since get_user() returns false for kernel code. Use __get_user() to skip unnecessary access_ok(). This patch also make BRK_BUG code encoded in the TNE instruction. Signed-off-by: Atsushi Nemoto <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-04-20[MIPS] Retry {save,restore}_fp_context if failed in atomic context.Atsushi Nemoto3-18/+95
The save_fp_context()/restore_fp_context() might sleep on accessing user stack and therefore might lose FPU ownership in middle of them. If these function failed due to "in_atomic" test in do_page_fault, touch the sigcontext area in non-atomic context and retry these save/restore operation. This is a replacement of a (broken) fix which was titled "Allow CpU exception in kernel partially". Signed-off-by: Atsushi Nemoto <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-04-20[MIPS] Disallow CpU exception in kernel again.Atsushi Nemoto5-40/+21
The commit 4d40bff7110e9e1a97ff8c01bdd6350e9867cc10 ("Allow CpU exception in kernel partially") was broken. The commit was to fix theoretical problem but broke usual case. Revert it for now. Signed-off-by: Atsushi Nemoto <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2007-03-29[MIPS] SMTC: Fix recursion in instant IPI replay code.Ralf Baechle1-7/+33
local_irq_restore -> raw_local_irq_restore -> irq_restore_epilog -> smtc_ipi_replay -> smtc_ipi_dq -> spin_unlock_irqrestore -> _spin_unlock_irqrestore -> local_irq_restore The recursion does abort when there is no more IPI queued for a CPU, so this isn't usually fatal which is why we got away with this for so long until this was discovered by code inspection. Signed-off-by: Ralf Baechle <[email protected]>
2007-03-29[MIPS] SMTC: Fix false trigger of debug code on single VPE.Ralf Baechle1-5/+15
Make smtc_setup_irq() update the list of interrupts which need to be watched by the debug code itself. Also there is no need to initialize the IPI swint when running with a single VPE, so don't initialize it. Signed-off-by: Ralf Baechle <[email protected]>
2007-03-29[MIPS] SMTC: irq_{enter,leave} and kstats keeping for relayed timer ints.Ralf Baechle1-0/+5
Signed-off-by: Ralf Baechle <[email protected]>
2007-03-29[MIPS] lockdep: Deal with interrupt disable hazard in TRACE_IRQFLAGSChris Dearman1-0/+31
Between the mtc0 or di instruction that disables interrupts and the following hazard barrier a processor may still take interrupts. If an interrupt is taken after interrupts are disabled but before the state is updated it will appear to restore_all that it is incorrectly returning with interrupts disabled. Signed-off-by: Chris Dearman <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
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