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This matters to any sort of device that is wired to one of the CPU
interrupt pins on an SMP system. Typically the scenario is most easily
triggered with the count/compare timer interrupt where the same interrupt
number and thus irq_desc is used on each processor.
CPU A CPU B
do_IRQ()
generic_handle_irq()
handle_level_irq()
spin_lock(desc_lock)
set IRQ_INPROGRESS
spin_unlock(desc_lock)
do_IRQ()
generic_handle_irq()
handle_level_irq()
spin_lock(desc_lock)
IRQ_INPROGRESS set => bail out
spin_lock(desc_lock)
clear IRQ_INPROGRESS
spin_unlock(desc_lock)
In case of the cp0 compare interrupt this means the interrupt will be
acked and not handled or re-armed on CPU b, so there won't be any timer
interrupt until the count register wraps around.
With kernels 2.6.20 ... 2.6.23 we usually were lucky that things were just
working right on VSMP because the count registers are synchronized on
bootup so it takes something that disables interrupts for a long time on
one processor to trigger this one.
For scenarios where an interrupt is multicasted or broadcasted over several
CPUs the existing code was safe and the fix will break it. There is no
way to know in the interrupt controller code because it is abstracted from
the platform code. I think we do not have such a setup currently, so this
should be ok.
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Adds a JR.HB after halting a TC, to ensure that the TC has really halted.
only modifies the TCSTATUS register when the TC is safely halted.
Signed-off-by: Ralf Baechle <[email protected]>
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We have no guarantee by the generic time code that the timer is stopped
when the ->next_event method is called. Modifying the Timer Initial Count
register while the timer is enabled has UNPREDICTABLE effect according to
the BCM1250/BCM1125/BCM1125H User Manual. So stop the timer before
reprogramming.
This is a paranoia fix; no ill effects have been observed previously.
Signed-off-by: Ralf Baechle <[email protected]>
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For the old minimum of a single tick a value of zero would be programmed
into the init value register which in the BCM1250/BCM1125/BCM1125H User
Manual in the Timer Special Cases section is documented to have
UNPREDICTABLE effect.
Observable sympthoms of this bug were hangs of several seconds on the
console during bootup and later if both dyntick and highres timer options
were activated.
In theory contiguous mode of the timers is also affected but in an act of
hopeless lack of realism I'll assume nobody will ever configure a KERNEL
for HZ > 500kHz but if so I leave that to evolution to sort out.
Signed-off-by: Ralf Baechle <[email protected]>
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Shadow register support would not possibly have worked on multicore
systems. The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.
SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code. So fix
the allocator by ditching it. Move the remaining CPU probe bits into
the generic CPU probe.
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Or strange things will happen.
Signed-off-by: Ralf Baechle <[email protected]>
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[[email protected]: coding-style cleanups]
Signed-off-by: Roel Kluin <[email protected]>
Cc: Ralf Baechle <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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The Jazz machines have to use the PIT timer for dyntick and highresolution
kernels. This may break because currently just like i386 used to do MIPS
uses two separate spinlocks in the actual PIT code and the PC speaker
code. So switch to do it the same that x86 currently does PIT locking.
Signed-off-by: Ralf Baechle <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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* Do not include unnecessary headers.
* Do not mention time.README.
* Do not mention mips_timer_ack.
* Make clocksource_mips static. It is now dedicated to c0_timer.
* Initialize clocksource_mips.read statically.
* Remove null_hpt_read.
* Remove an argument of plat_timer_setup. It is just a placeholder.
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Franck Bui-Huu <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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A comment on ptrace_getregs() states "Registers are sign extended to
fill the available space." but it is not true. Fix code to match the
comment. Also fix casts on each caller to get rid of some warnings.
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Mmap with MAP_FIXED was not validating the addr and len parameters. This
leads to the failure of GCC's gcc.c-torture/execute/loop-2[fg].c testcases
when using the o32 ABI on a 64 bit kernel.
These testcases try to mmap 65536 bytes at 0x7fff8000 and then access all
the memory. In 2.6.18 and 2.6.23.1 (and likely other versions as well)
the kernel maps the requested memory, but since half of it is above
0x80000000 a SIGBUS is generated when it is accessed.
This patch moves the len validation above the MAP_FIXED processing so that
it is always validated. It also adds validation to the addr parameter for
MAP_FIXED mappings.
Signed-off-by: David Daney <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Based on original patch by Roel Kluin <[email protected]>.
Signed-off-by: Ralf Baechle <[email protected]>
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plat_timer_setup is no longer getting called.
Signed-off-by: Ralf Baechle <[email protected]>
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Try increasingly longer time periods starting of at 0x10 cycles. This
should be fast on hardware and work nicely with emulators.
Signed-off-by: Ralf Baechle <[email protected]>
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The expression "(long)(read_c0_count() - cnt)" can never be a negative
value on 64-bit kernel. Cast to "int" before comparison.
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Convert jmr3927_clock_event_device to more generic
txx9tmr_clock_event_device which supports one-shot mode. The
txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer
interrupt was not available.
Convert jmr3927_hpt_read to txx9_clocksource driver which does not
depends jiffies anymore. The txx9_clocksource itself can be used for
TX49, but normally TX49 uses higher precision clocksource_mips.
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Yoichi Yuasa <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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This subtle difference makes ELF overlays work.
Signed-off-by: Ralf Baechle <[email protected]>
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clockevent_delta2ns() use the shift and mult value, so
clockevent_set_clock() should be called first.
Pointed out by Atsushi Nemoto.
Signed-off-by: Yoichi Yuasa <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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set_next_event() and set_mode() are always called with interrupt disabled.
irqsave and irqrestore are not necessary for spinlock.
Pointed out by Atsushi Nemoto.
Signed-off-by: Yoichi Yuasa <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Modify the SMTC initialization code to allow boot-time specification not
only of how many VPEs and TCs to use, but also how many TCs out of the
allowed pool are to be bound to VPE 0. The new boot option is "vpe0tcs=N",
where N is an integer. Using it in combination with the existing options
allows arbitrary assignments across the 2 VPEs of a 34K. e.g. "maxtcs=3
vpe0tcs=1" forces VPE0 to have 1 TC, while VPE1 has 2, and "maxtcs=4
vpe0tcs=3" forces VPE0 to have 3 TCs, while VPE1 gets 1. If no vpe0tcs
option is specified, the traditional algorithm of evenly dividing TCs
between available VPEs, with the odd "slop" going to VPE0, is retained.
The reason for doing this is to allow a finer balancing of TCs which can
handle I/O interrupts on Malta (those on VPE 0) and those which cannot.
Signed-off-by: Ralf Baechle <[email protected]>
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Use write_c0_compare(read_c0_count()) to clear interrupt.
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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And make use of it for Cobalt. A few others such as the Malta could make
use of it as well.
Signed-off-by: Yoichi Yuasa <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Fix the various misspellings of "system", controller", "interrupt" and
"[un]necessary".
Signed-off-by: Robert P. J. Day <[email protected]>
Signed-off-by: Adrian Bunk <[email protected]>
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* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Delete totally outdated Documentation/mips/time.README
[MIPS] Kill duplicated setup_irq() for cp0 timer
[MIPS] Sibyte: Finish conversion to modern time APIs.
[MIPS] time: Helpers to compute clocksource/event shift and mult values.
[MIPS] SMTC: Build fix.
[MIPS] time: Delete dead code.
[MIPS] MIPSsim: Strip defconfig file to the bones.
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One of the easiest things to isolate is the pid printed in kernel log.
There was a patch, that made this for arch-independent code, this one makes
so for arch/xxx files.
It took some time to cross-compile it, but hopefully these are all the
printks in arch code.
Signed-off-by: Alexey Dobriyan <[email protected]>
Signed-off-by: Pavel Emelyanov <[email protected]>
Cc: <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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The set of functions process_session, task_session, process_group and
task_pgrp is confusing, as the names can be mixed with each other when looking
at the code for a long time.
The proposals are to
* equip the functions that return the integer with _nr suffix to
represent that fact,
* and to make all functions work with task (not process) by making
the common prefix of the same name.
For monotony the routines signal_session() and set_signal_session() are
replaced with task_session_nr() and set_task_session(), especially since they
are only used with the explicit task->signal dereference.
Signed-off-by: Pavel Emelianov <[email protected]>
Acked-by: Serge E. Hallyn <[email protected]>
Cc: Kirill Korotaev <[email protected]>
Cc: "Eric W. Biederman" <[email protected]>
Cc: Cedric Le Goater <[email protected]>
Cc: Herbert Poetzl <[email protected]>
Cc: Sukadev Bhattiprolu <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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cycles_per_jiffy was only ever getting assigned and the function pointer
not being called anymore and mips_timer_ack had gotten similarly stale. I
leave the remaining assignments unfixed as a lighthouse pointing platform
maintainers to what needs a rewrite. These changes make null_timer_ack()
unreferenced, so delete that too.
Signed-off-by: Ralf Baechle <[email protected]>
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Always jump to the place where the kernel is linked to. This helps where
the bootloaders/proms ignores the start address inside the ELF header.
Signed-off-by: Thomas Bogendoerfer <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Some processors offer the option of using the interrupt on which
normally the count / compare interrupt would be signaled as a normal
interupt pin. Previously this required some ugly hackery for each
system which is much easier done by a quick and simple probe.
Signed-off-by: Ralf Baechle <[email protected]>
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Userland, including the C library and the dynamic linker, is keen to use
the SYNC instruction, even for "generic" MIPS I binaries these days.
Which makes it less than useful on MIPS I processors.
This change adds the emulation, but as our do_ri() infrastructure was not
really prepared to take yet another instruction, I have rewritten it and
its callees slightly as follows.
Now there is only a single place a possible signal is thrown from. The
place is at the end of do_ri(). The instruction word is fetched in
do_ri() and passed down to handlers. The handlers are called in sequence
and return a result that lets the caller decide upon further processing.
If the result is positive, then the handler has picked the instruction,
but a signal should be thrown and the result is the signal number. If the
result is zero, then the handler has successfully simulated the
instruction. If the result is negative, then the handler did not handle
the instruction; to make it more obvious the calls do not follow the usual
0/-Exxx result convention they now return -1 instead of -EFAULT.
The calculation of the return EPC is now at the beginning. The reason is
it is easier to handle it there as emulation callees may modify a register
and an instruction may be located in delay slot of a branch whose result
depends on the register. It has to be undone if a signal is to be raised,
but it is not a problem as this is the slow-path case, and both actions
are done in single places now rather than the former being scattered
through emulation handlers.
The part of do_cpu() being covered follows the changes to do_ri().
Signed-off-by: Maciej W. Rozycki <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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MODPOST vmlinux.o
WARNING: vmlinux.o(.text+0x478): Section mismatch: reference to .init.text:start_kernel (between '_stext' and 'run_init_process')
Signed-off-by: Ralf Baechle <[email protected]>
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All asm/ipc.h files do only #include <asm-generic/ipc.h>.
This patch therefore removes all include/asm-*/ipc.h files and moves the
contents of include/asm-generic/ipc.h to include/linux/ipc.h.
Signed-off-by: Adrian Bunk <[email protected]>
Cc: <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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For some time /proc/sys/kernel/core_pattern has been able to set its output
destination as a pipe, allowing a user space helper to receive and
intellegently process a core. This infrastructure however has some
shortcommings which can be enhanced. Specifically:
1) The coredump code in the kernel should ignore RLIMIT_CORE limitation
when core_pattern is a pipe, since file system resources are not being
consumed in this case, unless the user application wishes to save the core,
at which point the app is restricted by usual file system limits and
restrictions.
2) The core_pattern code should be able to parse and pass options to the
user space helper as an argv array. The real core limit of the uid of the
crashing proces should also be passable to the user space helper (since it
is overridden to zero when called).
3) Some miscellaneous bugs need to be cleaned up (specifically the
recognition of a recursive core dump, should the user mode helper itself
crash. Also, the core dump code in the kernel should not wait for the user
mode helper to exit, since the same context is responsible for writing to
the pipe, and a read of the pipe by the user mode helper will result in a
deadlock.
This patch:
Remove the check of RLIMIT_CORE if core_pattern is a pipe. In the event that
core_pattern is a pipe, the entire core will be fed to the user mode helper.
Signed-off-by: Neil Horman <[email protected]>
Cc: <[email protected]>
Cc: <[email protected]>
Cc: Jeremy Fitzhardinge <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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Switch single-linked binfmt formats list to usual list_head's. This leads
to one-liners in register_binfmt() and unregister_binfmt(). The downside
is one pointer more in struct linux_binfmt. This is not a problem, since
the set of registered binfmts on typical box is very small -- (ELF +
something distro enabled for you).
Test-booted, played with executable .txt files, modprobe/rmmod binfmt_misc.
Signed-off-by: Alexey Dobriyan <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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* git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild: (40 commits)
kbuild: introduce ccflags-y, asflags-y and ldflags-y
kbuild: enable 'make CPPFLAGS=...' to add additional options to CPP
kbuild: enable use of AFLAGS and CFLAGS on commandline
kbuild: enable 'make AFLAGS=...' to add additional options to AS
kbuild: fix AFLAGS use in h8300 and m68knommu
kbuild: check for wrong use of CFLAGS
kbuild: enable 'make CFLAGS=...' to add additional options to CC
kbuild: fix up CFLAGS usage
kbuild: make modpost detect unterminated device id lists
kbuild: call export_report from the Makefile
kbuild: move Kai Germaschewski to CREDITS
kconfig/menuconfig: distinguish between selected-by-another options and comments
kconfig: tristate choices with mixed tristate and boolean values
include/linux/Kbuild: remove duplicate entries
kbuild: kill backward compatibility checks
kbuild: kill EXTRA_ARFLAGS
kbuild: fix documentation in makefiles.txt
kbuild: call make once for all targets when O=.. is used
kbuild: pass -g to assembler under CONFIG_DEBUG_INFO
kbuild: update _shipped files for kconfig syntax cleanup
...
Fix up conflicts in arch/um/sys-{x86_64,i386}/Makefile manually.
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* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Increase cp0 compare clockevent min_delta_ns from 0x30 to 0x300.
[MIPS] Cache: Provide more information on cache policy on bootup.
[MIPS] Fix aliasing bug in copy_user_highpage, take 2.
[MIPS] VPE loader: convert from struct class_ device to struct device
[MIPS] MIPSsim: Fix booting from NFS root
[MIPS] Alchemy: Get rid of au1xxx_irq_map_t.
[MIPS] Alchemy: Get rid of au_ffz().
[MIPS] Alchemy: Get rid of au_ffs().
[MIPS] Alchemy: cleanup interrupt code.
[MIPS] Lasat: Fix build by conversion to irq_cpu.c.
[MIPS] Lasat: Add #ifndef ... #endif include warpper to lasatint.h.
[MIPS] IP22: Enable -Werror.
[MIPS] IP22: Fix warning.
[MIPS] IP22: Complain if requesting the front panel irq failed.
[MIPS] vmlinux.lds.S: Handle KPROBES_TEXT.
[MIPS] vmlinux.lds.S: Fix handling of .notes in final link.
[MIPS] vmlinux.lds.S: Remove duplicate comment.
[MIPS] MSP71XX: Add workarounds file.
[MIPS] IP32: Fix build by conversion to irq_cpu.c.
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Extremly low values are of dubious usefulness anyway but in this case
they actually were killing Qemu which simply wasn't able to complete
mips_next_event() within 0x30 100MHz cycles even on fast hosts.
Signed-off-by: Ralf Baechle <[email protected]>
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