aboutsummaryrefslogtreecommitdiff
path: root/arch/mips/kernel/idle.c
AgeCommit message (Collapse)AuthorFilesLines
2014-01-22MIPS: Add support for interAptiv coresLeonid Yegoshin1-0/+1
The interAptiv is a power-efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The interAptiv combines a multi-threading pipeline with a coherence manager to deliver improved computational throughput and power efficiency. The interAptiv can contain one to four MIPS32R3 interAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6163/
2014-01-22MIPS: Add support for the proAptiv coresLeonid Yegoshin1-0/+1
The proAptiv Multiprocessing System is a power efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The proAptiv Multiprocessing System combines a deep pipeline with multi-issue out of order execution for improved computational throughput. The proAptiv Multiprocessing System can contain one to six MIPS32r3 proAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6134/
2013-09-17MIPS: Optimize current_cpu_type() for better code.Ralf Baechle1-1/+2
o Move current_cpu_type() to a separate header file o #ifdefing on supported CPU types lets modern GCC know that certain code in callers may be discarded ideally turning current_cpu_type() into a function returning a constant. o Use current_cpu_type() rather than direct access to struct cpuinfo_mips. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5833/
2013-08-26MIPS: Use r4k_wait for OCTEON3 CPUs.David Daney1-0/+1
Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5636/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-10MIPS: Alchemy: fix wait functionManuel Lauss1-6/+7
Only an interrupt can wake the core from 'wait', enable interrupts locally before executing 'wait'. [ralf@linux-mips.org: This leave the race between an interrupt that's setting TIF_NEED_RESCHEd and entering the WAIT status. but at least it's going to bring Alchemy back from the dead, so I'm going to apply this patch.] Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: Maciej W. Rozycki <macro@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5408/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22MIPS: Idle: Break r4k_wait into two functions and fix it.Ralf Baechle1-0/+6
local_irq_enable() may expand into very different code, so it rather should stay in C. Also this keeps the assembler code size constant which keeps the rollback code simple. So it's best to split r4k_wait into two parts, one C and one assembler. Finally add the local_irq_enable() to r4k_wait to ensure the WAIT instruction in __r4k_wait() will work properly. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22MIPS: Idle: Consolidate all declarations in <asm/idle.h>.Ralf Baechle1-2/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22MIPS: Idle: Don't call local_irq_disable() in cpu_wait() implementations.Ralf Baechle1-3/+0
The generic idle loop has already disabled interrupts so this is redundant. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22MIPS: Idle: Re-enable irqs at the end of r3081, au1k and loongson2 cpu_wait.Ralf Baechle1-0/+2
Without this, the WARN_ON_ONCE(irqs_disabled()); in the idle loop will be triggered. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22MIPS: Idle: Make call of function pointer readable.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22MIPS: Idle: Consistently reformat inline assembler.Ralf Baechle1-18/+21
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22MIPS: Idle: cleaup SMTC idle hook as per Linux coding style.Ralf Baechle1-2/+7
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-22MIPS: Consolidate idle loop / WAIT instruction support in a single file.Ralf Baechle1-0/+232
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Powered by cgit, Gruvboxed by Blaster4385.