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All exceptions must be taken in microMIPS mode, never in classic
MIPS mode or the kernel falls apart. A few NOP instructions are
used to maintain the correct alignment of microMIPS versions of
the exception vectors.
Signed-off-by: Steven J. Hill <[email protected]>
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Add logic needed to do floating point emulation in microMIPS mode.
Signed-off-by: Leonid Yegoshin <[email protected]>
Signed-off-by: Steven J. Hill <Steven. [email protected]>
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The macros did not properly take into account the ISA that
the kernel was being compiled with. A classic MIPS kernel
will have the standard 'uasm_i_##op' macro functions with
'MM_uasm_i_##op' macro functions for the microMIPS version.
A pure microMIPS kernel will have the standard macros with
'CL_uasm_i_##op' macro functions for the classic version.
Signed-off-by: Steven J. Hill <[email protected]>
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Original patch by Ralf Baechle and removed by Harold Koerfgen
with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This
allows for more generic kernels since the size of the ASID
and corresponding masks can be determined at run-time. This
patch is also required for the new Aptiv cores and has been
tested on Malta and Malta Aptiv platforms.
[[email protected]: Added relevant part of fix
https://patchwork.linux-mips.org/patch/5213/]
Signed-off-by: Steven J. Hill <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Remove 'arch/mips/include/asm/mips-boards/prom.h' and get rid of
all inclusions of it by Malta and SEAD-3 platforms.
[[email protected]: Fold in John Crispin <[email protected]>'s "MIPS:
ar7 powertv build"].
[[email protected]: Fold in John Crispin <[email protected]>'s "MIPS:
unbreak powertv build"].
[[email protected]: Test. Build. Your. Fscking. Code. Or...]
Signed-off-by: Steven J. Hill <[email protected]>
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Add parsing of the environment and command line variables passed to
the kernel to the firmware library.
Signed-off-by: Steven J. Hill <[email protected]>
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Add declaration of 'mips_scroll_message' and 'mips_display_message'
to the common generic header file for the MIPS Technologies Inc.
development boards.
Signed-off-by: Steven J. Hill <[email protected]>
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on a ASID wrap.
Signed-off-by: Sanjay Lal <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Both Guest kernel and Guest Userspace execute in UM. The memory map is as follows:
Guest User address space: 0x00000000 -> 0x40000000
Guest Kernel Unmapped: 0x40000000 -> 0x60000000
Guest Kernel Mapped: 0x60000000 -> 0x80000000
- Guest Usermode virtual memory is limited to 1GB.
Signed-off-by: Sanjay Lal <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Sanjay Lal <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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In the Linux kernel traditionally pfns are represented by an unsigned long.
However a few bits of the SGI IP27 platform code that were ported from
IRIX are using pfn_t for historic reasons. This is conflicting with
KVM's use of pfn_t.
Signed-off-by: Ralf Baechle <[email protected]>
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git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
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Populate struct soc_info with the data that describes our RAM window.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5183/
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Populate struct soc_info with the data that describes our RAM window.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5182/
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Populate struct soc_info with the data that describes our RAM window.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5181/
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Populate struct soc_info with the data that describes our RAM window.
As memory detection fails on RT5350 we read the amount of available memory
from the system controller.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5180/
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Add a generic way of detecting the available RAM. This function is based on the
implementation already used by ath79.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5178/
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Add cpu-feature-overrides.h for RT288x, RT305x and RT3883.
Signed-off-by: Gabor Juhos <[email protected]>
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5175/
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Add support code for mt7620 SOC.
The code detects the SoC and registers the clk / pinmux settings.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5177/
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Add support code for rt3883 SOC.
The code detects the SoC and registers the clk / pinmux settings.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5185/
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Add support code for rt2880 SOC.
The code detects the SoC and registers the clk / pinmux settings.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5176/
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Add a few missing defines that are needed to make memory detection work on the
RT5350.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5169/
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Add a few missing defines that are needed to make USB and clock detection work
on the RT3352.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5166/
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Previously this functionality was only available to users of the mips_machine
api. Moving the code to prom.c allows us to also add a OF wrapper.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5164/
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Currently, init_new_context() only for each online CPU, this may cause
memory corruption when CPU hotplug and fork() happens at the same time.
To avoid this, we make init_new_context() cover each possible CPU.
Scenario:
1, CPU#1 is being offline;
2, On CPU#0, do_fork() call dup_mm() and copy a mm_struct to the child;
3, On CPU#0, dup_mm() call init_new_context(), since CPU#1 is offline
and init_new_context() only covers the online CPUs, child has the
same asid as its parent on CPU#1 (however, child's asid should be 0);
4, CPU#1 is being online;
5, Now, if both parent and child run on CPU#1, memory corruption (e.g.
segfault, bus error, etc.) will occur.
Signed-off-by: Huacai Chen <[email protected]>
Acked-by: David Daney <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/4995/
Acked-by: John Crispin <[email protected]>
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This and the next patch resolve memory corruption problems while CPU
hotplug. Without these patches, memory corruption can triggered easily
as below:
On a quad-core MIPS platform, use "spawn" of UnixBench-5.1.3 (http://
code.google.com/p/byte-unixbench/) and a CPU hotplug script like this
(hotplug.sh):
while true; do
echo 0 >/sys/devices/system/cpu/cpu1/online
echo 0 >/sys/devices/system/cpu/cpu2/online
echo 0 >/sys/devices/system/cpu/cpu3/online
sleep 1
echo 1 >/sys/devices/system/cpu/cpu1/online
echo 1 >/sys/devices/system/cpu/cpu2/online
echo 1 >/sys/devices/system/cpu/cpu3/online
sleep 1
done
Run "hotplug.sh" and then run "spawn 10000", spawn will get segfault
after a few minutes.
This patch:
Currently, clear_page()/copy_page() are generated by Micro-assembler
dynamically. But they are unavailable until uasm_resolve_relocs() has
finished because jump labels are illegal before that. Since these
functions are shared by every CPU, we only call build_clear_page()/
build_copy_page() only once at boot time. Without this patch, programs
will get random memory corruption (segmentation fault, bus error, etc.)
while CPU Hotplug (e.g. one CPU is using clear_page() while another is
generating it in cpu_cache_init()).
For similar reasons we modify build_tlb_refill_handler()'s invocation.
V2:
1, Rework the code to make CPU#0 can be online/offline.
2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU
need a per-CPU tlb_refill_handler().
Signed-off-by: Huacai Chen <[email protected]>
Signed-off-by: Hongbing Hu <[email protected]>
Acked-by: David Daney <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/4994/
Acked-by: John Crispin <[email protected]>
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The definitions are not used anywhere else, and merging it will
make adding the new USB definitions for XLPII series easier.
While there, cleanup some whitespace in usb-init.c. There is no
change to logic due to this commit.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5027/
Acked-by: John Crispin <[email protected]>
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Remove unused functions and redundant comments from
arch/mips/include/asm/netlogic/haldefs.h
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5029/
Acked-by: John Crispin <[email protected]>
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Update asm/netlogic/haldefs.h to extend register access functions
nlm_{read,write}_reg64() for 32-bit compilation. When compiled for 32-bit
the functions will read 64 IO registers with interrupts disabled.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5026/
Acked-by: John Crispin <[email protected]>
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The index for a device interrupt in the PIC interrupt routing table
changes for different chips in the XLP family. Avoid using the fixed
entries and derive the index value from the SoC device header.
Add workarounds for some devices which do not report the IRT index
correctly.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5025/
Acked-by: John Crispin <[email protected]>
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Remove the definitions of {read,write}_c0_{eirr,eimr}. These functions
are now unused after the PIC and IRQ code has been updated to use
optimized EIMR/EIRR functions which work on both 32-bit and 64-bit.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5021/
Acked-by: John Crispin <[email protected]>
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Remove the irq save/restore from write_c0_eimr(), as it is always called
with interrupts off.
This allows us to remove workaround in write_c0_eimr() to fix up the
flags used by local_irq_save. This fixup worked on XLR, but will break
when 32-bit support is added to r2 cpus like XLP.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5022/
Acked-by: John Crispin <[email protected]>
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All the header file does is provide the internal structure of clk,
which shouldn't be used by anyone except clk.c itself anyway.
Signed-off-by: Jonas Gorski <[email protected]>
Acked-by: Greg Kroah-Hartman <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5055/
Acked-by: John Crispin <[email protected]>
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BCM6362 support booting from SPI flash and NAND.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5012/
Acked-by: John Crispin <[email protected]>
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The PCIe controller is almost the same as the BCM6328 one, with only
the SERDES register being at a different location.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5011/
Acked-by: John Crispin <[email protected]>
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The SPI controller shares the same register layout as the 6358 one.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5010/
Acked-by: John Crispin <[email protected]>
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Add basic support for detecting and booting the BCM6362.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5009/
Acked-by: John Crispin <[email protected]>
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The REVID is only 8 bit wide.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5007/
Acked-by: John Crispin <[email protected]>
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BCM6338 and BCM6348, and BCM6358 and everything after that share the
same register layout. To not have to redefine them for each new chip
and keep the code size small, only use the definitions for the first
chip with the certain layout.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5006/
Acked-by: John Crispin <[email protected]>
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Some MIPS controllers have hardware I/O coherency. This patch
detects those and turns off software coherency. A new kernel
command line option also allows the user to manually turn
software coherency on or off.
Signed-off-by: Steven J. Hill <[email protected]>
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Add two new macros for microMIPS. One checks if an exception was
taken in either microMIPS or classic MIPS mode. The other checks
if a microMIPS instruction is 16-bit or 32-bit in length.
[[email protected]: Removed unnecessary parenthesis as noted by
Sergei Shtylyov <[email protected]>]
Signed-off-by: Steven J. Hill <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: Sergei Shtylyov <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/4924/
Signed-off-by: Ralf Baechle <[email protected]>
(cherry picked from commit 49df26472338b935fd5781bf94a77a88b148a716)
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Add new file 'uasm-micromips.c' that allows the micro assembler
to generate microMIPS ISA code. It can be included in the kernel
alongside the classic ISA as long as the platform supports the
microMIPS ISA.
Signed-off-by: Steven J. Hill <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/4923/
Signed-off-by: Ralf Baechle <[email protected]>
(cherry picked from commit 5f011a866afbd03a5379f67f4e70e5efbdfc16e9)
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Split 'uasm.c' into two files. The new file 'uasm-mips.c' has the
functions specific to the classic MIPS ISA. The 'uasm.c' file
contains common code that can be used by classic or other ISAs
that could be supported by the kernel.
Signed-off-by: Steven J. Hill <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/4922/
Signed-off-by: Ralf Baechle <[email protected]>
(cherry picked from commit 0961103562ab958fa74f35043bf4f72e51ed6155)
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal
Pull compat cleanup from Al Viro:
"Mostly about syscall wrappers this time; there will be another pile
with patches in the same general area from various people, but I'd
rather push those after both that and vfs.git pile are in."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal:
syscalls.h: slightly reduce the jungles of macros
get rid of union semop in sys_semctl(2) arguments
make do_mremap() static
sparc: no need to sign-extend in sync_file_range() wrapper
ppc compat wrappers for add_key(2) and request_key(2) are pointless
x86: trim sys_ia32.h
x86: sys32_kill and sys32_mprotect are pointless
get rid of compat_sys_semctl() and friends in case of ARCH_WANT_OLD_COMPAT_IPC
merge compat sys_ipc instances
consolidate compat lookup_dcookie()
convert vmsplice to COMPAT_SYSCALL_DEFINE
switch getrusage() to COMPAT_SYSCALL_DEFINE
switch epoll_pwait to COMPAT_SYSCALL_DEFINE
convert sendfile{,64} to COMPAT_SYSCALL_DEFINE
switch signalfd{,4}() to COMPAT_SYSCALL_DEFINE
make SYSCALL_DEFINE<n>-generated wrappers do asmlinkage_protect
make HAVE_SYSCALL_WRAPPERS unconditional
consolidate cond_syscall and SYSCALL_ALIAS declarations
teach SYSCALL_DEFINE<n> how to deal with long long/unsigned long long
get rid of duplicate logics in __SC_....[1-6] definitions
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Merge first batch of fixes from Andrew Morton:
- A couple of kthread changes
- A few minor audit patches
- A number of fbdev patches. Florian remains AWOL so I'm picking up
some of these.
- A few kbuild things
- ocfs2 updates
- Almost all of the MM queue
(And in the meantime, I already have the second big batch from Andrew
pending in my mailbox ;^)
* emailed patches from Andrew Morton <[email protected]>: (149 commits)
memcg: take reference before releasing rcu_read_lock
mem hotunplug: fix kfree() of bootmem memory
mmKconfig: add an option to disable bounce
mm, nobootmem: do memset() after memblock_reserve()
mm, nobootmem: clean-up of free_low_memory_core_early()
fs/buffer.c: remove unnecessary init operation after allocating buffer_head.
numa, cpu hotplug: change links of CPU and node when changing node number by onlining CPU
mm: fix memory_hotplug.c printk format warning
mm: swap: mark swap pages writeback before queueing for direct IO
swap: redirty page if page write fails on swap file
mm, memcg: give exiting processes access to memory reserves
thp: fix huge zero page logic for page with pfn == 0
memcg: avoid accessing memcg after releasing reference
fs: fix fsync() error reporting
memblock: fix missing comment of memblock_insert_region()
mm: Remove unused parameter of pages_correctly_reserved()
firmware, memmap: fix firmware_map_entry leak
mm/vmstat: add note on safety of drain_zonestat
mm: thp: add split tail pages to shrink page list in page reclaim
mm: allow for outstanding swap writeback accounting
...
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A fairly quiet release for SPI, mainly driver work. A few highlights:
- Supports bits per word compatibility checking in the core.
- Allow use of the IP used in Freescale SPI controllers outside
Freescale SoCs.
- DMA support for the Atmel SPI driver.
- New drivers for the BCM2835 and Tegra114"
* tag 'spi-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (68 commits)
spi-topcliff-pch: fix to use list_for_each_entry_safe() when delete list items
spi-topcliff-pch: missing platform_driver_unregister() on error in pch_spi_init()
ARM: dts: add pinctrl property for spi node for atmel SoC
ARM: dts: add spi nodes for the atmel boards
ARM: dts: add spi nodes for atmel SoC
ARM: at91: add clocks for spi dt entries
spi/spi-atmel: add dmaengine support
spi/spi-atmel: add flag to controller data for lock operations
spi/spi-atmel: add physical base address
spi/sirf: fix MODULE_DEVICE_TABLE
MAINTAINERS: Add git repository and update my address
spi/s3c64xx: Check for errors in dmaengine prepare_transfer()
spi/s3c64xx: Fix non-dmaengine usage
spi: omap2-mcspi: fix error return code in omap2_mcspi_probe()
spi/s3c64xx: let device core setup the default pin configuration
MAINTAINERS: Update Grant's email address and maintainership
spi: omap2-mcspi: Fix transfers if DMADEVICES is not set
spi: s3c64xx: move to generic dmaengine API
spi-gpio: init CS before spi_bitbang_setup()
spi: spi-mpc512x-psc: let transmiter/receiver enabled when in xfer loop
...
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Commit abf09bed3cce ("s390/mm: implement software dirty bits")
introduced another difference in the pte layout vs. the pmd layout on
s390, thoroughly breaking the s390 support for hugetlbfs. This requires
replacing some more pte_xxx functions in mm/hugetlbfs.c with a
huge_pte_xxx version.
This patch introduces those huge_pte_xxx functions and their generic
implementation in asm-generic/hugetlb.h, which will now be included on
all architectures supporting hugetlbfs apart from s390. This change
will be a no-op for those architectures.
[[email protected]: fix warning]
Signed-off-by: Gerald Schaefer <[email protected]>
Cc: Mel Gorman <[email protected]>
Cc: Hugh Dickins <[email protected]>
Cc: Hillf Danton <[email protected]>
Acked-by: Michal Hocko <[email protected]> [for !s390 parts]
Cc: Tony Luck <[email protected]>
Cc: Fenghua Yu <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Benjamin Herrenschmidt <[email protected]>
Cc: Paul Mackerras <[email protected]>
Cc: Paul Mundt <[email protected]>
Cc: "David S. Miller" <[email protected]>
Cc: Chris Metcalf <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: "H. Peter Anvin" <[email protected]>
Cc: Martin Schwidefsky <[email protected]>
Cc: Heiko Carstens <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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We were doing:
SRL $r,$?,16
ANDI $r,$r,0xffff
The logical right shift by 16 leaves the upper 16 bits clear, so the
subsequent masking out of those bits is redundant, and can safely be
removed.
Signed-off-by: David Daney <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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This reverts commit c17a6554782ad531f4713b33fd6339ba67ef6391.
Manuel Lauss writes:
lmo commit c17a6554 (MIPS: page.h: Provide more readable definition for
PAGE_MASK) apparently breaks ioremap of 36-bit addresses on my Alchemy
systems (PCI and PCMCIA) The reason is that in arch/mips/mm/ioremap.c
line 157 (phys_addr &= PAGE_MASK) bits 32-35 are cut off. Seems the
new PAGE_MASK is explicitly 32bit, or one could make it signed instead
of unsigned long.
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7837314d141c661c70bc13c5050694413ecfe14a [MIPS: Get rid of branches to
.subsections] removed most uses of .subsection] removed most uses of
.subsection in inline assembler code.
It left the instances in spinlock.h alone because we knew their use was
in fairly small files where .subsection use was fine but of course this
was a fragile assumption. LTO breaks this assumption resulting in build
errors due to exceeded branch range, so remove further instances of
.subsection.
The two functions that still use .macro don't currently cause issues
however this use is still fragile.
Signed-off-by: Ralf Baechle <[email protected]>
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