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This patch is against the 2.6.34 source.
Paraphrased from the 1989 BSD patch by David Borman @ cray.com:
These are the changes needed for the kernel to support
LINEMODE in the server.
There is a new bit in the termios local flag word, EXTPROC.
When this bit is set, several aspects of the terminal driver
are disabled. Input line editing, character echo, and mapping
of signals are all disabled. This allows the telnetd to turn
off these functions when in linemode, but still keep track of
what state the user wants the terminal to be in.
New ioctl:
TIOCSIG Generate a signal to processes in the
current process group of the pty.
There is a new mode for packet driver, the TIOCPKT_IOCTL bit.
When packet mode is turned on in the pty, and the EXTPROC bit
is set, then whenever the state of the pty is changed, the
next read on the master side of the pty will have the TIOCPKT_IOCTL
bit set. This allows the process on the server side of the pty
to know when the state of the terminal has changed; it can then
issue the appropriate ioctl to retrieve the new state.
Since the original BSD patches accompanied the source code for telnet
I've left that reference here, but obviously the feature is useful for
any remote terminal protocol, including ssh.
The corresponding feature has existed in the BSD tty driver since 1989.
For historical reference, a good copy of the relevant files can be found
here:
http://anonsvn.mit.edu/viewvc/krb5/trunk/src/appl/telnet/?pathrev=17741
Signed-off-by: Howard Chu <[email protected]>
Cc: Alan Cox <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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As Jeff Dike pointed out, the Hayes ESP driver was removed in commit
f53a2ade0bb9f2a81f473e6469155172a96b7c38, so these ioctl definitions
should also be removed. This cleans up the remaining arch-specific
locations of this ioctl value.
Thanks to Arnd for pointing these out.
Cc: Jeff Dike <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Alan Cox <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6: (96 commits)
no need for list_for_each_entry_safe()/resetting with superblock list
Fix sget() race with failing mount
vfs: don't hold s_umount over close_bdev_exclusive() call
sysv: do not mark superblock dirty on remount
sysv: do not mark superblock dirty on mount
btrfs: remove junk sb_dirt change
BFS: clean up the superblock usage
AFFS: wait for sb synchronization when needed
AFFS: clean up dirty flag usage
cifs: truncate fallout
mbcache: fix shrinker function return value
mbcache: Remove unused features
add f_flags to struct statfs(64)
pass a struct path to vfs_statfs
update VFS documentation for method changes.
All filesystems that need invalidate_inode_buffers() are doing that explicitly
convert remaining ->clear_inode() to ->evict_inode()
Make ->drop_inode() just return whether inode needs to be dropped
fs/inode.c:clear_inode() is gone
fs/inode.c:evict() doesn't care about delete vs. non-delete paths now
...
Fix up trivial conflicts in fs/nilfs2/super.c
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kunmap_atomic() is currently at level -4 on Rusty's "Hard To Misuse"
list[1] ("Follow common convention and you'll get it wrong"), except in
some architectures when CONFIG_DEBUG_HIGHMEM is set[2][3].
kunmap() takes a pointer to a struct page; kunmap_atomic(), however, takes
takes a pointer to within the page itself. This seems to once in a while
trip people up (the convention they are following is the one from
kunmap()).
Make it much harder to misuse, by moving it to level 9 on Rusty's list[4]
("The compiler/linker won't let you get it wrong"). This is done by
refusing to build if the type of its first argument is a pointer to a
struct page.
The real kunmap_atomic() is renamed to kunmap_atomic_notypecheck()
(which is what you would call in case for some strange reason calling it
with a pointer to a struct page is not incorrect in your code).
The previous version of this patch was compile tested on x86-64.
[1] http://ozlabs.org/~rusty/index.cgi/tech/2008-04-01.html
[2] In these cases, it is at level 5, "Do it right or it will always
break at runtime."
[3] At least mips and powerpc look very similar, and sparc also seems to
share a common ancestor with both; there seems to be quite some
degree of copy-and-paste coding here. The include/asm/highmem.h file
for these three archs mention x86 CPUs at its top.
[4] http://ozlabs.org/~rusty/index.cgi/tech/2008-03-30.html
[5] As an aside, could someone tell me why mn10300 uses unsigned long as
the first parameter of kunmap_atomic() instead of void *?
Signed-off-by: Cesar Eduardo Barros <[email protected]>
Cc: Russell King <[email protected]> (arch/arm)
Cc: Ralf Baechle <[email protected]> (arch/mips)
Cc: David Howells <[email protected]> (arch/frv, arch/mn10300)
Cc: Koichi Yasutake <[email protected]> (arch/mn10300)
Cc: Kyle McMartin <[email protected]> (arch/parisc)
Cc: Helge Deller <[email protected]> (arch/parisc)
Cc: "James E.J. Bottomley" <[email protected]> (arch/parisc)
Cc: Benjamin Herrenschmidt <[email protected]> (arch/powerpc)
Cc: Paul Mackerras <[email protected]> (arch/powerpc)
Cc: "David S. Miller" <[email protected]> (arch/sparc)
Cc: Thomas Gleixner <[email protected]> (arch/x86)
Cc: Ingo Molnar <[email protected]> (arch/x86)
Cc: "H. Peter Anvin" <[email protected]> (arch/x86)
Cc: Arnd Bergmann <[email protected]> (include/asm-generic)
Cc: Rusty Russell <[email protected]> ("Hard To Misuse" list)
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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Add a flags field to help glibc implementing statvfs(3) efficiently.
We copy the flag values from glibc, and add a new ST_VALID flag to
denote that f_flags is implemented.
Signed-off-by: Christoph Hellwig <[email protected]>
Signed-off-by: Al Viro <[email protected]>
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Architectures don't need to define ISA_DMA_THRESHOLD anymore.
Signed-off-by: FUJITA Tomonori <[email protected]>
Acked-by: James Bottomley <[email protected]>
Acked-by: David Howells <[email protected]>
Signed-off-by: Jens Axboe <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (162 commits)
tracing/kprobes: unregister_trace_probe needs to be called under mutex
perf: expose event__process function
perf events: Fix mmap offset determination
perf, powerpc: fsl_emb: Restore setting perf_sample_data.period
perf, powerpc: Convert the FSL driver to use local64_t
perf tools: Don't keep unreferenced maps when unmaps are detected
perf session: Invalidate last_match when removing threads from rb_tree
perf session: Free the ref_reloc_sym memory at the right place
x86,mmiotrace: Add support for tracing STOS instruction
perf, sched migration: Librarize task states and event headers helpers
perf, sched migration: Librarize the GUI class
perf, sched migration: Make the GUI class client agnostic
perf, sched migration: Make it vertically scrollable
perf, sched migration: Parameterize cpu height and spacing
perf, sched migration: Fix key bindings
perf, sched migration: Ignore unhandled task states
perf, sched migration: Handle ignored migrate out events
perf: New migration tool overview
tracing: Drop cpparg() macro
perf: Use tracepoint_synchronize_unregister() to flush any pending tracepoint call
...
Fix up trivial conflicts in Makefile and drivers/cpufreq/cpufreq.c
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git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb
* 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb:
debug_core,kdb: fix crash when arch does not have single step
kgdb,x86: use macro HBP_NUM to replace magic number 4
kgdb,mips: remove unused kgdb_cpu_doing_single_step operations
mm,kdb,kgdb: Add a debug reference for the kdb kmap usage
KGDB: Remove set but unused newPC
ftrace,kdb: Allow dumping a specific cpu's buffer with ftdump
ftrace,kdb: Extend kdb to be able to dump the ftrace buffer
kgdb,powerpc: Replace hardcoded offset by BREAK_INSTR_SIZE
arm,kgdb: Add ability to trap into debugger on notify_die
gdbstub: do not directly use dbg_reg_def[] in gdb_cmd_reg_set()
gdbstub: Implement gdbserial 'p' and 'P' packets
kgdb,arm: Individual register get/set for arm
kgdb,mips: Individual register get/set for mips
kgdb,x86: Individual register get/set for x86
kgdb,kdb: individual register set and and get API
gdbstub: Optimize kgdb's "thread:" response for the gdb serial protocol
kgdb: remove custom hex_to_bin()implementation
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Implement the ability to individually get and set registers for kdb
and kgdb for mips.
Signed-off-by: Jason Wessel <[email protected]>
Acked-by: Ralf Baechle <[email protected]>
CC: [email protected]
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Separate USB code into a file separate from asic/asic_devices.
Separating the USB code from everything else in asic/asic_devices.c goes
a long way toward reducing the use of that file as a dumping ground for
everything that didn't seem to fit anywhere else.
Signed-off-by: David VomLehn <[email protected]>
To: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/1522/
Signed-off-by: Ralf Baechle <[email protected]>
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Define ASIC address, memory preallocations, and initialization code for the
Gaia platform.
Signed-off-by: David VomLehn <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1519/
Signed-off-by: Ralf Baechle <[email protected]>
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Nvram_getenv should behave like cfe_getenv. cfe_getenv returns 0 on
success and -9 if the value was not found. If the input was wrong -8
will be returned by cfe_getenv. Change nvram_getenv to do the same.
Signed-off-by: Hauke Mehrtens <[email protected]>
Cc: Waldemar Brodkorb <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1520/
Signed-off-by: Ralf Baechle <[email protected]>
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We reserve the 3.75GB - 4GB region of PCIe address space for device to
device transfers, making the corresponding physical memory under
direct mapping unavailable for DMA.
To allow for PCIe DMA to all physical memory we map this chunk of
physical memory with BAR1. Because of the resulting discontinuity in
the mapping function, we remove a page of memory at each end of the
range so multi-page DMA buffers can never be allocated that span the
range.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1535/
Signed-off-by: Ralf Baechle <[email protected]>
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It is initialized to zero and only ever read. Remove it, and pass zero in
its place.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1531/
Signed-off-by: Ralf Baechle <[email protected]>
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This patch is based on previous work by Sony and Himanshu Chauhan.
I have done some cleanup and implemented JProbes and KRETPROBES. The
KRETPROBES part is pretty much copied verbatim from powerpc. A possible
future enhance might be to factor out the common code.
Signed-off-by: David Daney <[email protected]>
Cc: Himanshu Chauhan <[email protected]>
To: [email protected]
To: [email protected],
To: [email protected]
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1525/
Patchwork: https://patchwork.linux-mips.org/patch/1530/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
To: [email protected]
To: [email protected]
To: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1524/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
To: [email protected]
To: [email protected]
To: [email protected]
Cc: [email protected],
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1529/
Signed-off-by: Ralf Baechle <[email protected]>
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MSI-X interrupts are not supported yet for Octeon, return error if
MSI-X interrupts are requested by driver so that the driver will fall
back to use MSI interrupts.
Signed-off-by: Chandrakala Chavva <[email protected]>
To: [email protected]
Cc: David Daney <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/1506/
Signed-off-by: Ralf Baechle <[email protected]>
Signed-off-by: David Daney <[email protected]>
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Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/1507/
Signed-off-by: Ralf Baechle <[email protected]>
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On FuLoong-2F IP6 is shared by the performance counter overflow interrupt
and the Bonito northbridge interrupt. To reduce overhead only call
do_IRQ() when oprofile is enabled to reduce overhead.
This patch adds an inline function do_perfcnt_IRQ() to hide the #if's ,
which can be shared by the other Loongson machines, i.e. gdium.
Signed-off-by: Wu Zhangjin <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1492/
Signed-off-by: Ralf Baechle <[email protected]>
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set_irq_trigger_mode() is not needed on all platforms so remove it
and move the related source code to mach_init_irq().
This will allow gdium to share the common irq.c without adding an empty
set_irq_trigger_mode().
Signed-off-by: Wu Zhangjin <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1493/
Signed-off-by: Ralf Baechle <[email protected]>
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This is used by the forthcoming OCTEON watchdog patch.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1498/
Signed-off-by: Ralf Baechle <[email protected]>
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A 'select EXPORT_UASM' in Kconfig will cause the uasm to be exported
for use in modules. When it is exported, all the uasm data and code
cease to be __init and __initdata.
Also daddiu_bug cannot be __cpuinitdata if uasm is exported. The
cleanest thing is to just make it normal data.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1500/
Signed-off-by: Ralf Baechle <[email protected]>
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These are OCTEON specific instructions.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1496/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1495/
Signed-off-by: Ralf Baechle <[email protected]>
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Power throttling make deterministic delay loops impossible.
Re-implement delays using the cycle counter. This also allows us to
get rid of the code that calculates loops per jiffy.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1317/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Lars-Peter Clausen <[email protected]>
Acked-by: Matt Fleming <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Matt Fleming <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1463/
Patchwork: https://patchwork.linux-mips.org/patch/1523/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the NAND controller on JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: David Woodhouse <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1470/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the LCD controller on JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1470/
Signed-off-by: Ralf Baechle <[email protected]>
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Add platform devices for all the JZ4740 platform drivers.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1469/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for DMA transfers on JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1401/
Signed-off-by: Ralf Baechle <[email protected]>
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Add gpiolib support for JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1467/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the timer/counter unit on a JZ4740 SoC. This code is used
as a common base for the JZ4740 clocksource/clockevent implementation and
PWM support.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1396/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for IRQ handling on a JZ4740 SoC.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1465/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for managing the clocks found on JZ4740 SoC through the
Linux clock API.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1466/
Signed-off-by: Ralf Baechle <[email protected]>
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Adds a new cpu type for the JZ4740 to the Linux MIPS architecture code.
It also adds the iomem addresses for the different components found on
a JZ4740 SoC.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1464/
Signed-off-by: Ralf Baechle <[email protected]>
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* Rename camel-case InitTLBStart_addr to octeon_bootloader_entry_addr.
* Convert calls to cvmx_read64_uint32(), to simple pointer
dereferences.
* Set proper ebase.
* Don't confuse coreid and cpu numbers.
* Try to maintain consistent bootloader coremask.
* Update the signature and boot_init_vector of supported bootloaders.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1491/
Signed-off-by: Ralf Baechle <[email protected]>
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MSI IRQ numbers are allocated dynamically, so there is no reason to
have all these static definitions.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1487/
Signed-off-by: Ralf Baechle <[email protected]>
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au1000_eth uses firmware calls to get a valid MAC address, and changes
it depending on platform device id. This patch moves this logic out of
the driver into the platform device registration part, where boards with
supported chips can use whatever firmware interface they need; the default
implementation maintains compatibility with existing, YAMON-based firmware.
Tested-by: Wolfgang Grandegger <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1481/
Acked-by: David S. Miller <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done
by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/1461/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the external T-cache interface. Allow for platform
independent size probing from 512KB to 8MB in powers of two.
Signed-off-by: Ricardo Mendoza <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1477/
Signed-off-by: Ralf Baechle <[email protected]>
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Based somewhat on the PPC implementation.
32-bit processes have the heap randomized in an 8MB space, 256MB for
64-bit processes.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1479/
Signed-off-by: Ralf Baechle <[email protected]>
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Fairly straight forward: For 32-bit address spaces randomize within a
16MB space, for 64-bit within a 256MB space.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1480/
Signed-off-by: Ralf Baechle <[email protected]>
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Don't duplicate worthless lines.
Signed-off-by: Shinya Kuribayashi <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1390/
Signed-off-by: Ralf Baechle <[email protected]>
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Don't duplicate worthless lines.
Signed-off-by: Shinya Kuribayashi <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1389/
Signed-off-by: Ralf Baechle <[email protected]>
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Although all EMMAxxx SoCs can support IP2 and IP3 hardware interrupts,
current EMMA2RH plat_irq_dispatch() supports IP2 only. We can make it
configurable in the future, but for the time being, would like to make
things explicitly allcated to IP2 in accordance with plat_irq_dispatch().
Signed-off-by: Shinya Kuribayashi <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1388/
Signed-off-by: Ralf Baechle <[email protected]>
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For historical reasons, we used to put MIPS CPU IRQs behind SoC-specific
IRQs in the queue, and have been using CPU_IRQ_BASE as MIPS_CPU_IRQ_BASE.
In recent years, however, we've brought it back to normal order, and now
CPU_IRQ_BASE just redefines the generic MIPS_CPU_IRQ_BASE.
At the same time, NUM_CPU_IRQ is also removed as useless.
Signed-off-by: Shinya Kuribayashi <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1387/
Signed-off-by: Ralf Baechle <[email protected]>
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OCTEON implements __builtin_popcount with a single instruction, so lets use it.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Cc: David Daney <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/1431/
Signed-off-by: Ralf Baechle <[email protected]>
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Some MIPS ISA processor varients can do hweight operations
efficiently.
Split arch_hweight.h into a seperate file, and implement the
operations with __builtin_popcount{,ll} if supported.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Cc: David Daney <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/1430/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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