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2017-04-10MIPS: Octeon: Remove unused SLI types and macros.Steven J. Hill1-3467/+74
Remove all unused bitfields and macros. Convert the remaining bitfields to use __BITFIELD_FIELD instead of #ifdef. [[email protected]: Add inclusions of <uapi/asm/bitfield.h> as necessary.] Signed-off-by: Steven J. Hill <[email protected]> Acked-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15405/ Signed-off-by: Ralf Baechle <[email protected]>
2017-04-10MIPS: Octeon: Remove unused L2C types and macros.Steven J. Hill5-3828/+239
Remove all unused bitfields and macros. Convert the remaining bitfields to use __BITFIELD_FIELD instead of #ifdef. [[email protected]: Add inclusions of <uapi/asm/bitfield.h> as necessary.] Signed-off-by: Steven J. Hill <[email protected]> Acked-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15403/ Signed-off-by: Ralf Baechle <[email protected]>
2017-02-14MIPS: OCTEON: Platform support for OCTEON III USB controllerSteven J. Hill1-2/+6
Add all the necessary platform code to initialize the dwc3 USB host controller. This code initializes the clocks and performs a reset on the USB core and PHYs. The driver code in 'drivers/usb/dwc3' is where the real driver lives. Signed-off-by: Steven J. Hill <[email protected]> Acked-by: David Daney <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15108/ Signed-off-by: James Hogan <[email protected]>
2017-01-03MIPS: Octeon: Kill cvmx_helper_link_autoconf()Aaro Koskinen5-21/+5
Kill cvmx_helper_link_autoconf(). Nobody uses this function. Signed-off-by: Aaro Koskinen <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14626/ Signed-off-by: Ralf Baechle <[email protected]>
2016-10-04MIPS: Octeon: Delete unused cvmx-mdio.hAaro Koskinen1-506/+0
Signed-off-by: Aaro Koskinen <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14206/ Signed-off-by: Ralf Baechle <[email protected]>
2016-10-04MIPS: Octeon: Delete unused cvmx_helper_board_link_set_phy.Aaro Koskinen1-20/+0
Signed-off-by: Aaro Koskinen <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14204/ Signed-off-by: Ralf Baechle <[email protected]>
2016-10-04MIPS: Octeon: Delete unused cvmx_override_board_link_get.Aaro Koskinen1-10/+0
Signed-off-by: Aaro Koskinen <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14203/ Signed-off-by: Ralf Baechle <[email protected]>
2016-07-24spi: octeon: Move include file from arch/mips to drivers/spiJan Glauber1-328/+0
Move the register definitions to the drivers directory because they are only used there. Signed-off-by: Jan Glauber <[email protected]> Tested-by: Steven J. Hill <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2016-05-28MIPS: Cavium: Fix typoAndrea Gelmini4-4/+4
Signed-off-by: Andrea Gelmini <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/13324/ Patchwork: https://patchwork.linux-mips.org/patch/13325/ Patchwork: https://patchwork.linux-mips.org/patch/13326/ Patchwork: https://patchwork.linux-mips.org/patch/13327/ Signed-off-by: Ralf Baechle <[email protected]>
2016-05-13MIPS: Octeon: board_type_to_string: return NULL for unsupported boardAaro Koskinen1-1/+1
Return NULL for unsupported board. Signed-off-by: Aaro Koskinen <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12581/ Signed-off-by: Ralf Baechle <[email protected]>
2016-05-13MIPS: OCTEON: Add SMP support for OCTEON cn78xx et al.David Daney1-0/+6
OCTEON chips with the CIU3 interrupt controller use a different IPI mechanism that previous models. Add plat_smp_ops for the cn78xx and probing code to choose between the two types of ops. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12499/ Signed-off-by: Ralf Baechle <[email protected]>
2016-05-13MIPS: OCTEON: Add support for OCTEON III interrupt controller.David Daney1-0/+19
Add irq_chip support for both IPI and "normal" interrupts of the CIU3 controller. Document the device tree binding for the CIU3. Some functions are non-static as they will be used by follow-on support for MSI-X. Signed-off-by: David Daney <[email protected]> Acked-by: Rob Herring <[email protected]> Cc: Rob Herring <[email protected]> Cc: Pawel Moll <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Ian Campbell <[email protected]> Cc: Kumar Gala <[email protected]> Cc: [email protected] Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12500/ Signed-off-by: Ralf Baechle <[email protected]>
2016-05-13MIPS: OCTEON: Add model checking support for cn73xx, cnf75xx and cn78xxDavid Daney3-5/+46
Follow on patchs need to be able to distinguish the new models. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12498/ Signed-off-by: Ralf Baechle <[email protected]>
2016-05-13MIPS: OCTEON: Add register definitions for cn73xx, cnf75xx and cn78xx.David Daney3-16/+748
These new members of the OCTEON III family have some new registers, update some of the definitions for use in follow on patches. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12497/ Signed-off-by: Ralf Baechle <[email protected]>
2016-05-13MIPS: OCTEON: Extend number of supported CPUs past 32David Daney3-4/+106
To support more than 48 CPUs, the bootinfo structure grows a new coremask structure. Add the definition of the structure and add it to struct cvmx_bootinfo. In prom_init(), copy the new coremask data into the sysinfo structure, and use it in smp_setup(). Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12319/ Signed-off-by: Ralf Baechle <[email protected]>
2016-05-13MIPS: OCTEON: Remove dead code from cvmx-sysinfo.David Daney1-29/+1
Get rid of the long unused code. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12318/ Signed-off-by: Ralf Baechle <[email protected]>
2016-04-03MIPS: Fix misspellings in comments.Adam Buchbinder2-2/+2
Signed-off-by: Adam Buchbinder <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12617/ Signed-off-by: Ralf Baechle <[email protected]>
2016-03-18Merge branch 'for-4.6' of ↵Linus Torvalds1-0/+9
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: - ahci grew runtime power management support so that the controller can be turned off if no devices are attached. - sata_via isn't dead yet. It got hotplug support and more refined workaround for certain WD drives. - Misc cleanups. There's a merge from for-4.5-fixes to avoid confusing conflicts in ahci PCI ID table. * 'for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: ata: ahci_xgene: dereferencing uninitialized pointer in probe AHCI: Remove obsolete Intel Lewisburg SATA RAID device IDs ata: sata_rcar: Use ARCH_RENESAS sata_via: Implement hotplug for VT6421 sata_via: Apply WD workaround only when needed on VT6421 ahci: Add runtime PM support for the host controller ahci: Add functions to manage runtime PM of AHCI ports ahci: Convert driver to use modern PM hooks ahci: Cache host controller version scsi: Drop runtime PM usage count after host is added scsi: Set request queue runtime PM status back to active on resume block: Add blk_set_runtime_active() ata: ahci_mvebu: add support for Armada 3700 variant libata: fix unbalanced spin_lock_irqsave/spin_unlock_irq() in ata_scsi_park_show() libata: support AHCI on OCTEON platform
2016-02-11libata: support AHCI on OCTEON platformAleksey Makarov1-0/+9
The OCTEON SATA controller is currently found on cn71XX devices. Acked-by: Arnd Bergmann <[email protected]> Acked-by: Hans de Goede <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: David Daney <[email protected]> Signed-off-by: Vinita Gupta <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Signed-off-by: Zubair Lutfullah Kakakhel <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
2016-02-10MIPS: Octeon: Update OCTEON_FEATURE_PCIE for Octeon IIIZubair Lutfullah Kakakhel1-1/+2
Currently the driver tries to probe the pci driver and oops. Add CN7XXX to case so that driver probes the pcie driver. Signed-off-by: Zubair Lutfullah Kakakhel <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12530/ Signed-off-by: Ralf Baechle <[email protected]>
2015-09-03MIPS: Octeon: Fix management port MII address on Kontron S1901Aaro Koskinen1-0/+2
Management port MII address is incorrect on Kontron S1901 resulting in broken networking. Fix by providing definitions for the in-tree DT pruning code. Signed-off-by: Aaro Koskinen <[email protected]> Acked-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/10914/ Signed-off-by: Ralf Baechle <[email protected]>
2015-09-03MIPS: Octeon: Set up 1:1 mapping between CN68XX PKO queues and portsJanne Huttunen1-0/+3
Use the internal port number also as the queue number on CN68XX. Signed-off-by: Janne Huttunen <[email protected]> Signed-off-by: Aaro Koskinen <[email protected]> Acked-by: David Daney <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Cc: Janne Huttunen <[email protected]> Cc: Aaro Koskinen <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/10962/ Signed-off-by: Ralf Baechle <[email protected]>
2015-09-03STAGING: Octeon: Support CN68XX style WQEJanne Huttunen2-63/+254
CN68XX has a bit different WQE structure. This patch provides the new definitions and converts the code to use the proper variant based on the actual model. Signed-off-by: Janne Huttunen <[email protected]> Signed-off-by: Aaro Koskinen <[email protected]> Acked-by: David Daney <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Cc: Janne Huttunen <[email protected]> Cc: Aaro Koskinen <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/10973/ Signed-off-by: Ralf Baechle <[email protected]>
2015-09-03MIPS: Octeon: Add definitions for setting up SSOJanne Huttunen1-0/+29
Some Octeon II models have SSO instead of POW and use a different register for setting the interrupt thresholds. Add the necessary definitions for configuring the interrupts also on those models. Signed-off-by: Janne Huttunen <[email protected]> Signed-off-by: Aaro Koskinen <[email protected]> Acked-by: David Daney <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Cc: Janne Huttunen <[email protected]> Cc: Aaro Koskinen <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/10972/ Signed-off-by: Ralf Baechle <[email protected]>
2015-09-03MIPS: Octeon: Support all PIP input ports on CN68XXJanne Huttunen1-1/+1
CN68XX has 48 PIP input ports. Signed-off-by: Janne Huttunen <[email protected]> Signed-off-by: Aaro Koskinen <[email protected]> Acked-by: David Daney <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Cc: Janne Huttunen <[email protected]> Cc: Aaro Koskinen <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/10969/ Signed-off-by: Ralf Baechle <[email protected]>
2015-04-13Merge branch '4.0-fixes' into mips-for-linux-nextRalf Baechle1-3/+0
2015-04-10MIPS: Octeon: Remove udelay() causing huge IRQ latencyAlexander Sverdlin1-3/+0
udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon platforms because these operations are called from PCI_OP_READ() and PCI_OP_WRITE() under raw_spin_lock_irqsave(). Signed-off-by: Alexander Sverdlin <[email protected]> Cc: [email protected] Cc: David Daney <[email protected]> Cc: Rob Herring <[email protected]> Cc: Jiri Kosina <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Masanari Iida <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Mathias <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9576/ Signed-off-by: Ralf Baechle <[email protected]>
2015-04-01MIPS: Octeon: Reverse the order of register accesses to the FAUPaul Martin1-0/+22
64 bit access is unaffected but for 32 bit access, swap high and low words. Similarly for 16 bit access, reverse the order of the four possible words, and for 8 bit access reverse the order of byte accesses. Signed-off-by: Paul Martin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9630/ Signed-off-by: Ralf Baechle <[email protected]>
2015-04-01MIPS: Octeon: Turn hardware bitfields and structures inside out.Paul Martin8-0/+454
Although the proper way to do this for bitfields would be to use the macro that Ralf has provided, this is a little easier to understand as a diff. Signed-off-by: Paul Martin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9628/ Signed-off-by: Ralf Baechle <[email protected]>
2015-04-01MIPS: Octeon: Remove unused function cvmx_reset_octeon().Ralf Baechle1-8/+0
As suggested by David Daney. Signed-off-by: Ralf Baechle <[email protected]>
2015-04-01MIPS: OCTEON: Add semaphore to serialize bootbus accesses.David Daney1-0/+2
Some hardware blocks attached to the OCTEON bootbus run asynchronously to accesses from the CPUs. These include MMC/SD host, CF(when using DMA), and NAND controller. A bus error, or corrupt data may occur if a CPU is trying to access a bootbus connected device at the same time the bus is running asynchronous operations. To work around these problems we add this semaphore that must be acquired before initiating bootbus activity. Subsequent patches will add users for this. Signed-off-by: David Daney <[email protected]> [[email protected]: combine the patches] Signed-off-by: Aleksey Makarov <[email protected]> Signed-off-by: Chandrakala Chavva <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9459/ Signed-off-by: Ralf Baechle <[email protected]>
2015-04-01MIPS: Octeon: Handle bootloader structures in little-endian mode.David Daney1-0/+55
Compensate for the differences in the layout of in-memory bootloader information as seen from little-endian mode. Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9590/ Signed-off-by: Ralf Baechle <[email protected]>
2015-03-25MIPS: OCTEON: Use correct CSR to soft resetChandrakala Chavva1-8/+0
Also delete unused cvmx_reset_octeon() This fixes reboot for Octeon III boards Signed-off-by: Chandrakala Chavva <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Cc: David Daney <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9471/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-21Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds4-53/+510
Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS: - a number of fixes that didn't make the 3.19 release. - a number of cleanups. - preliminary support for Cavium's Octeon 3 SOCs which feature up to 48 MIPS64 R3 cores with FPU and hardware virtualization. - support for MIPS R6 processors. Revision 6 of the MIPS architecture is a major revision of the MIPS architecture which does away with many of original sins of the architecture such as branch delay slots. This and other changes in R6 require major changes throughout the entire MIPS core architecture code and make up for the lion share of this pull request. - finally some preparatory work for eXtendend Physical Address support, which allows support of up to 40 bit of physical address space on 32 bit processors" [ Ahh, MIPS can't leave the PAE brain damage alone. It's like every CPU architect has to make that mistake, but pee in the snow by changing the TLA. But whether it's called PAE, LPAE or XPA, it's horrid crud - Linus ] * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (114 commits) MIPS: sead3: Corrected get_c0_perfcount_int MIPS: mm: Remove dead macro definitions MIPS: OCTEON: irq: add CIB and other fixes MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs. MIPS: OCTEON: More OCTEONIII support MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits. MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup. MIPS: OCTEON: Update octeon-model.h code for new SoCs. MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h MIPS: OCTEON: Implement the core-16057 workaround MIPS: OCTEON: Delete unused COP2 saving code MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register MIPS: OCTEON: Save and restore CP2 SHA3 state MIPS: OCTEON: Fix FP context save. MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs MIPS: boot: Provide more uImage options MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h MIPS: ip22-gio: Remove legacy suspend/resume support mips: pci: Add ifdef around pci_proc_domain ...
2015-02-20MIPS: OCTEON: More OCTEONIII supportChandrakala Chavva1-0/+306
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII. Signed-off-by: Chandrakala Chavva <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8945/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Update octeon-model.h code for new SoCs.David Daney1-22/+85
Add coverage for OCTEON III models. Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8942/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.hDavid Daney1-30/+105
Also update union octeon_cvmemctl with new OCTEON II fields. [[email protected]: use __BITFIELD_FIELD] Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8940/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUsDavid Daney1-0/+13
The wide multiplier is twice as wide, so we need to save twice as much state. Detect the multiplier type (CPU type) at start up and install model specific handlers. [[email protected]: conflict resolution, support for old compilers] Signed-off-by: David Daney <[email protected]> Signed-off-by: Leonid Rosenboim <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8933/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-17MIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASMMarkos Chandras1-1/+1
The GCC_OFF12_ASM macro is used for 12-bit immediate constrains but we will also use it for 9-bit constrains on MIPS R6 so we rename it to something more appropriate. Cc: Maciej W. Rozycki <[email protected]> Signed-off-by: Markos Chandras <[email protected]>
2014-12-24MIPS: OCTEON: reintroduce crypto features checkAaro Koskinen1-2/+15
Reintroduce run-time check for crypto features. The old one was deleted because it was unreliable, now decide the crypto availability on early boot when the model string is constructed. Signed-off-by: Aaro Koskinen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-12-24MIPS: OCTEON: add crypto helper functionsAaro Koskinen1-5/+0
Add crypto helper functions which are needed for kernel level usage. The code for these has been extracted from the EdgeRouter Pro GPL tarball. While at it, also delete duplicate definitions of the functions. Signed-off-by: Aaro Koskinen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2014-11-24MIPS: Fix microMIPS LL/SC immediate offsetsMaciej W. Rozycki1-1/+3
In the microMIPS encoding some memory access instructions have their immediate offset reduced to 12 bits only. That does not match the GCC `R' constraint we use in some places to satisfy the requirement, resulting in build failures like this: {standard input}: Assembler messages: {standard input}:720: Error: macro used $at after ".set noat" {standard input}:720: Warning: macro instruction expanded into multiple instructions Fix the problem by defining a macro, `GCC_OFF12_ASM', that expands to the right constraint depending on whether microMIPS or standard MIPS code is produced. Also apply the fix to where `m' is used as in the worst case this change does nothing, e.g. where the pointer was already in a register such as a function argument and no further offset was requested, and in the best case it avoids an extraneous sequence of up to two instructions to load the high 20 bits of the address in the LL/SC loop. This reduces the risk of lock contention that is the higher the more instructions there are in the critical section between LL and SC. Strictly speaking we could just bulk-replace `R' with `ZC' as the latter constraint adjusts automatically depending on the ISA selected. However it was only introduced with GCC 4.9 and we keep supporing older compilers for the standard MIPS configuration, hence the slightly more complicated approach I chose. The choice of a zero-argument function-like rather than an object-like macro was made so that it does not look like a function call taking the C expression used for the constraint as an argument. This is so as not to confuse the reader or formatting checkers like `checkpatch.pl' and follows previous practice. Signed-off-by: Maciej W. Rozycki <[email protected]> Signed-off-by: Steven J. Hill <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8482/ Signed-off-by: Ralf Baechle <[email protected]>
2014-11-24MIPS: Octeon: Mark octeon_model_get_string() with __initAaro Koskinen2-4/+1
Mark octeon_model_get_string() with __init and make internal functions static. Signed-off-by: Aaro Koskinen <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/7668/ Signed-off-by: Ralf Baechle <[email protected]>
2014-11-24MIPS: Octeon: Delete potentially dangerous feature checksAaro Koskinen2-95/+0
We should not need to read fuses during normal operation, also the current code has issues with that (not safe for concurrent access). Since there are no in-kernel users for these, just delete them. Drivers should not need such OCTEON_HAS_FEATURE mechanism in any case, instead the information should be passed via device tree. Signed-off-by: Aaro Koskinen <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/7665/ Signed-off-by: Ralf Baechle <[email protected]>
2014-11-24MIPS: Octeon: Move cvmx_fuse_read_byte()Aaro Koskinen1-19/+1
Move cvmx_fuse_read_byte() into a .c file. Signed-off-by: Aaro Koskinen <[email protected]> Cc: David Daney <[email protected]> Cc: [email protected] Cc: Aaro Koskinen <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/7666/ Signed-off-by: Ralf Baechle <[email protected]>
2014-11-24mips: Convert pr_warning to pr_warnJoe Perches1-42/+27
Use the much more common pr_warn instead of pr_warning with the goal of removing pr_warning eventually. Other miscellanea: o Coalesce formats o Realign arguments Signed-off-by: Joe Perches <[email protected]> Cc: linux-mips <[email protected]> Cc: LKML <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/7935/ Signed-off-by: Ralf Baechle <[email protected]>
2014-08-02MIPS: OCTEON: cvmx-bootinfo: add D-Link DSR-1000NAaro Koskinen1-0/+2
Add a definition for D-Link DSR-1000N router. The bootloader on this board supplies 20006 in the bootinfo; the enum CVMX_BOARD_TYPE_CUST_DSR1000N comes from the GPL sources of the board. Signed-off-by: Aaro Koskinen <[email protected]> Cc: [email protected] Cc: [email protected] Cc: David Daney <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/7217/ Signed-off-by: Ralf Baechle <[email protected]>
2014-05-23MIPS: Octeon: Remove checks for CONFIG_CAVIUM_GDBPaul Bolle1-1/+0
Three checks for CONFIG_CAVIUM_GDB were added in v2.6.29. But the Kconfig symbol CAVIUM_GDB was never added to the tree. Remove these checks. Also remove the last reference to octeon_get_boot_debug_flag(). There is no definition of that function anyway. Signed-off-by: Paul Bolle <[email protected]> Tested-by: Andreas Herrmann <[email protected]>) Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6976/ Signed-off-by: Ralf Baechle <[email protected]>
2014-01-23MIPS: OCTEON: Supply OCTEON+ USB nodes in internal device trees.David Daney1-0/+9
This will be needed by the next patch to use said nodes for probing via the device tree. Signed-off-by: David Daney <[email protected]> Tested-by: Aaro Koskinen <[email protected]> Signed-off-by: John Crispin <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/6185/
2013-11-15Merge branch 'for-linus' of ↵Linus Torvalds1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial tree updates from Jiri Kosina: "Usual earth-shaking, news-breaking, rocket science pile from trivial.git" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (23 commits) doc: usb: Fix typo in Documentation/usb/gadget_configs.txt doc: add missing files to timers/00-INDEX timekeeping: Fix some trivial typos in comments mm: Fix some trivial typos in comments irq: Fix some trivial typos in comments NUMA: fix typos in Kconfig help text mm: update 00-INDEX doc: Documentation/DMA-attributes.txt fix typo DRM: comment: `halve' -> `half' Docs: Kconfig: `devlopers' -> `developers' doc: typo on word accounting in kprobes.c in mutliple architectures treewide: fix "usefull" typo treewide: fix "distingush" typo mm/Kconfig: Grammar s/an/a/ kexec: Typo s/the/then/ Documentation/kvm: Update cpuid documentation for steal time and pv eoi treewide: Fix common typo in "identify" __page_to_pfn: Fix typo in comment Correct some typos for word frequency clk: fixed-factor: Fix a trivial typo ...
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