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2013-10-14treewide: Fix common typo in "identify"Maxime Jayat1-2/+2
Correct common misspelling of "identify" as "indentify" throughout the kernel Signed-off-by: Maxime Jayat <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2013-09-03MIPS: Move declaration of Octeon function fixup_irqs() to header.Ralf Baechle1-0/+2
Signed-off-by: Ralf Baechle <[email protected]>
2013-07-01MIPS: Octeon: Enable interfaces on EdgeRouter LiteAaro Koskinen1-0/+2
Enable interfaces on EdgeRouter Lite. Tested with cavium_octeon_defconfig and busybox shell. DHCP & ping works with eth0, eth1 and eth2. The board type "UBNT_E100" is taken from the sources of the vendor kernel shipped with the product. Signed-off-by: Aaro Koskinen <[email protected]> Acked-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5546/ Signed-off-by: Ralf Baechle <[email protected]>
2013-03-02Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds30-775/+775
Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle30-775/+775
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <[email protected]>
2013-01-29Merge branch 'master' into for-nextJiri Kosina4-7/+3465
Conflicts: drivers/devfreq/exynos4_bus.c Sync with Linus' tree to be able to apply patches that are against newer code (mvneta).
2013-01-03treewide: Replace incomming with incoming in all comments and stringsJorrit Schippers1-2/+2
Signed-off-by: Jorrit Schippers <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2012-12-13MIPS: OCTEON: Add definitions for OCTEON memory contoller registers.David Daney1-0/+3457
Signed-off-by: David Daney <[email protected]>
2012-12-13MIPS: OCTEON: Add OCTEON family definitions to octeon-model.hDavid Daney1-0/+6
Used by follow-on EDAC patches. Signed-off-by: David Daney <[email protected]>
2012-12-13MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.David Daney1-7/+0
The patch needs to eliminate the definition of OCTEON_IRQ_BOOTDMA so that the device tree code can map the interrupt, so in order to not temporarily break things, we do a single patch to both the interrupt registration code and the pata_octeon_cf driver. Also rolled in is a conversion to use hrtimers and corrections to the timing calculations. Acked-by: Jeff Garzik <[email protected]> Signed-off-by: David Daney <[email protected]>
2012-12-13MIPS: Octeon: Add kexec and kdump supportRalf Baechle1-0/+2
[[email protected]: Original patch by Maxim Uvarov <[email protected]> with plenty of further shining, polishing, debugging and testing by me.] Signed-off-by: Maxim Uvarov <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/1026/ Signed-off-by: Ralf Baechle <[email protected]>
2012-10-09Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds40-1159/+43331
Pull MIPS update from Ralf Baechle: "This is the MIPS update for 3.7. A fair chunk of them are platform updates to the Cavium Octeon SOC (which involves machine generated header files of considerable size), Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx platforms. Support for the commercial MIPS simulator MIPSsim has been removed as MIPS Technologies is shifting away from this product and Qemu is offering various more powerful platforms. The generic MIPS code can now also probe for no-execute / write-only TLB features implemented without the full SmartMIPS extension as permitted by the latest MIPS processor architecture. Lots of small changes to generic code." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits) MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x MIPS: BCM63XX: Properly handle mac address octet overflow MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user. MIPS: Replace `-' in defconfig filename wth `_' for consistency. MIPS: Wire kcmp syscall. MIPS: MIPSsim: Remove the MIPSsim platform. MIPS: NOTIFY_RESUME is not needed in TIF masks MIPS: Merge the identical "return from syscall" per-ABI code MIPS: Unobfuscate _TIF..._MASK MIPS: Prevent hitting do_notify_resume() with !user_mode(regs). MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'. MIPS: Add base architecture support for RI and XI. MIPS: Optimise TLB handlers for MIPS32/64 R2 cores. MIPS: uasm: Add INS and EXT instructions. MIPS: Avoid pipeline stalls on some MIPS32R2 cores. MIPS: Make VPE count to be one-based. MIPS: Add new end of interrupt functionality for GIC. MIPS: Add EIC support for GIC. MIPS: Code clean-ups for the GIC. ...
2012-10-05Merge branch 'master' of git://dev.phrozen.org/mips-next into ↵Ralf Baechle1-0/+328
mips-for-linux-next
2012-10-02UAPI: (Scripted) Convert #include "..." to #include <path/...> in kernel ↵David Howells15-48/+48
system headers Convert #include "..." to #include <path/...> in kernel system headers. Signed-off-by: David Howells <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Acked-by: Paul E. McKenney <[email protected]> Acked-by: Dave Jones <[email protected]>
2012-09-27Merge branch 'cn6xxx-mgmt' of ↵Ralf Baechle1-0/+1
git://git.linux-mips.org/pub/scm/daney/upstream-daney into mips-for-linux-next
2012-08-31MIPS: Octeon: Add octeon_io_clk_delay() function.David Daney1-0/+1
Also cleanup and fix octeon_init_cvmcount() Signed-off-by: David Daney <[email protected]> Acked-by: David S. Miller <[email protected]>
2012-08-31MIPS: OCTEON: Add support for cn68XX interrupt controller.David Daney1-0/+3
The cn68XX has a new interrupt controller named CIU2, add support for this, and use it if cn68XX detected at runtime. Signed-off-by: David Daney <[email protected]>
2012-08-31MIPS: OCTEON: Update register definitions.David Daney37-1159/+42981
Add support for cn68xx, cn61xx, cn63xx, cn66xx and cnf71XX. Add little-endian register layouts. Patch cvmx-interrupt-rsl.c for changed definition. Signed-off-by: David Daney <[email protected]>
2012-08-31MIPS: OCTEON: Add detection of cnf71xx parts.David Daney1-0/+18
Also add cvmx_get_octeon_family(). Both of these are needed by the upcoming register definition refresh patch. Signed-off-by: David Daney <[email protected]>
2012-08-22MIPS: OCTEON: Add register definitions for SPI host hardware.David Daney1-0/+328
Needed by SPI driver. Signed-off-by: David Daney <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/3796/ Signed-off-by: John Crispin <[email protected]>
2012-07-23i2c: Convert i2c-octeon.c to use device tree.David Daney1-5/+0
There are three parts to this: 1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2. The interrupts are specified by the device tree and these hard coded irq numbers block the used of the irq lines by the irq_domain code. 2) Remove platform device setup code from octeon-platform.c, it is now unused. 3) Convert i2c-octeon.c to use device tree. Part of this includes using the devm_* functions instead of the raw counterparts, thus simplifying error handling. No functionality is changed. Signed-off-by: David Daney <[email protected]> Acked-by: Rob Herring <[email protected]> Acked-by: Wolfram Sang <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Grant Likely <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/3939/ Signed-off-by: Ralf Baechle <[email protected]>
2012-07-23MIPS: OCTEON: Remove some unused files.David Daney2-66/+0
These FPA related files are not used anywhere in the kernel. Remove them. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/3892/ Signed-off-by: Ralf Baechle <[email protected]>
2012-05-15MIPS: OCTEON: Remove unused file.David Daney1-1365/+0
cvmx-pcieep-defs.h is not mentioned anywhere in the tree, remove it. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/3652/ Signed-off-by: Ralf Baechle <[email protected]>
2011-12-07MIPS: Octeon: Update DMA mapping operations for OCTEON II processors.David Daney1-1/+2
OCTEON II has a new dma to phys mapping method for PCIe. Define OCTEON_DMA_BAR_TYPE_PCIE2 to denote this case, and handle it. OCTEON II also needs a swiotlb if the OHCI USB driver is enabled, so allocate this too. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/2983/ Signed-off-by: Ralf Baechle <[email protected]>
2011-12-07MIPS: Octeon: Update feature test functions for new chips and features.David Daney2-30/+126
cvmx.h was rearranged to fix include file ordering problems, but there is no change other than moving some definitions around. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/2984/ Signed-off-by: Ralf Baechle <[email protected]>
2011-12-07MIPS: Octeon: Update SOC PCI related register definitions for new chips.David Daney7-83/+4909
Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/2986/ Signed-off-by: Ralf Baechle <[email protected]>
2011-12-07MIPS: Octeon: Rearrange CVMX files in preperation for device treeDavid Daney7-0/+7
Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Greg Kroah-Hartman <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/2941/ Signed-off-by: Ralf Baechle <[email protected]>
2011-12-07MIPS: Octeon: Update bootloader board type constants.David Daney2-3/+75
Many new types of boards exist, so lets recognize them. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Greg Kroah-Hartman <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/2940/ Signed-off-by: Ralf Baechle <[email protected]>
2011-12-07MIPS: Octeon: Move some Ethernet support files out of staging.David Daney34-0/+15227
Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Greg Kroah-Hartman <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/2942/ Patchwork: https://patchwork.linux-mips.org/patch/3012/ Signed-off-by: Ralf Baechle <[email protected]>
2011-12-07MIPS: Oceton: Update model detection code for new chips.David Daney2-154/+1094
Several newer chips were not covered, update the code to detect them. This necessitates updating cvmx-mio-defs.h as well, because it has new and required definitions. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/2939/ Signed-off-by: Ralf Baechle <[email protected]>
2011-12-07MIPS: Octeon: Update struct cvmx_bootinfo to v3.David Daney1-2/+8
Bootloaders can pass version 3 of this structure. Add the new fields so we can support the Device Tree. Signed-off-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/2938/ Signed-off-by: Ralf Baechle <[email protected]>
2011-03-31Fix common misspellingsLucas De Marchi4-4/+4
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <[email protected]>
2011-03-29MIPS: Octeon: Rewrite interrupt handling code.David Daney1-0/+2
This includes conversion to new style irq_chip functions, and correctly enabling/disabling per-CPU interrupts. The hardware interrupt bit to irq number mapping is now done with a flexible map, instead of by bit twiddling the irq number. [ tglx: Adjusted to new irq_cpu_on/offline callbacks and __irq_set_affinity_lock ] Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] LKML-Reference: <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]>
2010-10-29MIPS: Octeon: Add register definitions for EHCI / OHCI USB glue logic.David Daney1-0/+261
The EHCI and OHCI blocks connection to the I/O bus is controlled by these registers. Signed-off-by: David Daney <[email protected]> To: [email protected] To: [email protected] Patchwork: http://patchwork.linux-mips.org/patch/1674/ Acked-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Ralf Baechle <[email protected]> create mode 100644 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
2010-10-29MIPS: Octeon: Add octeon_get_io_clock_rate() for cn63xxDavid Daney1-0/+1
Starting with cn63xx Octeon I/O blocks are clocked at a different rate than the CPU. Add a new function octeon_get_io_clock_rate() that yields the I/O clock rate. Also rearrange octeon_get_clock_rate() to get the value from the saved sysinfo structure. Signed-off-by: David Daney <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/1671/ Signed-off-by: Ralf Baechle <[email protected]>
2010-10-29MIPS: Octeon: Update L2 Cache code for CN63XXDavid Daney2-95/+141
The CN63XX has a different L2 cache architecture. Update the helper functions to reflect this. Some joining of split lines was also done to improve readability, as well as reformatting of comments. Signed-off-by: David Daney <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/1663/ Signed-off-by: Ralf Baechle <[email protected]>
2010-10-29MIPS: Octeon: Add cn63XX to Octeon chip detection macros.David Daney1-8/+28
Signed-off-by: David Daney <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/1661/ Signed-off-by: Ralf Baechle <[email protected]>
2010-10-29MIPS: Octeon: Update register definitions for CN63XX chipsDavid Daney20-2161/+4212
The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores. Join some lines back together. This makes some of them exceed 80 columns, but they are uninteresting and this unclutters things. Signed-off-by: David Daney <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/1668/ Signed-off-by: Ralf Baechle <[email protected]>
2010-10-29MIPS: Octeon: Rewrite DMA mapping functions.David Daney1-0/+10
All Octeon chips can support more than 4GB of RAM. Also due to how Octeon PCI is setup, even some configurations with less than 4GB of RAM will have portions that are not accessible from 32-bit devices. Enable the swiotlb code to handle the cases where a device cannot directly do DMA. This is a complete rewrite of the Octeon DMA mapping code. Signed-off-by: David Daney <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/1639/ Signed-off-by: Ralf Baechle <[email protected]>
2010-08-05MIPS: Octeon: Allow more than 3.75GB of memory with PCIeDavid Daney1-0/+13
We reserve the 3.75GB - 4GB region of PCIe address space for device to device transfers, making the corresponding physical memory under direct mapping unavailable for DMA. To allow for PCIe DMA to all physical memory we map this chunk of physical memory with BAR1. Because of the resulting discontinuity in the mapping function, we remove a page of memory at each end of the range so multi-page DMA buffers can never be allocated that span the range. Signed-off-by: David Daney <[email protected]> To: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/1535/ Signed-off-by: Ralf Baechle <[email protected]>
2010-08-05MIPS: Octeon: Implement delays with cycle counter.David Daney1-0/+1
Power throttling make deterministic delay loops impossible. Re-implement delays using the cycle counter. This also allows us to get rid of the code that calculates loops per jiffy. Signed-off-by: David Daney <[email protected]> To: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/1317/ Signed-off-by: Ralf Baechle <[email protected]>
2010-08-05MIPS: Octeon: HOTPLUG_CPU fixes.David Daney1-0/+2
* Rename camel-case InitTLBStart_addr to octeon_bootloader_entry_addr. * Convert calls to cvmx_read64_uint32(), to simple pointer dereferences. * Set proper ebase. * Don't confuse coreid and cpu numbers. * Try to maintain consistent bootloader coremask. * Update the signature and boot_init_vector of supported bootloaders. Signed-off-by: David Daney <[email protected]> To: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/1491/ Signed-off-by: Ralf Baechle <[email protected]>
2010-02-27MIPS: Cleanup switches with cases that can be mergedRoel Kluin1-6/+2
Signed-off-by: Roel Kluin <[email protected]> To: [email protected] To: Andrew Morton <[email protected]> To: LKML <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/860/ Signed-off-by: Ralf Baechle <[email protected]>
2010-02-27MIPS: Octeon: Add I2C platform device.David Daney1-0/+5
Signed-off-by: David Daney <[email protected]> To: [email protected] To: [email protected] To: [email protected] To: [email protected] Cc: Rade Bozic <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/847/ Signed-off-by: Ralf Baechle <[email protected]>
2009-12-17MIPS: Modularize COP2 handlingRalf Baechle1-0/+1
Away with the daemons of ifdef; get ready for future COP2 users. Signed-off-by: Ralf Baechle <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/708/
2009-12-17MIPS: Octeon: Add register definitions for MGMT Ethernet driver.David Daney2-0/+1442
Signed-off-by: David Daney <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2009-12-17NET: Add driver for Octeon MDIO buses.David Daney1-0/+178
The Octeon SOC has two types of Ethernet ports, each type with its own driver. However, the PHYs for all the ports are controlled by a common MDIO bus. Because the mdio driver is not associated with a particular driver, but is instead a system level resource, we create s stand-alone driver for it. As for the driver, we put the register definitions in arch/mips/include/asm/octeon where most of the other Octeon register definitions live. This is a platform driver with the platform device for "mdio-octeon" being registered in the platform startup code. Signed-off-by: David Daney <[email protected]> Acked-by: David S. Miller <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2009-09-17MIPS: Octeon: Add hardware RNG platform device.David Daney1-0/+88
Add a platform device for the Octeon Random Number Generator (RNG). Signed-off-by: David Daney <[email protected]> Acked-by: Herbert Xu <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2009-09-17MIPS: Octeon: Check all CCAs in cvmx_write_csr.David Daney1-1/+1
The current code only checks CCA of 0 when deciding if a dummy read is needed. Since the kernel can (and does) use other CCAs we need to mask out the CCA bits from the address. Since the address constant now fits in 16 bits, there is an added benefit that smaller code is generated. Signed-off-by: David Daney <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
2009-07-03MIPS: Reorganize Cavium OCTEON PCI support.David Daney1-0/+45
Move the cavium PCI files to the arch/mips/pci directory. Also cleanup comment formatting and code layout. Code from pci-common.c, was moved into other files. Signed-off-by: David Daney <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
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