| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
Users will get more complete functionality by using the appended DTB,
so delete the legacy booting support for this board.
Signed-off-by: Aaro Koskinen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13464/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Instead of rewriting the arguments, just move the appended dtb to where
the decompressed kernel expects it. This eliminates the need for special
casing vmlinuz.bin appended dtb files.
Signed-off-by: Jonas Gorski <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: John Crispin <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hogan <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Daniel Gimpelevich <[email protected]>
Cc: Antony Pavlov <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13698/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Here is the quote from [1]:
The unit-address must match the first address specified
in the reg property of the node. If the node has no reg property,
the @ and unit-address must be omitted and the node-name alone
differentiates the node from other nodes at the same level
This patch adjusts MIPS dts-files and devicetree binding
documentation in accordance with [1].
[1] Power.org(tm) Standard for Embedded Power Architecture(tm)
Platform Requirements (ePAPR). Version 1.1 – 08 April 2011.
Chapter 2.2.1.1 Node Name Requirements
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: Zubair Lutfullah Kakakhel <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13345/
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The DT fragment will select the ohci-platform driver, since that can
handle the JZ4740 OHCI just fine. While I don't have a JZ4740-based
board with anything connected to the USB host controller, I did test
the generic OHCI driver successfully on a JZ4770-based board.
The device is disabled by default; boards that want to use it can
override the "status" property. The mass-production Qi LB60 boards
don't use the USB host controller.
Signed-off-by: Maarten ter Huurne <[email protected]>
Cc: Lars-Peter Clausen <[email protected]>
Cc: Paul Cercueil <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13104/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The CPU actually runs at 1405Mhz which gives us a 175625000 Hz MIPS timer
frequency (CPU frequency / 8).
Fixes: e4c7d009654a ("MIPS: BMIPS: Add BCM7435 dtsi")
Signed-off-by: Florian Fainelli <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13132/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
- now clock nodes definition is merged with core .dtsi file
- only one rootclk is now part of DT
- clock clients also updated based on new binding doc
Signed-off-by: Purna Chandra Mandal <[email protected]>
Signed-off-by: Joshua Henderson <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Sandeep Sheriker <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13248/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
- Remove unneeded leds0 alias.
- Switch to bcm6345-l1-intc interrupt controller.
- Use interrupt-controller instead of periph_intc and cpu_intc.
- Add uart1 node.
- Single ohci and ehci nodes.
- Avoid using underscores in node names.
- Rename uart aliases to serial.
- Remove blank line in cpus node.
[[email protected]: fix references in bcm96368mvwg.dts so the file keeps
building.]
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
|
|
- Remove unneeded leds0 alias.
- Switch to bcm6345-l1-intc interrupt controller.
- Use interrupt-controller instead of periph_intc and cpu_intc.
- Add uart1, ehci and ohci nodes.
- Refactor syscon and syscon-reboot.
- Avoid using underscores in node names.
- Rename uart aliases to serial.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13043/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
This adds a device tree example for SFR Neufbox4 (Sercomm version), which
also serves as a real example for brcm,bcm6358-leds.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13041/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Fixes wrong bcm7425 SATA AHCI hardware interrupt property value with
periph_intc and SATA PHY unit address, and removes needless
brcm,broken-{ncq,phy} properties what are not used anywhere.
Signed-off-by: Jaedon Shin <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Dragan Stancevic <[email protected]>
Cc: Linux-MIPS <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/13017/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Add UART, I2C, SATA device tree nodes on Broadcom BCM7xxx MIPS-based
platforms.
Signed-off-by: Jaedon Shin <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Dragan Stancevic <[email protected]>
Cc: Linux-MIPS <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/13016/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Build the relocs tool as part of the kbuild
Signed-off-by: Matt Redfearn <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12980/
Patchwork: https://patchwork.linux-mips.org/patch/13242/
Patchwork: https://patchwork.linux-mips.org/patch/13233/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
This tool is based on the x86/boot/tools/relocs tool.
It parses the relocations present in the vmlinux elf file, building a
table of relocations that will be necessary to run the kernel from an
address other than its link address. This table is inserted into the
vmlinux elf, in the .data.relocs section. The table is subsequently used
by the code in arch/mips/kernel/relocate.c (added later) to relocate the
kernel.
The tool, by default, also marks all relocation sections as 0 length.
This is due to objcopy currently being unable to handle copying the
relocations between 64 and 32 bit elf files as is done when building a
64 bit kernel.
Signed-off-by: Matt Redfearn <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12981/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
This patch updates the compatible string in the easy50712.dts file to the new
"lantiq,danube-pinctrl".
Signed-off-by: Martin Schiller <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11589/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The following features are supported:
* UART;
* SPI-flash;
* USB host;
* GPIO key and LED.
Links:
* https://dptechnics.com/shop/index.php?route=product/product&path=59&product_id=50
* https://dptechnics.com/shop/index.php?route=product/product&path=59&product_id=63
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Daan Pape <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12886/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The following features are supported:
* UART;
* SPI-flash;
* USB host;
* GPIO key and LED.
Please see https://onion.io/omega for details.
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: L. D. Pinney <[email protected]>
Cc: Boken Lin <[email protected]>
Cc: Jacky Huang <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12884/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The following features are supported:
* UART;
* SPI-flash;
* USB host;
* GPIO keys and LEDs.
Links:
* http://www.dragino.com/products/mother-board/item/71-ms14-p.html
* https://wiki.openwrt.org/toh/dragino/ms14
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12882/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The following features are supported:
* UART;
* SPI-flash;
* USB host;
* GPIO keys and LEDs.
Links:
* http://www.tp-link.com/en/products/details/?model=TL-MR3020
* http://wiki.openwrt.org/toh/tp-link/tl-mr3020
* https://wikidevi.com/wiki/TP-LINK_TL-MR3020
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12880/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
This patch introduces devicetree for Atheros AR9331 SoC (AKA Hornet).
The AR9331 chip is a Wi-Fi System-On-Chip (WiSOC),
typically used in very cheap Access Points and Routers.
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12878/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Current ath79 clock.c code does not read reference clock and
pll setup from devicetree. E.g. you can set any clock rate value
in board DTS but it will have no effect on the real clk calculation.
This patch fixes some AR9132 devicetree clock support defects:
* clk initialization function ath79_clocks_init_dt_ng()
is introduced; it actually gets pll block base register
address and reference clock from devicetree;
* pll register parsing code is moved to the separate
ar724x_clk_init() function; this function
can be called from platform code or from devicetree code.
Also mips_hpt_frequency value is set from dt, so the appropriate
clock parameter is added to the cpu@0 devicetree node.
The same approach can be used for adding AR9331 devicetree support.
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12876/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The include/dt-bindings/clock/ath79-clk.h header file
is introduced so we can use symbolic identifiers for SoC clocks.
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12875/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Here are some Sascha Hauer's arguments for using aliases in the dts
files:
- using aliases reduces the number of indentations in dts files;
- dts files become independent of the layout of the dtsi files
(it becomes possible to introduce another bus {} hierarchy between
a toplevel bus and the devices when you have to);
- less chances for typos. if &i2c2 does not exist you get an error.
If instead you duplicate the whole path in the dts file a typo
in the path will just create another node.
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Frank Rowand <[email protected]>
Cc: Grant Likely <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12873/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The TP-LINK TL-WR1043ND board has only one serial port,
so replacing the default of 0 with 0 does nothing useful.
Moreover, the correct name for aliases node is "aliases" not "alias".
An overview of the "aliases" node usage can be found
on the device tree usage page at devicetree.org [1].
Also please see chapter 3.3 ("Aliases node") of the ePAPR 1.1 [2].
[1] http://devicetree.org/Device_Tree_Usage#aliases_Node
[2] https://www.power.org/documentation/epapr-version-1-1/
Signed-off-by: Antony Pavlov <[email protected]>
Acked-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12872/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Add DTS for EdgeRouter Lite that is usable as is without any "pruning"
with APPENDED_DTB.
Compared to builtin generic DTB, we can avoid errors and delays from
probing non-existent I2C devices.
Signed-off-by: Aaro Koskinen <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Add DTS for D-Link DSR-1000N that is usable as is without any "pruning"
with APPENDED_DTB. Split out the common parts from octeon_3xxx.dts
into octeon_3xxx.dtsi.
Compared to builtin generic DTB, we can specificy fixed links properly
and avoid probing non-existent I2C devices.
Signed-off-by: Aaro Koskinen <[email protected]>
Cc: David Daney <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12840/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Reuse the early printk code to support the serial in zboot. We copy
early_printk.c instead of referencing it because we need to build a
different object file for the normal kernel and zboot.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Alex Smith <[email protected]>
Cc: Wu Zhangjin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12234/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Now that appended DTB is usable we can drop the builtin DTB support.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12231/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Now that SMP properly works on 7435, do not restrict the number of core,
unleash them all.
Signed-off-by: Florian Fainelli <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12379/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
7435 has 4 7038 L1 base register address for each of its Core + TP (for a total
of 4 threads of execution), add the two missing cells for Core 1. We are
providing HW interrupts 2/3 even for Core 1/TP0/TP1 because that's what they
are, and we can later decide to remap these in software to provide proper
interrupt affinity/parenting.
Signed-off-by: Florian Fainelli <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12378/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The SUN GISB arbiter was added with the wrong compatible string, leading to
using the wrong register layout, use the correct compatible string for this
chip: brcm,bcm7435-gisb-arb.
Fixes: 8394968be4c7 ("MIPS: BMIPS: Add BCM7435 dtsi")
Signed-off-by: Florian Fainelli <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12285/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Current ath79 clock.c code does not read reference clock and
pll setup from devicetree. The ar724x_clocks_init() function
recreates the clocks from scratch so devicetree clock
information is dropped. After adding the code which picked up
reference clock from devicetree I have found
that kernel does not boot anymore. The SPI and UART drivers
can't get clk; here are the bootlog error messages:
of_serial: probe of 18020000.uart failed with error -22
ath79-spi: probe of 1f000000.spi failed with error -22
The problem is that clock code assumes that reference clock
name is "ref" but current dts-file uses another name: "oscillator".
This patch fixes the problem by changing external oscillator
dt node name to "ref".
Please note that there is an alternative solution for the problem:
> --- a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
> +++ b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
> @@ -16,6 +16,7 @@
>
> extosc: oscillator {
> compatible = "fixed-clock";
> + clock-output-names = "ref";
> #clock-cells = <0>;
> clock-frequency = <40000000>;
> };
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12874/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Signed-off-by: Antony Pavlov <[email protected]>
Acked-by: Rob Herring <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12869/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The copied source files must be added to the extra-y list to have them
removed on clean.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Alex Smith <[email protected]>
Cc: Wu Zhangjin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12233/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Some older GCC version (at least 4.6) emits calls to __bswapsi2() when
building the XZ decompressor. The link of the compressed image then
fails with the following error:
arch/mips/boot/compressed/decompress.o: In function '__fswab32':
include/uapi/linux/swab.h:60: undefined reference to '__bswapsi2'
Add bswapsi.o to the link to fix the build with these versions.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Alex Smith <[email protected]>
Cc: Wu Zhangjin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12232/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
Pull regmap updates from Mark Brown:
"This has been a very busy release for regmap, not just in cleaning up
the mess we got ourselves into with the endianness handling but also
in other areas too:
- Fixes for the endianness handling so that we now explicitly default
to little endian (the code used to do this by accident). This
fixes handling of explictly specified endianness on big endian
systems.
- Optimisation of the implementation of register striding.
- A refectoring of the _update_bits() code to reduce duplication.
- Fixes and enhancements for the interrupt implementation which make
it easier to use in a wider range of systems"
* tag 'regmap-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: (28 commits)
regmap: irq: add devm apis for regmap_{add,del}_irq_chip
regmap: replace regmap_write_bits()
regmap: irq: Enable irq retriggering for nested irqs
regmap: add regmap_fields_force_xxx() macros
regmap: add regmap_field_force_xxx() macros
regmap: merge regmap_fields_update_bits() into macro
regmap: merge regmap_fields_write() into macro
regmap: add regmap_fields_update_bits_base()
regmap: merge regmap_field_update_bits() into macro
regmap: merge regmap_field_write() into macro
regmap: add regmap_field_update_bits_base()
regmap: merge regmap_update_bits_check_async() into macro
regmap: merge regmap_update_bits_check() into macro
regmap: merge regmap_update_bits_async() into macro
regmap: merge regmap_update_bits() into macro
regmap: add regmap_update_bits_base()
regcache: flat: Introduce register strider order
regcache: Introduce the index parsing API by stride order
regmap: core: Introduce register stride order
regmap: irq: add devm apis for regmap_{add,del}_irq_chip
...
|
|
Ingenic SoC declares ZBOOT support, but debug definitions are missing
for MACH_JZ4780 resulting in a build failure when DEBUG_ZBOOT is set.
The UART addresses are same as with JZ4740, so fix by covering JZ4780
with those as well.
Signed-off-by: Aaro Koskinen <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12830/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Commit 29bb45f25ff3 (regmap-mmio: Use native endianness for read/write)
attempted to fix some long standing bugs in the MMIO implementation for
big endian systems caused by duplicate byte swapping in both regmap and
readl()/writel() which affected MIPS systems as when they are in big
endian mode they flip the endianness of all registers in the system, not
just the CPU. MIPS systems had worked around this by declaring regmap
using IPs as little endian which is inaccurate, unfortunately the issue
had not been reported.
Sadly the fix makes things worse rather than better. By changing the
behaviour to match the documentation it caused behaviour changes for
other IPs which broke them and by using the __raw I/O accessors to avoid
the endianness swapping in readl()/writel() it removed some memory
ordering guarantees and could potentially generate unvirtualisable
instructions on some architectures.
Unfortunately sorting out all this mess in any half way sensible fashion
was far too invasive to go in during an -rc cycle so instead let's go
back to the old broken behaviour for v4.5, the better fixes are already
queued for v4.6. This does mean that we keep the broken MIPS DTs for
another release but that seems the least bad way of handling the
situation.
Reported-by: Johannes Berg <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
|
|
On many MIPS systems the endianness of IP blocks is kept the same as
that of the CPU by the hardware. This includes the system controllers
on these systems which are controlled via syscon which uses the regmap
API which used readl() and writel() to interact with the hardware,
meaning that all writes are converted to little endian when writing to
the hardware. This caused a bad interaction with the regmap core in big
endian mode since it was not aware of the byte swapping and so ended up
performing little endian writes.
Unfortunately when this issue was noticed it was addressed by updating
the DT for the affected devices to specify them as little endian. This
happened to work since it resulted in two endianness swaps which
cancelled each other out and gave little endian behaviour but meant that
the DT was clearly not accurately describing the hardware.
The intention of commit 29bb45f25ff305 (regmap-mmio: Use native
endianness for read/write) was to fix this by making regmap default to
native endianness but this breaks most other MMIO users where the
hardware has a fixed endianness and the implementation uses the __raw
accessors which are not intended to be used outside of architecture
code. Instead use the newly added native-endian DT property to say
exactly what we want for these systems.
Fixes: 29bb45f25ff305 (regmap-mmio: Use native endianness for read/write)
Reported-by: Johannes Berg <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Acked-by: Ralf Baechle <[email protected]>
|
|
Pull MIPS updates from Ralf Baechle:
"This is the main pull request for MIPS for 4.5 plus some 4.4 fixes.
The executive summary:
- ATH79 platform improvments, use DT bindings for the ATH79 USB PHY.
- Avoid useless rebuilds for zboot.
- jz4780: Add NEMC, BCH and NAND device tree nodes
- Initial support for the MicroChip's DT platform. As all the device
drivers are missing this is still of limited use.
- Some Loongson3 cleanups.
- The unavoidable whitespace polishing.
- Reduce clock skew when synchronizing the CPU cycle counters on CPU
startup.
- Add MIPS R6 fixes.
- Lots of cleanups across arch/mips as fallout from KVM.
- Lots of minor fixes and changes for IEEE 754-2008 support to the
FPU emulator / fp-assist software.
- Minor Ralink, BCM47xx and bcm963xx platform support improvments.
- Support SMP on BCM63168"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (84 commits)
MIPS: zboot: Add support for serial debug using the PROM
MIPS: zboot: Avoid useless rebuilds
MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIB
MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() function
MIPS: bcm963xx: Update bcm_tag field image_sequence
MIPS: bcm963xx: Move extended flash address to bcm_tag header file
MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structure
MIPS: bcm63xx: nvram: Use nvram structure definition from header file
MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structure
MAINTAINERS: Add KVM for MIPS entry
MIPS: KVM: Add missing newline to kvm_err()
MIPS: Move KVM specific opcodes into asm/inst.h
MIPS: KVM: Use cacheops.h definitions
MIPS: Break down cacheops.h definitions
MIPS: Use EXCCODE_ constants with set_except_vector()
MIPS: Update trap codes
MIPS: Move Cause.ExcCode trap codes to mipsregs.h
MIPS: KVM: Make kvm_mips_{init,exit}() static
MIPS: KVM: Refactor added offsetof()s
MIPS: KVM: Convert EXPORT_SYMBOL to _GPL
...
|
|
As most platforms implement the PROM serial interface prom_putchar()
add a simple bridge to allow re-using this code for zboot.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Alex Smith <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Wu Zhangjin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11811/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Add dummy.o to the targets list, and fill targets automatically from
$(vmlinuzobjs) to avoid having to maintain two lists.
When building with XZ compression copy ashldi3.c to the build
directory to use a different object file for the kernel and zboot.
Without this the same object file need to be build with different
flags which cause a rebuild at every run.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Alex Smith <[email protected]>
Cc: Wu Zhangjin <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11810/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
This adds basic DTS configuration for the PIC32MZDA chip and in turn the
PIC32MZDA Starter Kit.
Signed-off-by: Joshua Henderson <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12104/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Add brcm,bcm6358-leds node to bcm6368.dtsi
Add reboot support (syscon-reboot as defined in BCM6328)
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: Álvaro Fernández Rojas <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/12117/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Adds bcm6328-leds node to bcm6328.dtsi
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: Álvaro Fernández Rojas <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/12116/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
and 'regmap/topic/seq' into regmap-next
|
|
Add device tree nodes for the NEMC and BCH to the JZ4780 device tree,
and make use of them in the Ci20 device tree to add a node for the
board's NAND.
Note that since the pinctrl driver is not yet upstream, this includes
neither pin configuration nor busy/write-protect GPIO pins for the
NAND. Use of the NAND relies on the boot loader to have left the pins
configured in a usable state, which should be the case when booted
from the NAND.
[[email protected]: fold in Geert Uytterhoeven's patch and acks from
Harvey's latest version.]
Signed-off-by: Alex Smith <[email protected]>
Signed-off-by: Harvey Hunt <[email protected]>
Reviewed-by: Boris Brezillon <[email protected]>
Cc: Zubair Lutfullah Kakakhel <[email protected]>
Cc: David Woodhouse <[email protected]>
Cc: Brian Norris <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: Alex Smith <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11695/
Patchwork: https://patchwork.linux-mips.org/patch/11914/
Patchwork: https://patchwork.linux-mips.org/patch/11985/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Kishon Vijay Abraham I <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11499/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
Signed-off-by: Alban Bedel <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Kishon Vijay Abraham I <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11498/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
There is 2 registers that is 8 bytes long, not 4.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Alexander Couzens <[email protected]>
Cc: Joel Porquet <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11508/
Signed-off-by: Ralf Baechle <[email protected]>
|
|
The regmap API has an endianness setting for formatting reads and writes.
This can be set by the usual DT "little-endian" and "big-endian" properties.
To work properly the associated regmap_bus needs to read/write in native
endian.
The "syscon" DT device binding creates an mmio-based regmap_bus which
performs all reads/writes as little-endian. These values are then converted
again by regmap, which means that all of the MIPS BCM boards (which are
big-endian) have been declared as "little-endian" to get regmap to convert
them back to big-endian.
Modify regmap-mmio to use the native-endian functions __raw_read*() and
__raw_write*() instead of the little-endian functions read*() and
write*().
Modify the big-endian MIPS BCM boards to use what will now be the correct
endianness instead of pretending that the devices are little-endian.
Signed-off-by: Simon Arlott <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
|