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2020-12-05MIPS: DTS: img: Fix schema warnings for pwm-ledsAlexander Dahl1-2/+3
The node names for devices using the pwm-leds driver follow a certain naming scheme (now). Parent node name is not enforced, but recommended by DT project. Signed-off-by: Alexander Dahl <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-17mips: bmips: dts: add BCM63268 reset controller supportÁlvaro Fernández Rojas1-0/+6
BCM63268 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-17mips: bmips: dts: add BCM6368 reset controller supportÁlvaro Fernández Rojas1-0/+6
BCM6368 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-17mips: bmips: dts: add BCM6362 reset controller supportÁlvaro Fernández Rojas1-0/+6
BCM6362 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-17mips: bmips: dts: add BCM6358 reset controller supportÁlvaro Fernández Rojas1-0/+6
BCM6358 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-17mips: bmips: dts: add BCM6328 reset controller supportÁlvaro Fernández Rojas1-0/+6
BCM6328 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-17MIPS: Ingenic: Add missing nodes for Ingenic SoCs and boards.周琰杰 (Zhou Yanjie)6-19/+313
1.Add OTG/OTG PHY/RNG nodes for JZ4780, CGU/OTG nodes for CI20. 2.Add OTG/OTG PHY/RNG/OST nodes for X1000, SSI/CGU/OST/OTG/SC16IS752 nodes for CU1000-Neo. 3.Add OTG/OTG PHY/DTRNG/OST nodes for X1830, SSI/CGU/OST/OTG/SC16IS752 nodes for CU1830-Neo. Tested-by: 周正 (Zhou Zheng) <[email protected]> Tested by: H. Nikolaus Schaller <[email protected]> # CI20/jz4780 Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-12MIPS: mscc: Add serval supportGregory CLEMENT5-1/+318
Add a device trees and FIT image support for the Microsemi Serval SoC which belongs to same family of the Ocelot SoC. It is based on the work of Lars Povlsen <[email protected]>. Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-12MIPS: mscc: Add jaguar2 supportGregory CLEMENT6-0/+626
Add a device trees and FIT image support for the Microsemi Jaguar2 SoC which belongs to same family of the Ocelot SoC. It is based on the work of Lars Povlsen <[email protected]>. Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-12MIPS: mscc: Add luton PC0B91 device treeGregory CLEMENT2-1/+34
Add a device tree for the Microsemi Luton PCB091 evaluation board. It is based on the work of Lars Povlsen <[email protected]>. Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-12MIPS: mscc: Add luton dtsiGregory CLEMENT1-0/+116
Add a device tree include file for the Microsemi Luton SoC which belongs to same family of the Ocelot SoC. It is based on the work of Lars Povlsen <[email protected]>. Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-12MIPS: mscc: Prepare configuration to handle more SoCsGregory CLEMENT2-2/+2
Ocelot belongs to a family of SoC named the VCore III. In order to add these new Soc, use the new symbol SOC_VCOREIII instead of a one dedicated to Ocelot. In order to avoid regression on driver building, the MSCC_OCELOT configuration symbol is kept until the driver will be converted. Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-12mips: dts: ralink: mt7628a: Harmonize EHCI/OHCI DT nodes nameSerge Semin1-1/+1
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-12mips: dts: sead3: Harmonize EHCI/OHCI DT nodes nameSerge Semin1-1/+1
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-11-12mips: dts: jz47x: Harmonize EHCI/OHCI DT nodes nameSerge Semin2-2/+2
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <[email protected]> Acked-by: Paul Cercueil <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-10-24Merge tag 'armsoc-drivers' of ↵Linus Torvalds3-0/+18
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms. A bulk of this is smaller fixes or cleanups, but some of the new material this time around is: - Support for Nvidia Tegra234 SoC - Ring accelerator support for TI AM65x - PRUSS driver for TI platforms - Renesas support for R-Car V3U SoC - Reset support for Cortex-M4 processor on i.MX8MQ There are also new socinfo entries for a handful of different SoCs and platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits) drm/mediatek: reduce clear event soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api soc: mediatek: cmdq: add jump function soc: mediatek: cmdq: add write_s_mask value function soc: mediatek: cmdq: add write_s value function soc: mediatek: cmdq: add read_s function soc: mediatek: cmdq: add write_s_mask function soc: mediatek: cmdq: add write_s function soc: mediatek: cmdq: add address shift in jump soc: mediatek: mtk-infracfg: Fix kerneldoc soc: amlogic: pm-domains: use always-on flag reset: sti: reset-syscfg: fix struct description warnings reset: imx7: add the cm4 reset for i.MX8MQ dt-bindings: reset: imx8mq: add m4 reset reset: Fix and extend kerneldoc reset: reset-zynqmp: Added support for Versal platform dt-bindings: reset: Updated binding for Versal reset driver reset: imx7: Support module build soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk soc: fsl: qman: convert to use be32_add_cpu() ...
2020-10-16Merge tag 'mips_5.10' of ↵Linus Torvalds8-70/+200
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - removed support for PNX833x alias NXT_STB22x - included Ingenic SoC support into generic MIPS kernels - added support for new Ingenic SoCs - converted workaround selection to use Kconfig - replaced old boot mem functions by memblock_* - enabled COP2 usage in kernel for Loongson64 to make use of 16byte load/stores possible - cleanups and fixes * tag 'mips_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (92 commits) MIPS: DEC: Restore bootmem reservation for firmware working memory area MIPS: dec: fix section mismatch bcm963xx_tag.h: fix duplicated word mips: ralink: enable zboot support MIPS: ingenic: Remove CPU_SUPPORTS_HUGEPAGES MIPS: cpu-probe: remove MIPS_CPU_BP_GHIST option bit MIPS: cpu-probe: introduce exclusive R3k CPU probe MIPS: cpu-probe: move fpu probing/handling into its own file MIPS: replace add_memory_region with memblock MIPS: Loongson64: Clean up numa.c MIPS: Loongson64: Select SMP in Kconfig to avoid build error mips: octeon: Add Ubiquiti E200 and E220 boards MIPS: SGI-IP28: disable use of ll/sc in kernel MIPS: tx49xx: move tx4939_add_memory_regions into only user MIPS: pgtable: Remove used PAGE_USERIO define MIPS: alchemy: Share prom_init implementation MIPS: alchemy: Fix build breakage, if TOUCHSCREEN_WM97XX is disabled MIPS: process: include exec.h header in process.c MIPS: process: Add prototype for function arch_dup_task_struct MIPS: idle: Add prototype for function check_wait ...
2020-09-29net: mscc: ocelot: add definitions for VCAP ES0 keys, actions and targetVladimir Oltean1-1/+2
As a preparation step for the offloading to ES0, let's create the infrastructure for talking with this hardware block. Signed-off-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-09-29net: mscc: ocelot: add definitions for VCAP IS1 keys, actions and targetVladimir Oltean1-1/+2
As a preparation step for the offloading to IS1, let's create the infrastructure for talking with this hardware block. Signed-off-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-09-21MIPS: Loongson64: Add UART node for LS7A PCHTiezhu Yang1-0/+39
When I update the latest kernel on the Loongson platform used with LS7A bridge chip, the serial console has no output, this is because the machine uses LS7A UART0 instead of CPU UART0, add UART node for LS7A PCH to enhance the compatibility. Signed-off-by: Tiezhu Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-09-21MIPS: Ingenic: Add CPU nodes for Ingenic SoCs.周琰杰 (Zhou Yanjie)6-1/+93
Add 'cpus' node to the jz4725b.dtsi, jz4740.dtsi, jz4770.dtsi, jz4780.dtsi, x1000.dtsi, and x1830.dtsi files. Tested-by: H. Nikolaus Schaller <[email protected]> Tested-by: Paul Boddie <[email protected]> Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Reviewed-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-09-07MIPS: dts/ingenic: Cleanup qi_lb60.dtsPaul Cercueil1-69/+68
Cleanup a bit the Device Tree file: 1. Respect the number of cells in GPIO descriptors and keyboard matrix; 2. Use 'ecc-engine' instead of deprecated 'ingenic,bch-controller' property; 3. The NAND's rb-gpios is actually active high; 3. The FRE/FWE pins must be configured in the proper mode for the NAND to work if it was not already done by the bootloader. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-08-17MIPS: BMIPS: dts: add BCM63268 power domain supportÁlvaro Fernández Rojas1-0/+6
BCM63268 SoCs have a power domain controller to enable/disable certain components in order to save power. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Acked-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2020-08-17MIPS: BMIPS: dts: add BCM6362 power domain supportÁlvaro Fernández Rojas1-0/+6
BCM6362 SoCs have a power domain controller to enable/disable certain components in order to save power. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Acked-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2020-08-17MIPS: BMIPS: dts: add BCM6328 power domain supportÁlvaro Fernández Rojas1-0/+6
BCM6328 SoCs have a power domain controller to enable/disable certain components in order to save power. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Acked-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2020-08-06Merge tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds18-130/+1904
Pull MIPS upates from Thomas Bogendoerfer: - improvements for Loongson64 - extended ingenic support - removal of not maintained paravirt system type - cleanups and fixes * tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (81 commits) MIPS: SGI-IP27: always enable NUMA in Kconfig MAINTAINERS: Update KVM/MIPS maintainers MIPS: Update default config file for Loongson-3 MIPS: KVM: Add kvm guest support for Loongson-3 dt-bindings: mips: Document Loongson kvm guest board MIPS: handle Loongson-specific GSExc exception MIPS: add definitions for Loongson-specific CP0.Diag1 register MIPS: only register FTLBPar exception handler for supported models MIPS: ingenic: Hardcode mem size for qi,lb60 board MIPS: DTS: ingenic/qi,lb60: Add model and memory node MIPS: ingenic: Use fw_passed_dtb even if CONFIG_BUILTIN_DTB MIPS: head.S: Init fw_passed_dtb to builtin DTB of: address: Fix parser address/size cells initialization of_address: Guard of_bus_pci_get_flags with CONFIG_PCI MIPS: DTS: Fix number of msi vectors for Loongson64G MIPS: Loongson64: Add ISA node for LS7A PCH MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCH MIPS: Loongson64: Enlarge IO_SPACE_LIMIT MIPS: Loongson64: Process ISA Node in DeviceTree of_address: Add bus type match for pci ranges parser ...
2020-08-04MIPS: KVM: Add kvm guest support for Loongson-3Huacai Chen2-0/+103
Loongson-3 KVM guest is based on virtio, it use liointc as its interrupt controller and use GPEX as the pci controller. Signed-off-by: Huacai Chen <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-31MIPS: DTS: ingenic/qi,lb60: Add model and memory nodePaul Cercueil1-0/+6
Add a memory node, which was missing until now, and use the retail name "Ben Nanonote" as the model, as it is way more known under that name than under the name "LB60". Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-30MIPS: DTS: Fix number of msi vectors for Loongson64GHuacai Chen1-2/+6
HT irqs vectors are 8 groups, each group has 32 irqs, Loongson64C CPUs can use only 4 groups and Loongson64G CPUs can use all 8 groups. So the number of msi vectors of Loongson64G is 192 (32*8 - 64 = 192). Fixes: 24af105962c8004edb9f5bf84 ("MIPS: Loongson64: DeviceTree for LS7A PCH") Signed-off-by: Huacai Chen <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-28MIPS: Loongson64: Add ISA node for LS7A PCHJiaxun Yang1-0/+7
Although currently we're not enabling any ISA device in devicetree, but this node is required to express the ranges of address reserved for ISA. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-28MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCHJiaxun Yang1-2/+2
Ranges should express the actual physical address on bus. Also enlarge the PCI I/O size to the actual hardware limit. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-28MIPS: qi_lb60: Fix routing to audio amplifierPaul Cercueil1-1/+1
The ROUT (right channel output of audio codec) was connected to INL (left channel of audio amplifier) instead of INR (right channel of audio amplifier). Fixes: 8ddebad15e9b ("MIPS: qi_lb60: Migrate to devicetree") Cc: [email protected] # v5.3 Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-26MIPS: ingenic: JZ4725B: Add IPU nodePaul Cercueil2-1/+35
Add a devicetree node for the Image Processing Unit (IPU) found in the JZ4725B. Connect it with graph nodes to the LCD node. The LCD driver will expect the IPU node to be accessed through graph port #8, as stated in the bindings documentation. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-16MIPS: Ingenic: Fix bugs and add missing LED node for X1000.周琰杰 (Zhou Yanjie)2-122/+118
1.The CU1000-Neo board actually uses X1000E instead of X1000, so the wrongly written "ingenic,x1000" in compatible should be changed to "ingenic,x1000e". 2.Adjust the order of nodes according to the corresponding address value. 3.Drop unnecessary node in "wlan_pwrseq". 4.Add the leds node to "cu1000-neo.dts". Tested-by: 周正 (Zhou Zheng) <[email protected]> Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-16MIPS: Ingenic: Add YSH & ATIL CU Neo board support.周琰杰 (Zhou Yanjie)2-0/+169
Add a device tree and a defconfig for the Ingenic X1830 based YSH & ATIL CU Neo board. Tested-by: 周正 (Zhou Zheng) <[email protected]> Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-16MIPS: Ingenic: Add Ingenic X1830 support.周琰杰 (Zhou Yanjie)1-0/+300
Support the Ingenic X1830 SoC using the code under arch/mips/jz4740. This is left unselectable in Kconfig until a X1830 based board is added in a later commit. Tested-by: 周正 (Zhou Zheng) <[email protected]> Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-16MIPS: Loongson64: DeviceTree for LS7A PCHJiaxun Yang5-1/+510
Add DeviceTree files for Classic Loongson64 Quad Core + LS7A boards and Generic Loongson64 Quad Core + LS7A boards. Signed-off-by: Huacai Chen <[email protected]> Signed-off-by: Jiaxun Yang <[email protected]> Tested-by: Tiezhu Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-16MIPS: Loongson64: Fix machine namingHuacai Chen2-2/+2
From previous commits, the machine names with "loongson3-" prefix have renamed to "loongson64c-" prefix in documents, but the .dts files have not been updated as well. So fix it. Signed-off-by: Huacai Chen <[email protected]> Tested-by: Tiezhu Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-16MIPS: ingenic: Add support for the RS90 boardPaul Cercueil2-0/+312
The RS-90, better known as RetroMini, is a small and pocketable handheld gaming console from YLMChina. It has little more than a JZ4725B SoC, a NAND, a screen, some buttons and a speaker. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-16MIPS: ingenic: Add support for the JZ4725B SoCPaul Cercueil1-0/+334
Add preliminary support for boards based on the JZ4725B SoC from Ingenic. The JZ4725B SoC is supposed to be older than the JZ4740 SoC, but its internals are much closer to what can be found on the JZ4750 and newer SoCs. It is low-power SoC with a MIPS32r1 SoC running at ~360 MHz, and no FPU. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-11Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller1-1/+1
All conflicts seemed rather trivial, with some guidance from Saeed Mameed on the tc_ct.c one. Signed-off-by: David S. Miller <[email protected]>
2020-07-08MIPS: Loongson: Update dts file for RS780EHuacai Chen1-2/+2
The size of ioports in the current RS780E dts file is not enough, which sometimes causes device initialize fail. So we increase the size of ISA/ LPC ioports to 0x4000, and increase the size of PCI ioports to 0x8000. Signed-off-by: Huacai Chen <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-07-08MIPS: Loongson: Rename CPU device-tree bindingHuacai Chen4-3/+3
Loongson-3A R1/R2/R3 and Loongson-3B R1/R2 use the same package naming in dts, and Loongson-3A R4 will be different. In cpu.h the classic 64bit Loongson processors are called Loongson64C (C for classic, pre Loongson- 3A R4), and the new 64bit Loongson processors are called Loongson64G (G for generic, Loongson-3A R4+). To keep consistency and make extensible, we rename the classic "loongson3" prefix to "loongson64c", and the new prefix for Loongson-3A R4+ will be "loongson64g". Signed-off-by: Huacai Chen <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-06-25MIPS: ingenic: gcw0: Fix HP detection GPIO.João H. Spies1-1/+1
Previously marked as active high, but is in reality active low. Cc: [email protected] Fixes: b1bfdb660516 ("MIPS: ingenic: DTS: Update GCW0 support") Signed-off-by: João H. Spies <[email protected]> Tested-by: Paul Cercueil <[email protected]> Reviewed-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-06-24MIPS: dts: ocelot: describe the load/save GPIOQuentin Schulz1-1/+11
This patch adds a description of the load/save GPIN pin, used in the VSC8584 PHY for timestamping operations. The related pinctrl description is also added. Signed-off-by: Quentin Schulz <[email protected]> Signed-off-by: Antoine Tenart <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-05-28MIPS: DTS: Fix build errors used with various configsTiezhu Yang1-0/+2
If CONFIG_MIPS_MALTA is not set but CONFIG_LEGACY_BOARD_SEAD3 is set, the subdir arch/mips/boot/dts/mti will not be built, so the sead3.dts which depends on CONFIG_LEGACY_BOARD_SEAD3 in this subdir is also not built, and then there exists the following build error, fix it. LD .tmp_vmlinux.kallsyms1 arch/mips/generic/board-sead3.o:(.mips.machines.init+0x4): undefined reference to `__dtb_sead3_begin' Makefile:1106: recipe for target 'vmlinux' failed make: *** [vmlinux] Error 1 Additionally, add CONFIG_FIT_IMAGE_FDT_BOSTON check for subdir img to fix the following build error when CONFIG_MACH_PISTACHIO is not set but CONFIG_FIT_IMAGE_FDT_BOSTON is set. FATAL ERROR: Couldn't open "boot/dts/img/boston.dtb": No such file or directory Reported-by: kbuild test robot <[email protected]> Reported-by: Guenter Roeck <[email protected]> Fixes: 41528ba6afe6 ("MIPS: DTS: Only build subdir of current platform") Signed-off-by: Tiezhu Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-05-27MIPS: ingenic: Add support for GCW Zero prototypePaul Cercueil1-0/+13
Add support for the GCW Zero prototype. The only (?) difference is that it only has 256 MiB of RAM, compared to the 512 MiB of RAM of the retail device. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-05-27MIPS: ingenic: DTS: Add memory info of GCW ZeroPaul Cercueil1-0/+6
Add memory info of the GCW Zero in its devicetree. The bootloader generally provides this information, but since it is fixed to 512 MiB, it doesn't hurt to have it in devicetree. It allows the kernel to boot without any parameter passed as argument. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-05-27MIPS: DTS: Loongson64: Add PCI Controller NodeJiaxun Yang1-0/+12
Add PCI Host controller node for Loongson64 with RS780E PCH dts. Note that PCI interrupts are probed via legacy way, as different machine have different interrupt arrangement, we can't cover all of them in dt. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2020-05-24MIPS: DTS: Only build subdir of current platformTiezhu Yang1-14/+14
Add config check in Makefile to only build the subdir of current platform. E.g. without this patch: AR arch/mips/built-in.a AR arch/mips/boot/dts/brcm/built-in.a AR arch/mips/boot/dts/cavium-octeon/built-in.a AR arch/mips/boot/dts/img/built-in.a AR arch/mips/boot/dts/ingenic/built-in.a AR arch/mips/boot/dts/lantiq/built-in.a DTC arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb DTB arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.S AS arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.o DTC arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb DTB arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.S AS arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.o AR arch/mips/boot/dts/loongson/built-in.a AR arch/mips/boot/dts/mscc/built-in.a AR arch/mips/boot/dts/mti/built-in.a AR arch/mips/boot/dts/netlogic/built-in.a AR arch/mips/boot/dts/ni/built-in.a AR arch/mips/boot/dts/pic32/built-in.a AR arch/mips/boot/dts/qca/built-in.a AR arch/mips/boot/dts/ralink/built-in.a AR arch/mips/boot/dts/xilfpga/built-in.a AR arch/mips/boot/dts/built-in.a With this patch: AR arch/mips/built-in.a DTC arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb DTB arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.S AS arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.o DTC arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb DTB arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.S AS arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.o AR arch/mips/boot/dts/loongson/built-in.a AR arch/mips/boot/dts/built-in.a Signed-off-by: Tiezhu Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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