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2014-01-24mips: delete non-required instances of include <linux/init.h>Paul Gortmaker1-1/+0
None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: Paul Gortmaker <[email protected]> Signed-off-by: John Crispin <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/6320/
2013-10-29MIPS: ath79: Remove ar933x_uart_platform.h headerGabor Juhos1-6/+0
In commit 15ef17f622033455dcf03ae96256e474073a7b11 (tty: ar933x_uart: use the clk API to get the uart clock), the AR933x UART driver for has been converted to get the uart clock rate via the clock API and it does not use the platform data anymore. Remove the ar933x_uart_platform.h header file and get rid of the superfluous variable and initialization code in platform setup. Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5832/ Signed-off-by: Ralf Baechle <[email protected]>
2013-09-03MIPS: ath79: Switch to the clkdev frameworkGabor Juhos2-72/+54
The ath79 code uses static clock devices and provides its own clk_{get,put} implementations. Change the code to use dynamically allocated clock devices and register the clocks within the clkdev framework. Additionally, remove the local clk_{get,put} implementation. The clkdev framework has a common implementation of those. Also move the call of ath79_clock_init() from plat_mem_init() to plat_time_init(). Otherwise it would not be possible to use memory allocation functions from ath79clock_init() becasuse the memory subsystem is not yet initialized when plat_mem_init() runs. Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5780/ Signed-off-by: Ralf Baechle <[email protected]>
2013-09-03MIPS: ath79: Use local variables for clock ratesGabor Juhos1-52/+106
Use local variables for ref, cpu, ddr and ahb rates in SoC specific clock init functions. The patch has no functional changes, it is an interim change in preparation of the next patch. Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5781/ Signed-off-by: Ralf Baechle <[email protected]>
2013-09-03MIPS: ath79: Use ath79_get_sys_clk_rate to get basic clock ratesGabor Juhos2-11/+12
Instead of accessing the rate field of the static clock devices directly, use the recently introduced helper function to get the rate of the basic clocks. The static ath79_{ahb,cpu,ddr,ref}_clk variables will be removed by a subsequent patch. The actual change is in preparation of that. Also move the clock frequency printing code into the plat_time_init function. We are getting the cpu clock rate there already so we can save an extra call of the helper. Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5782/ Signed-off-by: Ralf Baechle <[email protected]>
2013-09-03MIPS: ath79: Use a helper function to get system clock ratesGabor Juhos4-11/+25
The ath79 platform uses similar code to get the rate of various clocks during init. Separate the similar code into a new helper function and use that to avoid code duplication. Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5778/ Signed-off-by: Ralf Baechle <[email protected]>
2013-09-03MIPS: ath79: Use local ref clock rate in ar934x_get_pll_freqGabor Juhos1-2/+2
The reference clock rate is passed in the first argument of the function. Use that instead of the rate of the global ath79_ref_clk variable. Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5779/ Signed-off-by: Ralf Baechle <[email protected]>
2013-09-03MIPS: ath79: Fix ar933x watchdog clockFelix Fietkau1-1/+1
The watchdog device on the AR933x is connected to the AHB clock, however the current code uses the reference clock. Due to the wrong rate, the watchdog driver can't calculate correct register values for a given timeout value and the watchdog unexpectedly restarts the system. The code uses the wrong value since the initial commit 04225e1d227c8e68d685936ecf42ac175fec0e54 (MIPS: ath79: add AR933X specific clock init) The patch fixes the code to use the correct clock rate to avoid the problem. Cc: [email protected] Signed-off-by: Felix Fietkau <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5777/ Signed-off-by: Ralf Baechle <[email protected]>
2013-07-14MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker1-1/+1
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream. The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. Here, we remove all the MIPS __cpuinit from C code and __CPUINIT from asm files. MIPS is interesting in this respect, because there are also uasm users hiding behind their own renamed versions of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 [[email protected]: Folded in Paul's followup fix.] Signed-off-by: Paul Gortmaker <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5494/ Patchwork: https://patchwork.linux-mips.org/patch/5495/ Patchwork: https://patchwork.linux-mips.org/patch/5509/ Signed-off-by: Ralf Baechle <[email protected]>
2013-06-21MIPS: ath79: Fix argument for the ap136_pc_init functionMarkos Chandras1-1/+1
ap136_pci_init expects a u8 pointer as an argument. Fixes the following build problem on a randconfig: arch/mips/ath79/mach-ap136.c:151:2: error: too many arguments to function 'ap136_pci_init' Signed-off-by: Markos Chandras <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5476/ Signed-off-by: Ralf Baechle <[email protected]>
2013-05-22MIPS: Idle: Consolidate all declarations in <asm/idle.h>.Ralf Baechle1-0/+1
Signed-off-by: Ralf Baechle <[email protected]>
2013-05-08MIPS: ath79: make use of the new memory detection codeJohn Crispin1-15/+1
There is now a generic function for detecting memory size. Use this instead of the one found in the ath79 support. Signed-off-by: John Crispin <[email protected]> Acked-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/5149/
2013-03-03Merge git://www.linux-watchdog.org/linux-watchdogLinus Torvalds1-6/+9
Pull watchdog updates from Wim Van Sebroeck: "This contains: - fixes and improvements - devicetree bindings - conversion to watchdog generic framework of the following drivers: - booke_wdt - bcm47xx_wdt.c - at91sam9_wdt - Removal of old STMP3xxx driver - Addition of following new drivers: - new driver for STMP3xxx and i.MX23/28 - Retu watchdog driver" * git://www.linux-watchdog.org/linux-watchdog: (30 commits) watchdog: sp805_wdt depends on ARM watchdog: davinci_wdt: update to devm_* API watchdog: davinci_wdt: use devm managed clk get watchdog: at91rm9200: add DT support watchdog: add timeout-sec property binding watchdog: at91sam9_wdt: Convert to use the watchdog framework watchdog: omap_wdt: Add option nowayout watchdog: core: dt: add support for the timeout-sec dt property watchdog: bcm47xx_wdt.c: add hard timer watchdog: bcm47xx_wdt.c: rename wdt_time to timeout watchdog: bcm47xx_wdt.c: rename ops methods watchdog: bcm47xx_wdt.c: use platform device watchdog: bcm47xx_wdt.c: convert to watchdog core api watchdog: Convert BookE watchdog driver to watchdog infrastructure watchdog: s3c2410_wdt: Use devm_* functions watchdog: remove old STMP3xxx driver watchdog: add new driver for STMP3xxx and i.MX23/28 rtc: stmp3xxx: add wdt-accessor function watchdog: introduce retu_wdt driver watchdog: intel_scu_watchdog: fix Kconfig dependency ...
2013-03-01watchdog: ath79_wdt: get register base from platform device's resourcesGabor Juhos1-1/+9
The ath79_wdt driver uses a fixed memory address currently. Although this is working with each currently supported SoCs, but this may change in the future. Additionally, the driver includes platform specific header files in order to be able to get the memory base of the watchdog device. The patch adds a memory resource to the platform device, and converts the driver to get the base address of the watchdog device from that. Signed-off-by: Gabor Juhos <[email protected]> Signed-off-by: Wim Van Sebroeck <[email protected]>
2013-03-01MIPS: ath79: use dynamically allocated watchdog deviceGabor Juhos1-6/+1
Remove the static watchdog device variable and use the 'platform_device_register_simple' helper to allocate and register the device in one step. This allows us to save a few bytes in the kernel image. Signed-off-by: Gabor Juhos <[email protected]> Signed-off-by: Wim Van Sebroeck <[email protected]>
2013-02-21Merge branch 'mips-next-3.9' of ↵Ralf Baechle15-168/+682
git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
2013-02-19MIPS: ath79: add support for the Qualcomm Atheros AP136-010 boardGabor Juhos4-0/+170
Also enable the board in the default configuration. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4953/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add USB controller registration code for the QCA955X SoCsGabor Juhos1-0/+15
Register platfom devices for the built-in USB controllers of the SoCs. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4952/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add PCI controller registration code for the QCA955X SoCsGabor Juhos2-0/+38
Add SoC specific PCI IRQ map, and register platform devices for the two built-in PCIe RCs. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4951/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add WMAC registration code for the QCA955X SoCsGabor Juhos2-1/+21
The SoC has a built-in wireless MAC. Register a platform device for that to make it usable with the ath9k driver. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4956/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: register UART for the QCA955X SoCsGabor Juhos1-1/+2
Similarly to the preceding SoCs, the QCA955X SoCs also have a built-in NS16650 compatible UART. Register the platform device for that to make it usable. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4949/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}Gabor Juhos1-0/+4
The ath79_device_reset_* are causing BUG when those are used on the QCA955x SoCs. The patch adds the required code to avoid that. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4948/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add GPIO setup code for the QCA955X SoCsGabor Juhos1-1/+3
The existing code can handle the GPIO controller of the QCA955x SoCs. Add a minimal glue code to make it working. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4947/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add IRQ handling code for the QCA955X SoCsGabor Juhos1-7/+103
The IRQ routing in the QCA955x SoCs is slightly different from the routing implemented in the already supported SoCs. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4955/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add clock setup code for the QCA955X SoCsGabor Juhos1-0/+78
The patch adds code to get various clock frequencies from the PLLs used in the QCA955x SoCs. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4945/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add SoC detection code for the QCA955X SoCsGabor Juhos2-1/+21
Also add 'soc_is_qca955[68x]' helper functions and a Kconfig symbol for the SoC family. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4943/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: add early printk support for the QCA955X SoCsGabor Juhos1-0/+2
The patch allows to see kernel messages on the QCA955X SoCs in early boot stage. Cc: Rodriguez, Luis <[email protected]> Cc: Giori, Kathy <[email protected]> Cc: QCA Linux Team <[email protected]> Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4944/ Signed-off-by: John Crispin <[email protected]>
2013-02-19MIPS: ath79: fix WMAC IRQ resource assignmentGabor Juhos1-1/+1
The '.start' field of the IRQ resource assigned twice in ar934x_wmac_setup(). The second assignment must set the '.end' field. Fix it. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4954/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: ath79: use dynamically allocated USB platform devicesGabor Juhos1-60/+51
The current code uses static resources and static platform device instances for the possible USB controllers in the system. These static variables contains initial values which leads to data segment pollution. Remove the static variables and use dynamically allocated structures instead. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4933/ Signed-off-by: John Crispin <[email protected]>
2013-02-17ath79: remove ATH79_MISC_IRQ_* definesGabor Juhos3-5/+5
Use the ATH79_MISC_IRQ() macro instead. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4930/ Signed-off-by: John Crispin <[email protected]>
2013-02-17ath79: add ATH79_CPU_IRQ() macroGabor Juhos4-29/+29
Remove the individual ATH79_CPU_IRQ_* constants and use the new macro instead of those. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4929/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: pci-ar71xx: remove static PCI IO/MEM resourcesGabor Juhos1-1/+11
Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4927/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: pci-ar724x: setup command register of the PCI controllerGabor Juhos1-1/+9
The command register of the PCI controller is not initialized correctly by the bootloader on some boards and this leads to non working PCI bus. Add code to initialize the command register from the Linux code to avoid this. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4916/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: pci-ar724x: remove static PCI IO/MEM resourcesGabor Juhos1-1/+20
Static resources become impractical when multiple PCI controllers are present. Move the resources into the platform device registration code and change the probe routine to get those from there platform device's resources. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4914/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: ath79: allow to specify bus number in PCI IRQ mapsGabor Juhos2-1/+4
This is needed for multiple PCI bus support. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4913/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functionsGabor Juhos1-1/+0
The functions are unused now, so remove them. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4909/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: ath79: register platform devices for the PCI controllersGabor Juhos1-9/+78
The pci-ar71xx and pci-ar724x drivers were converted into platform drivers. Register the corresponding platform devices for the PCI controllers instead of using the ar7{1x,24}x_pcibios_init functions. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4908/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: ath79: simplify MISC IRQ handlingGabor Juhos1-36/+9
The current code uses multiple if statements for demultiplexing the different interrupt sources. Additionally, the MISC interrupt controller has 32 interrupt sources and the current code does not handles all of them. Get rid of the if statements and process all interrupt sources in a loop to fix these issues. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4874/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: ath79: simplify ath79_gpio_function_* routinesGabor Juhos1-24/+6
Make ath79_gpio_function_{en,dis}able to be wrappers around ath79_gpio_function_setup. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4871/ Signed-off-by: John Crispin <[email protected]>
2013-02-17MIPS: ath79: fix GPIO function selection for AR934x SoCsGabor Juhos1-12/+26
GPIO function selection is not working on the AR934x SoCs because the offset of the function selection register is different on those. Add a helper routine which returns the correct register address based on the SoC type, and use that in the 'ath79_gpio_function_*' routines. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4870/ Signed-off-by: John Crispin <[email protected]>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle5-7/+7
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <[email protected]>
2012-10-31USB: EHCI: remove ehci_port_power() routineAlan Stern1-2/+0
This patch (as1623) removes the ehci_port_power() routine and all the places that call it. There's no reason for ehci-hcd to change the port power settings; the hub driver takes care of all that stuff. There is one exception: When the controller is resumed from hibernation or following a loss of power, the ports that are supposed to be handed over to a companion controller must be powered on first. Otherwise the handover won't work. This process is not visible to the hub driver, so it has to be handled in ehci-hcd. Signed-off-by: Alan Stern <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2012-10-01MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLsGabor Juhos1-28/+81
Besides the CPU and DDR PLLs, the CPU and DDR frequencies can be derived from other PLLs in the SRIF block on the AR934x SoCs. The current code does not checks if the SRIF PLLs are used and this can lead to incorrectly calculated CPU/DDR frequencies. Fix it by calculating the frequencies from SRIF PLLs if those are used on a given board. Signed-off-by: Gabor Juhos <[email protected]> Cc: <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/4324/ Signed-off-by: Ralf Baechle <[email protected]>
2012-10-01MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934xGabor Juhos1-2/+2
The current dividers in the code are wrong and this leads to broken CPU frequency calculation on boards where the fractional part is used. For example, if the SoC is running from a 40MHz reference clock, refdiv=1, nint=14, outdiv=0 and nfrac=31 the real frequency is 579.375MHz but the current code calculates 569.687MHz instead. Because the system time is indirectly related to the CPU frequency the broken computation causes drift in the system time. The correct divider is 2^6 for the CPU PLL and 2^10 for the DDR PLL. Use the correct values to fix the issue. Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/4305/ Signed-off-by: Ralf Baechle <[email protected]>
2012-08-28MIPS: ath79: register USB host controller on the DB120 boardGabor Juhos1-0/+2
Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4173/ Signed-off-by: John Crispin <[email protected]>
2012-08-28MIPS: ath79: add USB platform setup code for AR934XGabor Juhos1-0/+28
Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4172/ Signed-off-by: John Crispin <[email protected]>
2012-08-28MIPS: ath79: use a helper function for USB resource initializationGabor Juhos1-36/+28
This improves code readability, and ensures that all resource fields will be initialized correctly. Additionally, it helps to reduce the size of the kernel image by using uninitialized resource variables. Signed-off-by: Gabor Juhos <[email protected]> Patchwork: http://patchwork.linux-mips.org/patch/4171/ Signed-off-by: John Crispin <[email protected]>
2012-08-17MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240Gabor Juhos1-0/+2
The currently assigned IRQ number to the OHCI controller is incorrect for the AR7240 SoC, and that leads to the following error message from the OHCI driver: ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver ath79-ohci ath79-ohci: Atheros built-in OHCI controller ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1 ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000 hub 1-0:1.0: USB hub found hub 1-0:1.0: 1 port detected usb 1-1: new full-speed USB device number 2 using ath79-ohci ath79-ohci ath79-ohci: Unlink after no-IRQ? Controller is probably using the wrong IRQ. Fix this by using the correct IRQ number. Signed-off-by: Gabor Juhos <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/4168/ Signed-off-by: Ralf Baechle <[email protected]>
2012-08-17MIPS: ath79: Fix number of GPIO lines for AR724[12]Gabor Juhos1-2/+4
The AR724[12] SoCs have more GPIO lines than the AR7240. Signed-off-by: Gabor Juhos <[email protected]> Cc: Cc: [email protected] Patchwork: https://http://patchwork.linux-mips.org/patch/4167/ Signed-off-by: Ralf Baechle <[email protected]>
2012-05-15MIPS: ath79: add initial support for the Atheros DB120 boardGabor Juhos4-0/+148
Signed-off-by: Gabor Juhos <[email protected]> Acked-by: Luis R. Rodriguez <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/3517/ Signed-off-by: Ralf Baechle <[email protected]>
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