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Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12879/
Signed-off-by: Ralf Baechle <[email protected]>
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For OF boards we have to skip platform initialization code
so we can prove that OF code do all necessary initialization.
[[email protected]: Fix merge conflict.]
Signed-off-by: Antony Pavlov <[email protected]>
Signed-off-by: Sudip Mukherjee <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12877/
Patchwork: https://patchwork.linux-mips.org/patch/12920/
Signed-off-by: Ralf Baechle <[email protected]>
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Current ath79 clock.c code does not read reference clock and
pll setup from devicetree. E.g. you can set any clock rate value
in board DTS but it will have no effect on the real clk calculation.
This patch fixes some AR9132 devicetree clock support defects:
* clk initialization function ath79_clocks_init_dt_ng()
is introduced; it actually gets pll block base register
address and reference clock from devicetree;
* pll register parsing code is moved to the separate
ar724x_clk_init() function; this function
can be called from platform code or from devicetree code.
Also mips_hpt_frequency value is set from dt, so the appropriate
clock parameter is added to the cpu@0 devicetree node.
The same approach can be used for adding AR9331 devicetree support.
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12876/
Signed-off-by: Ralf Baechle <[email protected]>
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The include/dt-bindings/clock/ath79-clk.h header file
is introduced so we can use symbolic identifiers for SoC clocks.
Signed-off-by: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12875/
Signed-off-by: Ralf Baechle <[email protected]>
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Don't set _machine_restart() on OF machines as the reset driver
now provides a system restart handler.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12235/
Signed-off-by: Ralf Baechle <[email protected]>
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Now that appended DTB is usable we can drop the builtin DTB support.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12231/
Signed-off-by: Ralf Baechle <[email protected]>
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This is needed for bootloader supporting UHI and to support appended
DTB.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: Antony Pavlov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12230/
Signed-off-by: Ralf Baechle <[email protected]>
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This makes the ath79 bootconsole behave the same way as the generic 8250
bootconsole.
Also waiting for TEMT (transmit buffer is empty) instead of just THRE
(transmit buffer is not full) ensures that all characters have been
transmitted before the real serial driver starts reconfiguring the serial
controller (which would sometimes result in garbage being transmitted.)
This change does not cause a visible performance loss.
In addition, this seems to fix a hang observed in certain configurations on
many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver.
A more complete follow-up patch will disable 8250 autoconfig for ath79
altogether (the serial controller is detected as a 16550A, which is not
fully compatible with the ath79 serial, and the autoconfig may lead to
undefined behavior on ath79.)
Cc: <[email protected]>
Signed-off-by: Matthias Schiffer <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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The reference clock on ar913x is at 40MHz and not 5MHz. The current
implementation use the wrong reference rate because it doesn't take
the PLL divider in account. But if we fix the code to use the divider
it becomes identical with the implementation for ar724x, so just drop
the broken ar913x implementation.
Signed-off-by: Alban Bedel <[email protected]>
Tested-by: Antony Pavlov <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12871/
Signed-off-by: Ralf Baechle <[email protected]>
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According to the AR7242 datasheet section 2.8, AR724X CPUs use a 40MHz
input clock as the REF_CLK instead of 5MHz.
The correct CPU PLL calculation procedure is as follows:
CPU_PLL = (FB * REF_CLK) / REF_DIV / 2.
This patch is compatible with the current calculation procedure with
default FB and REF_DIV values.
Tested on AR7240, AR7241 and AR7242.
Signed-off-by: Weijie Gao <[email protected]>
Signed-off-by: Alban Bedel <[email protected]> (Fixed the commit log message)
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12870/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Alban Bedel <[email protected]>
Acked-by: Marc Zyngier <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Jason Cooper <[email protected]>
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The driver stays the same but the initialization changes a bit.
For OF boards we now get the memory map from the OF node and use
a linear mapping instead of the legacy mapping. For legacy boards
we still use a legacy mapping and just pass down all the parameters
from the board init code.
Signed-off-by: Alban Bedel <[email protected]>
Acked-by: Marc Zyngier <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Jason Cooper <[email protected]>
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Remove the unused defines for the reference clocks rate
and the useless machine init function.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11505/
Signed-off-by: Ralf Baechle <[email protected]>
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Move the declaration of ath79_ddr_wb_flush() to asm/mach-ath79/ath79.h
to allow using it from drivers. This is needed to move the CPU IRQ
driver to drivers/irqchip.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Alexander Couzens <[email protected]>
Cc: Joel Porquet <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11502/
Signed-off-by: Ralf Baechle <[email protected]>
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To prepare moving out of the arch directory rework the MISC
implementation to use irq domains instead of hard coded IRQ numbers.
Also remove the uses of the ath79_reset_base global pointer in the IRQ
methods.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Alexander Couzens <[email protected]>
Cc: Joel Porquet <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11506/
Signed-off-by: Ralf Baechle <[email protected]>
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IRQCHIP is always enabled, so the #ifdef can just be removed.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Alexander Couzens <[email protected]>
Cc: Joel Porquet <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11504/
Signed-off-by: Ralf Baechle <[email protected]>
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As I'm using a board with a broken old bootloader I hardcoded the
mips_machtype and did't notice that the machine entry was still
missing.
[[email protected]: Fixed spelling message noticed by Sergei Shtylyov
<[email protected]>.]
Signed-off-by: Alban Bedel <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11503/
Signed-off-by: Ralf Baechle <[email protected]>
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The DDR control initialization needs to know the SoC type, however
ath79_detect_sys_type() was called after ath79_ddr_ctrl_init().
Reverse the order to fix the DDR control initialization on ar71xx and
ar934x.
Signed-off-by: Alban Bedel <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Andrew Bresticker <[email protected]>
CC: [email protected] # v4.2+
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11500/
Signed-off-by: Ralf Baechle <[email protected]>
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The ar7240 misc irq chip use ack handler
instead of ack_mask handler. All new ath79 chips use
the ar7240 misc irq chip
Signed-off-by: Alexander Couzens <[email protected]>
Acked-by: Alban Bedel <[email protected]>
Acked-by: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: [email protected]
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11164/
Signed-off-by: Ralf Baechle <[email protected]>
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The irq ack handler was forgotten while introducing OF support.
Only ar71xx and ar933x based devices require it.
Signed-off-by: Alexander Couzens <[email protected]>
Acked-by: Alban Bedel <[email protected]>
Acked-by: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: [email protected]
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11163/
Signed-off-by: Ralf Baechle <[email protected]>
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Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.
Remove the argument.
Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: Julia Lawall <[email protected]>
Cc: Jiang Liu <[email protected]>
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GPIO drivers should be in drivers/gpio
Signed-off-by: Alban Bedel <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Cc: [email protected]
Cc: Alexandre Courbot <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10597/
Signed-off-by: Ralf Baechle <[email protected]>
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To prepare moving the GPIO driver to drivers/gpio remove the
platform specific pinmux API. As it is not used by any board,
and such functionality should better be implemented using the
pinmux subsystem just removing it seems to be the best option.
Signed-off-by: Alban Bedel <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Cc: [email protected]
Cc: Alexandre Courbot <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10596/
Signed-off-by: Ralf Baechle <[email protected]>
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The various interrupt flow handlers in ath79 are cascading interrupt
handlers. They all have a disable_irq_nosync()/enable_irq() pair
around the generic_handle_irq() call. The value of this disable/enable
is zero because its a complete noop:
disable_irq_nosync() merily increments the disable count without
actually masking the interrupt. enable_irq() soleley decrements the
disable count without touching the interrupt chip. The interrupt
cannot arrive again because the complete call chain runs with
interrupts disabled.
Remove it.
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: LKML <[email protected]>
Cc: Jiang Liu <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/10703/
Signed-off-by: Ralf Baechle <[email protected]>
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Remove the ugly cross tree include now that IRQCHIP_DECLARE moved to
linux/irqchip.h.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Thomas Gleixner <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10633/
Signed-off-by: Ralf Baechle <[email protected]>
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get_c0_perfcount_int is tested from oprofile code. If oprofile is
compiled as module, get_c0_perfcount_int needs to be exported, otherwise
it cannot be resolved.
Fixes: a669efc4a3b4 ("MIPS: Add hook to get C0 performance counter interrupt")
Cc: [email protected] # v3.19+
Signed-off-by: Felix Fietkau <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10763/
Signed-off-by: Ralf Baechle <[email protected]>
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Add a DTS for TL-WR1043ND version 1 and allow to have it built in the
kernel to circumvent the broken u-boot found on these boards.
Currently only the UART, LEDs and buttons are supported.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Replace the simple GPIO chip registration by a platform driver
and make ath79_gpio_init() just register the device.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Allow using the SoC clocks in the device tree.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Add OF support for the CPU and MISC interrupt controllers of most
supported ATH79 devices.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Add the bare minimum to load a device tree.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Make the code simpler and open the way for device tree clocks.
[[email protected]: Resolved conflict with 2a552da6 (MIPS/IRQCHIP: Move
irq_chip from arch/mips to drivers/irqchip.)]
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Wolfram Sang <[email protected]>
Cc: Sergey Ryazanov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9774/
Signed-off-by: Ralf Baechle <[email protected]>
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The DDR controller need to be used by the IRQ controller to flush
the write buffer of some devices before running the IRQ handler.
It is also used by the PCI controller to setup the PCI memory windows.
The current interface used to access the DDR controller doesn't
provides any useful abstraction and simply rely on a shared global
pointer.
Replace this by a simple API to setup the PCI memory windows and use
the write buffer flush independently of the SoC type. That remove the
need for the shared global pointer, simplify the IRQ handler code.
[[email protected]: Folded in Alban Bedel's follup fix.]
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Wolfram Sang <[email protected]>
Cc: Sergey Ryazanov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9773/
Patchwork: http://patchwork.linux-mips.org/patch/10543/
Signed-off-by: Ralf Baechle <[email protected]>
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This register is named PLL_FB and is not a divider but a multiplier.
To make things less confusing rename the ARxxxx_PLL_DIV_SHIFT and
ARxxxx_PLL_DIV_MASK macros to ARxxxx_PLL_FB_SHIFT and
ARxxxx_PLL_FB_MASK.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Wolfram Sang <[email protected]>
Cc: Sergey Ryazanov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9772/
Signed-off-by: Ralf Baechle <[email protected]>
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The memory setup log is missing a new line.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Wolfram Sang <[email protected]>
Cc: Sergey Ryazanov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9771/
Signed-off-by: Ralf Baechle <[email protected]>
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initrd_start is defined in init/do_mounts_initrd.c, which is only
included in kernel if CONFIG_BLK_DEV_INITRD=y.
Signed-off-by: Laurent Fasnacht <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10198/
Signed-off-by: Ralf Baechle <[email protected]>
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At least QCA955x can handle up to 256MBytes.
Signed-off-by: Helmut Schaa <[email protected]>
Cc: [email protected]
Cc: Gabor Juhos <[email protected]>
Cc: Helmut Schaa <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/8738/
Signed-off-by: Ralf Baechle <[email protected]>
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Allow loading an initrd passed by the firmware.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/8354/
Signed-off-by: Ralf Baechle <[email protected]>
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No need to duplicate code that is available in the firmware library.
It also give us access to the firmware environment which is needed
to read the initrd address and size.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/8353/
Signed-off-by: Ralf Baechle <[email protected]>
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The hardware perf event driver and oprofile interpret the global
cp0_perfcount_irq differently: in the hardware perf event driver
it is an offset from MIPS_CPU_IRQ_BASE and in oprofile it is the
actual IRQ number. This still works most of the time since
MIPS_CPU_IRQ_BASE is usually 0, but is clearly wrong. Since the
performance counter interrupt may vary from platform to platform
like the C0 timer interrupt, add the optional get_c0_perfcount_int
hook which returns the IRQ number of the performance counter.
The hook should return < 0 if the performance counter interrupt is
shared with the timer. If the hook is not present, the CPU vector
reported in C0_IntCtl (cp0_perfcount_irq) is used.
Signed-off-by: Andrew Bresticker <[email protected]>
Reviewed-by: Qais Yousef <[email protected]>
Tested-by: Qais Yousef <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Jeffrey Deans <[email protected]>
Cc: Markos Chandras <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Jonas Gorski <[email protected]>
Cc: John Crispin <[email protected]>
Cc: David Daney <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/7805/
Signed-off-by: Ralf Baechle <[email protected]>
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When CONFIG_PCI is disabled, 'db120_pci_init()' had a different
signature than when was enabled. Therefore, compilation failed when
CONFIG_PCI was not present.
arch/mips/ath79/mach-db120.c:132: error: too many arguments to function 'db120_pci_init'
This error was found with vampyr.
Signed-off-by: Stefan Hengelein <[email protected]>
Reviewed-by: Markos Chandras <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/8119/
Signed-off-by: Ralf Baechle <[email protected]>
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USB_ARCH_HAS_EHCI, USB_ARCH_HAS_OHCI, and USB_ARCH_HAS_XHCI were just
removed. Selecting them is a nop. The select statements for these
symbols can be removed too.
Signed-off-by: Paul Bolle <[email protected]>
Acked-by: Alan Stern <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>. Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.
Signed-off-by: Paul Gortmaker <[email protected]>
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/6320/
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In commit 15ef17f622033455dcf03ae96256e474073a7b11
(tty: ar933x_uart: use the clk API to get the uart
clock), the AR933x UART driver for has been converted
to get the uart clock rate via the clock API and it
does not use the platform data anymore.
Remove the ar933x_uart_platform.h header file and get
rid of the superfluous variable and initialization code
in platform setup.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5832/
Signed-off-by: Ralf Baechle <[email protected]>
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The ath79 code uses static clock devices and
provides its own clk_{get,put} implementations.
Change the code to use dynamically allocated
clock devices and register the clocks within
the clkdev framework.
Additionally, remove the local clk_{get,put}
implementation. The clkdev framework has a
common implementation of those.
Also move the call of ath79_clock_init() from
plat_mem_init() to plat_time_init(). Otherwise
it would not be possible to use memory allocation
functions from ath79clock_init() becasuse the
memory subsystem is not yet initialized when
plat_mem_init() runs.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5780/
Signed-off-by: Ralf Baechle <[email protected]>
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Use local variables for ref, cpu, ddr and ahb
rates in SoC specific clock init functions.
The patch has no functional changes, it is
an interim change in preparation of the next
patch.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5781/
Signed-off-by: Ralf Baechle <[email protected]>
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Instead of accessing the rate field of the static
clock devices directly, use the recently introduced
helper function to get the rate of the basic clocks.
The static ath79_{ahb,cpu,ddr,ref}_clk variables
will be removed by a subsequent patch. The actual
change is in preparation of that.
Also move the clock frequency printing code into
the plat_time_init function. We are getting the
cpu clock rate there already so we can save an
extra call of the helper.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5782/
Signed-off-by: Ralf Baechle <[email protected]>
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The ath79 platform uses similar code to get the
rate of various clocks during init. Separate the
similar code into a new helper function and use
that to avoid code duplication.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5778/
Signed-off-by: Ralf Baechle <[email protected]>
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The reference clock rate is passed in the first
argument of the function. Use that instead of the
rate of the global ath79_ref_clk variable.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5779/
Signed-off-by: Ralf Baechle <[email protected]>
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The watchdog device on the AR933x is connected to
the AHB clock, however the current code uses the
reference clock. Due to the wrong rate, the watchdog
driver can't calculate correct register values for
a given timeout value and the watchdog unexpectedly
restarts the system.
The code uses the wrong value since the initial
commit 04225e1d227c8e68d685936ecf42ac175fec0e54
(MIPS: ath79: add AR933X specific clock init)
The patch fixes the code to use the correct clock
rate to avoid the problem.
Cc: [email protected]
Signed-off-by: Felix Fietkau <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5777/
Signed-off-by: Ralf Baechle <[email protected]>
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