| Age | Commit message (Collapse) | Author | Files | Lines |
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au1000_eth uses firmware calls to get a valid MAC address, and changes
it depending on platform device id. This patch moves this logic out of
the driver into the platform device registration part, where boards with
supported chips can use whatever firmware interface they need; the default
implementation maintains compatibility with existing, YAMON-based firmware.
Tested-by: Wolfgang Grandegger <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1481/
Acked-by: David S. Miller <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Remove the SERIAL_8250_AU1X00 config symbol. Instead, use the MIPS_ALCHEMY
one which is always defined when building an Au1x00-based platform.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Linux-serial <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/1461/
Signed-off-by: Ralf Baechle <[email protected]>
This one depends on a previous patch (which removes SOC_AU1X00 and changes
MACH_ALCHEMY) to apply cleanly (and then actually work), so I'd love for
this to go in via the mips tree.
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CONFIG_SOC_AU1000_FREQUENCY doesn't exist in Kconfig, therefore
removing all references for it from the source code.
Signed-off-by: Christoph Egger <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1367/
Signed-off-by: Ralf Baechle <[email protected]>
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[Ralf: Remove a forgotten -Werror in Pb1200 Makefile.]
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Sam Ravnborg <[email protected]>
Cc: Manuel Lauss <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/1319/
Signed-off-by: Ralf Baechle <[email protected]>
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Currently, the eth devices are probed in the inverse order, first
au1xxx_eth1_device and then au1xxx_eth0_device. On the GPR board,
this makes trouble:
# ifconfig|grep HWaddr
eth0 Link encap:Ethernet HWaddr 00:50:C2:0C:30:01
eth1 Link encap:Ethernet HWaddr 66:22:01:80:38:10
A bogous ethernet hwaddr is assigned to the first device and
au1xxx_eth0_device is mapped to eth1, which even does not work
properly. With this patch, the problems are gone:
# ifconfig|grep HWaddr
eth0 Link encap:Ethernet HWaddr 66:22:11:32:38:10
eth1 Link encap:Ethernet HWaddr 66:22:11:32:38:11
Signed-off-by: Wolfgang Grandegger <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1473/
Signed-off-by: Ralf Baechle <[email protected]>
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Split the low-level sleepcode into per-cpu functions instead of
relying on compile-time-defined cpu type.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/1281/
Signed-off-by: Ralf Baechle <[email protected]>
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Add a sysdev for DBDMA PM.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/1119/
Signed-off-by: Ralf Baechle <[email protected]>
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Use a sysdev to implement PM methods for the Au1000 interrupt controllers.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/1114/
Signed-off-by: Ralf Baechle <[email protected]>
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Don't define platform info for second mac on au1100 (which only has a
single mac).
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/1004/
Signed-off-by: Ralf Baechle <[email protected]>
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On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus
area. Currently, addresses at the far end of the 32bit area are assumed
to belong to the PCMCIA area and fixed up to the real 36bit address before
being passed to ioremap().
A previous commit enabled 64 bit physical size for the resource datatype on
Alchemy and this allows to use the correct 36bit addresses when registering
the PCMCIA sockets.
This patch removes the 32-to-36bit address fixup and registers the Alchemy
demo board pcmcia socket with the correct 36bit physical addresses.
Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet
card.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Manuel Lauss <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/994/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
Cc: Manuel Lauss <[email protected]>
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The sole user is au1xxx_calc_clock() which is only used in early bootup
where the is no paralellism thus no race condition to protect against.
Signed-off-by: Ralf Baechle <[email protected]>
Cc: Manuel Lauss <[email protected]>
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Signed-off-by: Frans Pop <[email protected]>
To: [email protected]
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/946/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Yoichi Yuasa <[email protected]>
Cc: linux-mips <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/928/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Yoichi Yuasa <[email protected]>
Cc: linux-mips <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/927/
Signed-off-by: Ralf Baechle <[email protected]>
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Implement reset / poweroff in the board code instead. The peripheral reset
code is gone too since YAMON which all in-tree boards use does the same
work when it boots.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Yoichi Yuasa <[email protected]>
Cc: Linux-MIPS <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/783/
Patchwork: http://patchwork.linux-mips.org/patch/882/
Signed-off-by: Ralf Baechle <[email protected]>
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Use runtime CPU detection instead of relying on preprocessor symbols.
Signed-off-by: Manuel Lauss <[email protected]>
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/701/
Signed-off-by: Ralf Baechle <[email protected]>
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Use the GPIO config symbol to only build Au1000 interrupt code on chips with
compatible hw.
Signed-off-by: Manuel Lauss <[email protected]>
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/670/
Signed-off-by: Ralf Baechle <[email protected]>
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Remove the cpu subtype cpp macros in favor of runtime detection,
to improve compile coverage of the alchemy common code.
(Increases kernel size by 700 bytes).
Signed-off-by: Manuel Lauss <[email protected]>
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/699/
Signed-off-by: Ralf Baechle <[email protected]>
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This patch makes the board code register the au1000-eth platform device. The
au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg
function like it has to be done for the Bosporus board which uses a
different MAC/PHY setup.
Signed-off-by: Florian Fainelli <[email protected]>
Cc: David Miller <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/618/
Signed-off-by: Ralf Baechle <[email protected]>
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Create own directory for DB1200 code and update it with new features.
- SPI support:
- tmp121 temperature sensor
- SPI flash on DB1200
- I2C support
- NE1619 sensor
- AT24 eeprom
- I2C/SPI can be selected at boot time via switch S6.8
- Carddetect IRQs for SD cards.
- gen_nand based NAND support.
- hexleds count sleep/wake transitions.
Signed-off-by: Manuel Lauss <[email protected]>
Cc: Linux-MIPS <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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UART autodetection breaks on the Au1300 but the IP blocks are identical,
at least according to the datasheets. Help the 8250 driver by passing
on uart type information via platform data.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Remove unused uart bit definitions and base macros.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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This patch replaces the general alchemy prom_putchar() implementation
in favor of board-specific versions: The UART where the output of
prom_putchar is directed to really depends on the board, the current
implementation hardcodes this on a per-SoC basis which is just wrong.
So a generic uart tx function is provided in the alchemy headers,
and the boards can provide their own prom_putchar with custom
destination uart, and all in-kernel alchemy boards support
early printk.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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DMA can only be done from physical addresses; move the "virt_to_phys"
source/destination buffer address translation from the dbdma queueing
functions (since the hardware can only DMA to/from physical addresses)
to their respective users.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Remove dbdma compat macros, move remaining users over to default
queueing functions and -flags.
(Queueing function signature has changed in order to give
a build failure instead of silent functional changes due
to the no longer implicitly specified DDMA_FLAGS_IE flag)
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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By replacing an extra do_IRQ with a goto, the assembly shrinks
from 260 to 212 bytes (gcc-4.3.4).
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Eliminate the sharing of IRQ names among the differenct Alchemy
variants. IRQ numbers need no longer be hidden behind a
CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy
code less reliant on a hardcoded subtype.
This patch also renames the GPIO irq number constants. It's really
an interrupt line, NOT a GPIO number!
Code which relied on certain irq numbers to have the same name
across all supported cpu subtypes is changed to determine current
cpu subtype at runtime; in some places this isn't possible so
a "compat" symbol is used.
Run-tested on DB1200.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Raise RTCMATCH2 interrupt priority in case it is used as the system
timer tick.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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The Alchemy hardware provides a method to prioritize interrupts
on a controller by assigning them to a differenct core request line.
Assign usb device request interrupt to IC0 Request 0 (which has
highest priority in the core and the dispatcher) and others to
Request 1. The explicit check for usb device request occurrence
should be obsolete now.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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New PCMCIA socket driver for all Db/Pb1xxx boards (except Pb1000),
which replaces au1000_db1x00.c and (most of) au1000_pb1x00.c.
Notable improvements:
- supports Db1000, DB/PB1100/1500/1550/1200.
- support for carddetect and statuschange IRQs.
- pcmcia socket mem/io/attr areas and irqs passed through
platform resource information.
- doesn't freeze system during card insertion/ejection like
the one it replaces.
- boardtype is automatically detected using BCSR ID register.
Run-tested on the DB1200.
Cc: Linux-PCMCIA <[email protected]>
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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remove board_init_irq(): On all in-kernel boards it is sufficient to
initialize board interrupts in an arch_initcall by using the default
linux irq functions.
Some small irqmap.c files have been folded into board_setup files.
Run-tested on DB1200; compile-tested on all other affected boards.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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DBDMA descriptors need to be located at 32-byte aligned addresses;
however kmalloc in conjunction with the SLAB allocator and
CONFIG_DEBUG_SLUB enabled doesn't deliver any. The dbdma code works
around that by allocating a larger area and realigning the start
address within it.
When freeing a channel however this adjustment is not taken into
account which results in an oops:
Kernel bug detected[#1]:
[...]
Call Trace:
[<80186010>] cache_free_debugcheck+0x284/0x318
[<801869d8>] kfree+0xe8/0x2a0
[<8010b31c>] au1xxx_dbdma_chan_free+0x2c/0x7c
[<80388dc8>] au1x_pcm_dbdma_free+0x34/0x4c
[<80388fa8>] au1xpsc_pcm_close+0x28/0x38
[<80383cb8>] soc_codec_close+0x14c/0x1cc
[<8036dbb4>] snd_pcm_release_substream+0x60/0xac
[<8036dc40>] snd_pcm_release+0x40/0xa0
[<8018c7a8>] __fput+0x11c/0x228
[<80188f60>] filp_close+0x7c/0x98
[<80189018>] sys_close+0x9c/0xe4
[<801022a0>] stack_done+0x20/0x3c
Fix this by recording the address delivered by kmalloc() and using
it as parameter to kfree().
This fix is only necessary with the SLAB allocator and CONFIG_DEBUG_SLAB
enabled; non-debug SLAB, SLUB do return nicely aligned addresses,
debug-enabled SLUB currently panics early in the boot process.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Manuel Lauss <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/878/
Signed-off-by: Ralf Baechle <[email protected]>
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sizeof(dp) is just the size of the pointer. Change it to the size of the
referenced structure.
A simplified version of the semantic patch that finds this problem is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@@
expression *x;
expression f;
type T;
@@
*f(...,(T)x,...)
// </smpl>
Signed-off-by: Julia Lawall <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/789/
Signed-off-by: Ralf Baechle <[email protected]>
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The handle_edge_irq() flowhandler disables edge int sources which occur
too fast (i.e. another edge comes in before the irq handler function
had a chance to finish). Currently, the mask_ack() callback does not
ack the edges in hardware, leading to an endless loop in the flowhandler
where it tries to shut up the irq source.
When I rewrote the alchemy IRQ code I wrongly assumed the mask_ack()
callback was only used by the level flowhandler, hence it omitted the
(at the time pointless) edge acks. Turned out I was wrong; so here
is a complete mask_ack implementation for Alchemy IC, which fixes
the above mentioned problem.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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There are 16 individual channels (NUM_DBDMA_CHANS) to save/restore plus the
global ddma block config (the +1). The last register in a channel can be
skipped since it's read-only (at offset 0x18).
Signed-off-by: Roel Kluin <[email protected]>
Cc: Manuel Lauss <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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(Thanks to Al Viro for reminding me of this, via Ingo)
CPU_MASK_ALL is the (deprecated) "all bits set" cpumask, defined as so:
#define CPU_MASK_ALL (cpumask_t) { { ... } }
Taking the address of such a temporary is questionable at best,
unfortunately 321a8e9d (cpumask: add CPU_MASK_ALL_PTR macro) added
CPU_MASK_ALL_PTR:
#define CPU_MASK_ALL_PTR (&CPU_MASK_ALL)
Which formalizes this practice. One day gcc could bite us over this
usage (though we seem to have gotten away with it so far).
So replace everywhere which used &CPU_MASK_ALL or CPU_MASK_ALL_PTR
with the modern "cpu_all_mask" (a real struct cpumask *), and remove
CPU_MASK_ALL_PTR altogether.
Signed-off-by: Rusty Russell <[email protected]>
Acked-by: Ingo Molnar <[email protected]>
Reported-by: Al Viro <[email protected]>
Cc: Mike Travis <[email protected]>
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loops_per_jiffy depends on coreclk speed; preset it instead of
letting the kernel waste precious microseconds trying to approximate it.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Eliminate the 'allow_au1k_wait' variable. MIPS kernel installs the
Alchemy-specific wait code before timer initialization; if the C0
timer must be used for timekeeping the wait function is set to NULL
which means no wait implementation is available.
As a sideeffect, the 'wait instruction available' output in
/proc/cpuinfo now correctly indicates whether 'wait' is usable.
Run-tested on DB1200.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Replace a few open-coded GPIO register accesses with gpio calls.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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The current in-kernel Alchemy GPIO support is far too inflexible for
all my use cases. To address this, the following changes are made:
* create generic functions which deal with manipulating the on-chip
GPIO1/2 blocks. Such functions are universally useful.
* Macros for GPIO2 shared interrupt management and block control.
* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.
If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
compatibility by directly inlining the GPIO1/2 functions. GPIO access
is limited to on-chip ones and they can be accessed as documented in
the datasheets (GPIO0-31 and 200-215).
If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
one for GPIO2, are registered. GPIOs can still be accessed by using
the numberspace established in the databooks.
However this is not yet flexible enough for my uses: My Alchemy
systems have a documented "external" gpio interface (fixed, different
numberspace) and can support a variety of baseboards, some of which
are equipped with I2C gpio expanders. I want to be able to provide
the default 16 GPIOs of the CPU board numbered as 0..15 and also
support gpio expanders, if present, starting as gpio16.
To achieve this, a new Kconfig symbol for Alchemy is introduced,
CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
that they don't want the Alchemy numberspace exposed to the outside
world, but instead want to provide their own. Boards are now respon-
sible for providing the linux gpio interface glue code (either in a
custom gpio.h header (in board include directory) or with gpio_chips).
To make the board-specific inlined gpio functions work, the MIPS
Makefile must be changed so that the mach-au1x00/gpio.h header is
included _after_ the board headers, by moving the inclusion of
the mach-au1x00/ to the end of the header list.
See arch/mips/include/asm/mach-au1x00/gpio.h for more info.
Signed-off-by: Manuel Lauss <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Fix breakage introduced by 8e19608e8b5c001e4a66ce482edc474f05fb7355.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
Signed-off-by: Yang Hongyang<[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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This patch converts the GPIO board code to use gpiolib.
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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With a postfix decrement t reaches -1 rather than 0, so the fall-back will
not occur.
Signed-off-by: Roel Kluin <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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In Linus' current -git the cpumask member is now a pointer.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Replace the current sysctl-based suspend interface with a new sysfs-
based one which also uses the Linux-2.6 suspend model.
To configure wakeup sources, a subtree for the demoboards is created
under /sys/power/db1x:
sys/
`-- power
`-- db1x
|-- gpio0
|-- gpio1
|-- gpio2
|-- gpio3
|-- gpio4
|-- gpio5
|-- gpio6
|-- gpio7
|-- timer
|-- timer_timeout
|-- wakemsk
`-- wakesrc
The nodes 'gpio[0-7]' and 'timer' configure the GPIO0..7 and M2
bits of the SYS_WAKEMSK (wakeup source enable) register. Writing '1'
enables a wakesource, 0 disables it.
The 'timer_timeout' node holds the timeout in seconds after which the
TOYMATCH2 event should wake the system.
The 'wakesrc' node holds the SYS_WAKESRC register after wakeup (in hex),
the 'wakemsk' node can be used to get/set the wakeup mask directly.
For example, to have the timer wake the system after 10 seconds of sleep,
the following must be done in userspace:
echo 10 > /sys/power/db1x/timer_timeout
echo 1 > /sys/power/db1x/timer
echo mem > /sys/power/sleep
This patch also removes the homebrew CPU frequency switching code. I don't
understand how it could have ever worked reliably; it does not communicate
the clock changes to peripheral devices other than uarts.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
create mode 100644 arch/mips/alchemy/devboards/pm.c
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Implement suspend/resume for DBDMA controller and its channels.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Au1550/Au1200 have a different memory controller which requires additi-
onal code to properly put memory to sleep (code taken from AMD/RMI's
Linux-2.6.11 source package).
Also fix up the remaining pm-related paths to compile on Au1200/Au1550
platforms.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Now that nothing in time.c depends on calc_clock, it can
be moved to clocks.c where it belongs.
While at it, give it a better non-generic name and call it
as soon as possible in plat_mem_init.
Signed-off-by: Manuel Lauss <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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