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2009-06-17[IA64] Convert ia64 to use int-ll64.hMatthew Wilcox1-16/+16
It is generally agreed that it would be beneficial for u64 to be an unsigned long long on all architectures. ia64 (in common with several other 64-bit architectures) currently uses unsigned long. Migrating piecemeal is too painful; this giant patch fixes all compilation warnings and errors that come as a result of switching to use int-ll64.h. Note that userspace will still see __u64 defined as unsigned long. This is important as it affects C++ name mangling. [Updated by Tony Luck to change efi.h:efi_freemem_callback_t to use u64 for start/end rather than unsigned long] Signed-off-by: Matthew Wilcox <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2009-04-01[IA64] BUG to BUG_ON changesStoyan Gaydarov1-2/+1
Replace: if (test) BUG(); with BUG_ON(test); Signed-off-by: Stoyan Gaydarov <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2009-03-31Pull pvops into release branchTony Luck1-0/+2
2009-03-26ia64/pv_ops: implement binary patching optimization for native.Isaku Yamahata1-0/+2
implement binary patching optimization for pv_cpu_ops. With this optimization, indirect call for pv_cpu_ops methods can be converted into inline execution or direct call. Signed-off-by: Isaku Yamahata <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2009-03-16cpumask: prepare for iterators to only go to nr_cpu_ids/nr_cpumask_bits.: ia64Rusty Russell1-2/+2
Impact: cleanup, futureproof In fact, all cpumask ops will only be valid (in general) for bit numbers < nr_cpu_ids. So use that instead of NR_CPUS in various places. This is always safe: no cpu number can be >= nr_cpu_ids, and nr_cpu_ids is initialized to NR_CPUS at boot. Signed-off-by: Rusty Russell <[email protected]> Signed-off-by: Mike Travis <[email protected]> Acked-by: Ingo Molnar <[email protected]>
2008-11-07[IA64] Reserve elfcorehdr memory in CONFIG_CRASH_DUMPJay Lan1-1/+1
IA64 kdump kernel failed to initialize /proc/vmcore in 2.6.28-rc2. A bug was introduced in this patch commit: d9a9855d0b06ca6d6cc92596fedcc03f8512e062 always reserve elfcore header memory in crash kernel The problem was that the call to reserve_elfcorehdr() should be placed in CONFIG_CRASH_DUMP rather than in CONFIG_CRASH_KERNEL, which does not exist. Signed-off-by: Jay Lan <[email protected]> Acked-by: Simon Hormon <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-11-06[IA64] fix boot panic caused by offline CPUsDoug Chapman1-3/+4
This fixes a regression introduced by 2c6e6db41f01b6b4eb98809350827c9678996698 "Minimize per_cpu reservations." That patch incorrectly used information about what CPUs are possible that was not yet initialized by ACPI. The end result was that per_cpu structures for offline CPUs were not initialized causing a NULL pointer reference. Since we cannot do the full acpi_boot_init() call any earlier, the simplest fix is to just parse the MADT for SAPIC entries early to find the CPU info. This should also allow for some cleanup of the code added by the "Minimize per_cpu reservations". This patch just fixes the regressions, the cleanup will come in a later patch. Signed-off-by: Doug Chapman <[email protected]> Signed-off-by: Alex Chiang <[email protected]> CC: Robin Holt <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-10-23Merge branch 'release' of ↵Linus Torvalds1-13/+29
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: (41 commits) [IA64] Fix annoying IA64_TR_ALLOC_MAX message. [IA64] kill sys32_pipe [IA64] remove sys32_pause [IA64] Add Variable Page Size and IA64 Support in Intel IOMMU ia64/pv_ops: paravirtualized instruction checker. ia64/xen: a recipe for using xen/ia64 with pv_ops. ia64/pv_ops: update Kconfig for paravirtualized guest and xen. ia64/xen: preliminary support for save/restore. ia64/xen: define xen machine vector for domU. ia64/pv_ops/xen: implement xen pv_time_ops. ia64/pv_ops/xen: implement xen pv_irq_ops. ia64/pv_ops/xen: define the nubmer of irqs which xen needs. ia64/pv_ops/xen: implement xen pv_iosapic_ops. ia64/pv_ops/xen: paravirtualize entry.S for ia64/xen. ia64/pv_ops/xen: paravirtualize ivt.S for xen. ia64/pv_ops/xen: paravirtualize DO_SAVE_MIN for xen. ia64/pv_ops/xen: define xen paravirtualized instructions for hand written assembly code ia64/pv_ops/xen: define xen pv_cpu_ops. ia64/pv_ops/xen: define xen pv_init_ops for various xen initialization. ia64/pv_ops/xen: elf note based xen startup. ...
2008-10-20always reserve elfcore header memory in crash kernelSimon Horman1-3/+1
elfcore header memory needs to be reserved in a crash kernel. This means that the relevant code should be protected by CONFIG_CRASH_DUMP rather than CONFIG_PROC_VMCORE. Signed-off-by: Simon Horman <[email protected]> Cc: Vivek Goyal <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2008-10-20kdump: add is_vmcore_usable() and vmcore_unusable()Simon Horman1-2/+2
The usage of elfcorehdr_addr has changed recently such that being set to ELFCORE_ADDR_MAX is used by is_kdump_kernel() to indicate if the code is executing in a kernel executed as a crash kernel. However, arch/ia64/kernel/setup.c:reserve_elfcorehdr will rest elfcorehdr_addr to ELFCORE_ADDR_MAX on error, which means any subsequent calls to is_kdump_kernel() will return 0, even though they should return 1. Ok, at this point in time there are no subsequent calls, but I think its fair to say that there is ample scope for error or at the very least confusion. This patch add an extra state, ELFCORE_ADDR_ERR, which indicates that elfcorehdr_addr was passed on the command line, and thus execution is taking place in a crashdump kernel, but vmcore can't be used for some reason. This is tested for using is_vmcore_usable() and set using vmcore_unusable(). A subsequent patch makes use of this new code. To summarise, the states that elfcorehdr_addr can now be in are as follows: ELFCORE_ADDR_MAX: not a crashdump kernel ELFCORE_ADDR_ERR: crashdump kernel but vmcore is unusable any other value: crash dump kernel and vmcore is usable Signed-off-by: Simon Horman <[email protected]> Cc: Vivek Goyal <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2008-10-20kdump: make elfcorehdr_addr independent of CONFIG_PROC_VMCOREVivek Goyal1-1/+8
o elfcorehdr_addr is used by not only the code under CONFIG_PROC_VMCORE but also by the code which is not inside CONFIG_PROC_VMCORE. For example, is_kdump_kernel() is used by powerpc code to determine if kernel is booting after a panic then use previous kernel's TCE table. So even if CONFIG_PROC_VMCORE is not set in second kernel, one should be able to correctly determine that we are booting after a panic and setup calgary iommu accordingly. o So remove the assumption that elfcorehdr_addr is under CONFIG_PROC_VMCORE. o Move definition of elfcorehdr_addr to arch dependent crash files. (Unfortunately crash dump does not have an arch independent file otherwise that would have been the best place). o kexec.c is not the right place as one can Have CRASH_DUMP enabled in second kernel without KEXEC being enabled. o I don't see sh setup code parsing the command line for elfcorehdr_addr. I am wondering how does vmcore interface work on sh. Anyway, I am atleast defining elfcoredhr_addr so that compilation is not broken on sh. Signed-off-by: Vivek Goyal <[email protected]> Acked-by: "Eric W. Biederman" <[email protected]> Acked-by: Simon Horman <[email protected]> Acked-by: Paul Mundt <[email protected]> Cc: Ingo Molnar <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2008-10-17[IA64] Add Variable Page Size and IA64 Support in Intel IOMMUFenghua Yu1-13/+29
The patch contains Intel IOMMU IA64 specific code. It defines new machvec dig_vtd, hooks for IOMMU, DMAR table detection, cache line flush function, etc. For a generic kernel with CONFIG_DMAR=y, if Intel IOMMU is detected, dig_vtd is used for machinve vector. Otherwise, kernel falls back to dig machine vector. Kernel parameter "machvec=dig" or "intel_iommu=off" can be used to force kernel to boot dig machine vector. Signed-off-by: Fenghua Yu <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-09-22[IA64] Ski simulator doesn't need check_sal_cache_flushAlex Chiang1-0/+2
Peter Chubb reported that commit 3463a93def55c309f3c0d0a8aaf216be3be42d64 (Update check_sal_cache_flush to use platform_send_ipi()) broke Ski because it does not implement IPIs. Tony Luck suggested we just #ifndef out the call (since the simulator does not have the SAL bug that this code is attempting to detect and workaround) Signed-off-by: Alex Chiang <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-08-12[IA64] Ensure cpu0 can access per-cpu variables in early boot codeTony Luck1-8/+10
ia64 handles per-cpu variables a litle differently from other architectures in that it maps the physical memory allocated for each cpu at a constant virtual address (0xffffffffffff0000). This mapping is not enabled until the architecture specific cpu_init() function is run, which causes problems since some generic code is run before this point. In particular when CONFIG_PRINTK_TIME is enabled, the boot cpu will trap on the access to per-cpu memory at the first printk() call so the boot will fail without the kernel printing anything to the console. Fix this by allocating percpu memory for cpu0 in the kernel data section and doing all initialization to enable percpu access in head.S before calling any generic code. Other cpus must take care not to access per-cpu variables too early, but their code path from start_secondary() to cpu_init() is all in arch/ia64 Signed-off-by: Tony Luck <[email protected]>
2008-08-01[IA64] Move include/asm-ia64 to arch/ia64/include/asmTony Luck1-1/+1
After moving the the include files there were a few clean-ups: 1) Some files used #include <asm-ia64/xyz.h>, changed to <asm/xyz.h> 2) Some comments alerted maintainers to look at various header files to make matching updates if certain code were to be changed. Updated these comments to use the new include paths. 3) Some header files mentioned their own names in initial comments. Just deleted these self references. Signed-off-by: Tony Luck <[email protected]>
2008-07-17Pull pvops into release branchTony Luck1-0/+10
2008-06-30[IA64] Bugfix for system with 32 cpusTony Luck1-1/+2
On a system where there are no hot pluggable cpus "additional_cpus" is still set to -1 at the point where we call per_cpu_scan_finalize(). If we didn't find an SRAT table and so pick the default "32" for the number of cpus, when we get to: high_cpu = min(high_cpu + reserve_cpus, NR_CPUS); we will end up initializing for just 31 cpus ... and so we will die horribly when bringing up cpu#32. Problem introduced by: 2c6e6db41f01b6b4eb98809350827c9678996698 "Minimize per_cpu reservations." Acked-by: Robin Holt <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-06-24[IA64] Fix boot failure on ia64/sn2Jes Sorensen1-2/+1
Call check_sal_cache_flush() after platform_setup() as check_sal_cache_flush() now relies on being able to call platform vector code. Problem was introduced by: 3463a93def55c309f3c0d0a8aaf216be3be42d64 "Update check_sal_cache_flush to use platform_send_ipi()" Signed-off-by: Jes Sorensen <[email protected]> Tested-by: Alex Chiang: <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-05-27[IA64] pvops: define initialization hooks, pv_init_ops, for paravirtualized ↵Isaku Yamahata1-0/+10
environment. define pv_init_ops hooks which represents various initialization hooks for paravirtualized environment. and add hooks. Signed-off-by: Alex Williamson <[email protected]> Signed-off-by: Isaku Yamahata <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-05-27[IA64] Workaround for RSE issueTony Luck1-0/+11
Problem: An application violating the architectural rules regarding operation dependencies and having specific Register Stack Engine (RSE) state at the time of the violation, may result in an illegal operation fault and invalid RSE state. Such faults may initiate a cascade of repeated illegal operation faults within OS interruption handlers. The specific behavior is OS dependent. Implication: An application causing an illegal operation fault with specific RSE state may result in a series of illegal operation faults and an eventual OS stack overflow condition. Workaround: OS interruption handlers that switch to kernel backing store implement a check for invalid RSE state to avoid the series of illegal operation faults. The core of the workaround is the RSE_WORKAROUND code sequence inserted into each invocation of the SAVE_MIN_WITH_COVER and SAVE_MIN_WITH_COVER_R19 macros. This sequence includes hard-coded constants that depend on the number of stacked physical registers being 96. The rest of this patch consists of code to disable this workaround should this not be the case (with the presumption that if a future Itanium processor increases the number of registers, it would also remove the need for this patch). Move the start of the RBS up to a mod32 boundary to avoid some corner cases. The dispatch_illegal_op_fault code outgrew the spot it was squatting in when built with this patch and CONFIG_VIRT_CPU_ACCOUNTING=y Move it out to the end of the ivt. Signed-off-by: Tony Luck <[email protected]>
2008-05-14[IA64] Don't reserve crashkernel memory > 4 GBBernhard Walle1-0/+29
Some IA64 machines map all cell-local memory above 4 GB (32 bit limit). However, in most cases, the kernel needs some memory below that limit that is DMA-capable. So in this machine configuration, the crashkernel will be reserved above 4 GB. For machines that use SWIOTLB implementation because they lack an I/O MMU the low memory is required by the SWIOTLB implementation. In that case, it doesn't make sense to reserve the crashkernel at all because it's unusable for kdump. A special case is the "hpzx1" machine vector. In theory, it has a I/O MMU, so it can be booted above 4 GB. However, in the kdump case that is not possible because of changeset 51b58e3e26ebfb8cd56825c4b396ed251f51dec9: On HP zx1 machines, the 'machvec=dig' parameter is needed for the kdump kernel to avoid problems with the HP sba iommu. The problem is that during the boot of the kdump kernel, the iommu is re-initialized, so in-flight DMA from improperly shutdown drivers causes an IOTLB miss which leads to an MCA. With kdump, the idea is to get into the kdump kernel with as little code as we can, so shutting down drivers properly is not an option. The workaround is to add 'machvec=dig' to the kdump kernel boot parameters. This makes the kdump kernel avoid using the sba iommu altogether, leaving the IOTLB intact. Any ongoing DMA falls harmlessly outside the kdump kernel. After the kdump kernel reboots, all devices will have been shutdown properly and DMA stopped. This patch pushes that functionality into the sba iommu initialization code, so that users won't have to find the obscure documentation telling them about 'machvec=dig'. This means that also for hpzx1 it's not possible to boot when all memory is above the 4 GB limit. So the only machine vectors that can handle this case are "sn2" and "uv". Signed-off-by: Bernhard Walle <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-04-17Pull miscellaneous into release branchTony Luck1-0/+23
Conflicts: arch/ia64/kernel/mca.c
2008-04-17Pull nptcg into release branchTony Luck1-2/+4
Conflicts: arch/ia64/mm/tlb.c
2008-04-11[IA64] Fix NUMA configuration issueZoltan Menyhart1-0/+23
There is a NUMA memory configuration issue in 2.6.24: A 2-node machine of ours has got the following memory layout: Node 0: 0 - 2 Gbytes Node 0: 4 - 8 Gbytes Node 1: 8 - 16 Gbytes Node 0: 16 - 18 Gbytes "efi_memmap_init()" merges the three last ranges into one. "register_active_ranges()" is called as follows: efi_memmap_walk(register_active_ranges, NULL); i.e. once for the 4 - 18 Gbytes range. It picks up the node number from the start address, and registers all the memory for the node #0. "register_active_ranges()" should be called as follows to make sure there is no merged address range at its entry: efi_memmap_walk(filter_memory, register_active_ranges); "filter_memory()" is similar to "filter_rsvd_memory()", but the reserved memory ranges are not filtered out. Signed-off-by: Zoltan Menyhart <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-04-08[IA64] Minimize per_cpu reservations.[email protected]1-0/+2
This attached patch significantly shrinks boot memory allocation on ia64. It does this by not allocating per_cpu areas for cpus that can never exist. In the case where acpi does not have any numa node description of the cpus, I defaulted to assigning the first 32 round-robin on the known nodes.. For the !CONFIG_ACPI I used for_each_possible_cpu(). Signed-off-by: Robin Holt <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-04-04[IA64] Kernel parameter for max number of concurrent global TLB purgesFenghua Yu1-1/+1
The patch defines kernel parameter "nptcg=". The parameter overrides max number of concurrent global TLB purges which is reported from either PAL_VM_SUMMARY or SAL PALO. Signed-off-by: Fenghua Yu <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-04-04[IA64] Multiple outstanding ptc.g instruction supportFenghua Yu1-2/+4
According to SDM2.2, Itanium supports multiple outstanding ptc.g instructions. But current kernel function ia64_global_tlb_purge() uses a spinlock to serialize ptc.g instructions issued by multiple processors. This serialization might have scalability issue on a big SMP machine where many processors could purge TLB in parallel. The patch fixes this problem by issuing multiple ptc.g instructions in ia64_global_tlb_purge(). It also adds support for the "PALO" table to get a platform view of the max number of outstanding ptc.g instructions (which may be different from the processor view found from PAL_VM_SUMMARY). PALO specification can be found at: http://www.dig64.org/home/DIG64_PALO_R1_0.pdf spinaphore implementation by Matthew Wilcox. Signed-off-by: Fenghua Yu <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-03-06[IA64] remove remaining __FUNCTION__ occurrencesHarvey Harrison1-4/+4
__FUNCTION__ is gcc-specific, use __func__ Long lines have been kept where they exist, some small spacing changes have been done. Signed-off-by: Harvey Harrison <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-02-04[IA64] constify function pointer tablesJan Engelhardt1-1/+1
Signed-off-by: Jan Engelhardt <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2008-01-25sched: remove printk_clock references from ia64Ingo Molnar1-4/+0
remove remaining printk_clock references from ia64. Signed-off-by: Ingo Molnar <[email protected]>
2007-12-07[IA64] rename _bss to __bss_startBernhard Walle1-2/+1
Rename _bss to __bss_start as on other architectures. That makes it possible to use the <linux/sections.h> instead of own declarations. Also add __bss_stop because that symbol exists on other architectures. Signed-off-by: Bernhard Walle <[email protected]> Cc: "Luck, Tony" <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-10-29[IA64] /proc/cpuinfo "physical id" field cleanupsAlex Chiang1-41/+8
Clean up the process for presenting the "physical id" field in /proc/cpuinfo. - remove global smp_num_cpucores, as it is mostly useless - remove check_for_logical_procs(), since we do the same functionality in identify_siblings() - reflow logic in identify_siblings(). If an older CPU does not implement PAL_LOGICAL_TO_PHYSICAL, we may still be able to get useful information from SAL_PHYSICAL_ID_INFO - in identify_siblings(), threads/cores are a property of the CPU, not the platform - remove useless printk's about multi-core / thread capability in identify_siblings(), as that information is readily available in /proc/cpuinfo, and printing for the BSP only adds little value - smp_num_siblings is now meaningful if any CPU in the system supports threads, not just the BSP - expose "physical id" field, even on CPUs that are not multi-core / multi-threaded (as long as we have a valid value). Now we know what sockets Madisons live in too. Signed-off-by: Alex Chiang <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-10-22kexec: add BSS to resource treeBernhard Walle1-3/+11
Add the BSS to the resource tree just as kernel text and kernel data are in the resource tree. The main reason behind this is to avoid crashkernel reservation in that area. While it's not strictly necessary to have the BSS in the resource tree (the actual collision detection is done in the reserve_bootmem() function before), the usage of the BSS resource should be presented to the user in /proc/iomem just as Kernel data and Kernel code. Note: The patch currently is only implemented for x86 and ia64 (because efi_initialize_iomem_resources() has the same signature on i386 and ia64). [[email protected]: coding-style fixes] Signed-off-by: Bernhard Walle <[email protected]> Cc: "Eric W. Biederman" <[email protected]> Cc: Vivek Goyal <[email protected]> Cc: <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Ingo Molnar <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-10-19Use extended crashkernel command line on ia64Bernhard Walle1-42/+46
This patch adapts IA64 to use the generic parse_crashkernel() function instead of its own parsing for the crashkernel command line. Because the total amount of System RAM must be known when calling this function, efi_memmap_init() is modified to return its accumulated total_memory variable. Also, the crashkernel handling is moved in an own function in arch/ia64/kernel/setup.c to make the code more readable. [[email protected]: build fix] Signed-off-by: Bernhard Walle <[email protected]> Cc: "Luck, Tony" <[email protected]> Cc: Vivek Goyal <[email protected]> Cc: "Eric W. Biederman" <[email protected]> Signed-off-by: Kamalesh Babulal <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-10-16[IA64] Fix build for CONFIG_SMP=nTony Luck1-0/+2
d5a7430ddcdb598261d70f7eb1bf450b5be52085 missed a spot where we use cpu_sibling_map and cpu_core_map. These don't exist on a uni-processor build. Wrap #ifdef CONFIG_SMP ... #endif around it. Signed-off-by: Tony Luck <[email protected]>
2007-10-16Convert cpu_sibling_map to be a per cpu variableMike Travis1-4/+8
Convert cpu_sibling_map from a static array sized by NR_CPUS to a per_cpu variable. This saves sizeof(cpumask_t) * NR unused cpus. Access is mostly from startup and CPU HOTPLUG functions. Signed-off-by: Mike Travis <[email protected]> Cc: Andi Kleen <[email protected]> Cc: Christoph Lameter <[email protected]> Cc: "Siddha, Suresh B" <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: "Luck, Tony" <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-09-01[IA64] Enable early console for Ski simulatorPeter Chubb1-6/+2
This patch cleans up the `enable early console for SKI' patch (471e7a44848f467c9b83adc3463d019d2fa8817f), and 1. potentially allows the gensparse_defconfig to work again. (there are other problems running a generic kernel on Ski) 2. fixes the `console registered twice' problem. 3. Cleans up the code by moving the `extern hpsim_cons' declaration to a new asm/hpsim.h file. Thanks to Jes for comments. Signed-off-by: Peter Chubb <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-08-28[IA64] Clear pending interrupts at CPU boot up timeKenji Kaneshige1-0/+5
The pending interrupts can be remaining at boot up time on some platform. This will cause spurious interrupts when interrupt is enabled for the first time. This patch clears IVR at the CPU initialization to eliminate such spurious interrupts. Signed-off-by: Kenji Kaneshige <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-08-17[IA64] Enable early console for Ski simulatorPeter Chubb1-0/+7
When using Ski to debug early startup, it's a bit of a pain not to have printk. This patch enables the simulated console very early. It may be worth conditionalising on the command line... but this is enough for now. Signed-off-by: Peter Chubb <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-07-30[IA64] Remove a few duplicate includesJesper Juhl1-1/+0
This patch removes a few duplicate includes from arch/ia64/ Acked-by: Jes Sorensen <[email protected]> Signed-off-by: Jesper Juhl <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-07-25[IA64] Ensure that machvec is set up takes place before serial consoleHorms1-3/+8
Parse the machvec command line option outside of the early_param() so that ia64_mv is set before any console intialisation that may result from early_param parsing. Signed-off-by: Simon Horman <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-07-19[PATCH] sched: sched_cacheflush is now unusedRalf Baechle1-9/+0
Since Ingo's recent scheduler rewrite which was merged as commit 0437e109e1841607f2988891eaa36c531c6aa6ac sched_cacheflush is unused. Signed-off-by: Ralf Baechle <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2007-07-16serial: convert early_uart to earlycon for 8250Yinghai Lu1-4/+0
Beacuse SERIAL_PORT_DFNS is removed from include/asm-i386/serial.h and include/asm-x86_64/serial.h. the serial8250_ports need to be probed late in serial initializing stage. the console_init=>serial8250_console_init=> register_console=>serial8250_console_setup will return -ENDEV, and console ttyS0 can not be enabled at that time. need to wait till uart_add_one_port in drivers/serial/serial_core.c to call register_console to get console ttyS0. that is too late. Make early_uart to use early_param, so uart console can be used earlier. Make it to be bootconsole with CON_BOOT flag, so can use console handover feature. and it will switch to corresponding normal serial console automatically. new command line will be: console=uart8250,io,0x3f8,9600n8 console=uart8250,mmio,0xff5e0000,115200n8 or earlycon=uart8250,io,0x3f8,9600n8 earlycon=uart8250,mmio,0xff5e0000,115200n8 it will print in very early stage: Early serial console at I/O port 0x3f8 (options '9600n8') console [uart0] enabled later for console it will print: console handover: boot [uart0] -> real [ttyS0] Signed-off-by: <[email protected]> Cc: Andi Kleen <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Russell King <[email protected]> Cc: Gerd Hoffmann <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-07-09sched: zap the migration init / cache-hot balancing codeIngo Molnar1-6/+0
the SMP load-balancer uses the boot-time migration-cost estimation code to attempt to improve the quality of balancing. The reason for this code is that the discrete priority queues do not preserve the order of scheduling accurately, so the load-balancer skips tasks that were running on a CPU 'recently'. this code is fundamental fragile: the boot-time migration cost detector doesnt really work on systems that had large L3 caches, it caused boot delays on large systems and the whole cache-hot concept made the balancing code pretty undeterministic as well. (and hey, i wrote most of it, so i can say it out loud that it sucks ;-) under CFS the same purpose of cache affinity can be achieved without any special cache-hot special-case: tasks are sorted in the 'timeline' tree and the SMP balancer picks tasks from the left side of the tree, thus the most cache-cold task is balanced automatically. Signed-off-by: Ingo Molnar <[email protected]>
2007-05-11[IA64] spelling fixes: arch/ia64/Simon Arlott1-3/+3
Spelling and apostrophe fixes in arch/ia64/. Signed-off-by: Simon Arlott <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-05-07[IA64] Fix some section mismatch errorsTony Luck1-1/+1
Section mismatch: reference to ... .init.text:prefill_possible_map from .text between 'setup_per_cpu_areas' and 'cpu_init' .init.text:iosapic_override_isa_irq from .text between 'iosapic_init' and 'iosapic_remove' Signed-off-by: Tony Luck <[email protected]>
2007-04-30Pull percpu-dtc into release branchTony Luck1-2/+5
2007-04-06[IA64] Fix CPU freq displayed in /proc/cpuinfoVenki Pallipadi1-1/+1
My patch: git commit=95235ca2c20ac0b31a8eb39e2d599bcc3e9c9a10 introduced a bug in IA64 cpuinfo output. Patch changed the proc_freq from 1HZ resolution to 1KHz resolution, but left format string unchanged at " %lu.%06lu". Below is the fix. Thanks to Bjorn for catching this. Signed-off-by: Venkatesh Pallipadi <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-03-20[IA64] Fix get_model_name() for mixed cpu type systemsJack Steiner1-7/+15
If a system consists of mixed processor types, kmalloc() can be called before the per-cpu data page is initialized. If the slab contains sufficient memory, then kmalloc() works ok. However, if the slabs are empty, slab calls the memory allocator. This requires per-cpu data (NODE_DATA()) & the cpu dies. Also noted by Russ Anderson who had a very similar patch. Signed-off-by: Jack Steiner <[email protected]> Signed-off-by: Tony Luck <[email protected]>
2007-03-07[IA64] remove duplicate declaration of efi_initialize_iomem_resourcesHorms1-2/+0
efi_initialize_iomem_resources() is declared in both include/linux/efi.h and arch/ia64/kernel/setup.c. This patch removes the latter. Signed-off-by: Simon Horman <[email protected]> Signed-off-by: Tony Luck <[email protected]>