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Remove the unuse setting and fix the link to 100 M
Signed-off-by: Yang Chen <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
Signed-off-by: Andrew Jeffery <[email protected]>
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The project Minerva which is the platform used by Meta has two boards: the
Chassis Management Module (Minerva) and the Motherboard (Harma), so change
the DTS name to minerva here for CMM use.
Signed-off-by: Yang Chen <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
Signed-off-by: Andrew Jeffery <[email protected]>
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Add linux device tree entry related to
the Meta(Facebook) computer-node system use an AT2600 BMC.
This node is named "Harma".
Signed-off-by: Peter Yin <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
Signed-off-by: Andrew Jeffery <[email protected]>
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This is a relatively low-cost AST2500-based Amd Ryzen 5000 Series
micro-ATX board that we hope can provide a decent platform for OpenBMC
development.
This initial device-tree provides the necessary configuration for
basic BMC functionality such as serial console, KVM support
and POST code snooping.
Signed-off-by: Renze Nicolai <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
Signed-off-by: Andrew Jeffery <[email protected]>
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This is a Xeon board broadly similar (aside from CPU vendor) to the
already-support romed8hm3 (half-width, single-socket, ast2500). It
doesn't require anything terribly special for OpenBMC support, so this
device-tree should provide everything necessary for basic
functionality with it.
Signed-off-by: Zev Weiss <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
Signed-off-by: Andrew Jeffery <[email protected]>
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https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.10, please pull the following:
- Laurent converts the Raspberry Pi firmware DT binding to YAML, updates
the firmware driver to use the proper 'struct device' reference for
DMA mappings and drops unneeded properties from the DT node and
finishes by removing the duplicate firmware-clocks property to
bcm2835-rpi.dtsi. He also added support for the CAM1 camera interface
regulator.
- Uwe adds a pinctrl-based multiplexing description to allow the use of
I2C0 pins to allow usage between the 40-pin Raspberry Pi header and
the CSI and DSI connectors. He then describes the PCF85063 RTC device
available on the CM4 I/O board making use of that pinctrl-based
muxing.
- Arinc updates the Asus RT-AC3100 and RT-AC88U DTs to have proper LED
colors and function properties, NVMEM MAC addresses and removes
duplicates and unnecessary properties and does a few Device Tree
cleanups.. He then adds support for the Asus RT-AC3200 (BCM4709-based)
and RT-AC3500 routers.
- Jean-Michel adds DT nodes for the CSI Unicam camera interfaces on the
Raspberry Pi 4 / BCM2711 SoCs
- Florian adds support for the Ethernet LEDs on Raspberry Pi 4 B and
Raspberry Pi 4 CM boards.
* tag 'arm-soc/for-6.10/devicetree' of https://github.com/Broadcom/stblinux:
arm: dts: bcm2711: Describe Ethernet LEDs
ARM: dts: BCM5301X: Conform to DTS Coding Style on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: Add DT for ASUS RT-AC5300
ARM: dts: BCM5301X: Add DT for ASUS RT-AC3200
dt-bindings: arm: bcm: add bindings for ASUS RT-AC5300
dt-bindings: arm: bcm: add bindings for ASUS RT-AC3200
ARM: dts: bcm2835: Add Unicam CSI nodes
ARM: dts: BCM5301X: remove earlycon on ASUS RT-AC3100 and ASUS RT-AC88U
ARM: dts: BCM5301X: remove duplicate compatible on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: provide address for SoC MACs on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: use color and function on ASUS RT-AC3100 and RT-AC88U
ARM: dts: bcm2711-rpi-4-b: Add CAM1 regulator
ARM: dts: bcm2711-rpi-cm4-io: Add RTC on I2C0
ARM: dts: bcm2711-rpi: Add pinctrl-based multiplexing for I2C0
ARM: dts: bcm2835-rpi: Move duplicate firmware-clocks to bcm2835-rpi.dtsi
ARM: dts: bcm283x: Drop unneeded properties in the bcm2835-firmware node
firmware: raspberrypi: Use correct device for DMA mappings
dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Add gpio child node
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/defconfig
Renesas ARM defconfig updates for v6.10
- Enable support for the Renesas RZ/G2L display unit, DA9062 PMIC, and
RZ/V2H (R9A09G057) SoC in the ARM64 defconfig,
- Refresh shmobile_defconfig for v6.9-rc1.
* tag 'renesas-arm-defconfig-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: shmobile: defconfig: Refresh for v6.9-rc1
arm64: defconfig: Enable R9A09G057 SoC
arm64: defconfig: Enable Renesas DA9062 PMIC
arm64: defconfig: Enable Renesas RZ/G2L display unit DRM driver
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/drivers
STM32 Firewall bus for v6.10, round 1
Highlights:
---------
Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x
platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers
register to the framework to offer firewall services such as access
granting.
This series of patches is a new approach on the previous STM32 system
bus, history is available here:
https://lore.kernel.org/lkml/20230127164040.1047583/
The need for such framework arises from the fact that there are now
multiple hardware firewalls implemented across multiple products.
Drivers are shared between different products, using the same code.
When it comes to firewalls, the purpose mostly stays the same: Protect
hardware resources. But the implementation differs, and there are
multiple types of firewalls: peripheral, memory, ...
Some hardware firewall controllers such as the RIFSC implemented on
STM32MP2x platforms may require to take ownership of a resource before
being able to use it, hence the requirement for firewall services to
take/release the ownership of such resources.
On the other hand, hardware firewall configurations are becoming
more and more complex. These mecanisms prevent platform crashes
or other firewall-related incoveniences by denying access to some
resources.
The stm32 firewall framework offers an API that is defined in
firewall controllers drivers to best fit the specificity of each
firewall.
For every peripherals protected by either the ETZPC or the RIFSC, the
firewall framework checks the firewall controlelr registers to see if
the peripheral's access is granted to the Linux kernel. If not, the
peripheral is configured as secure, the node is marked populated,
so that the driver is not probed for that device.
The firewall framework relies on the access-controller device tree
binding. It is used by peripherals to reference a domain access
controller. In this case a firewall controller. The bus uses the ID
referenced by the access-controller property to know where to look
in the firewall to get the security configuration for the peripheral.
This allows a device tree description rather than a hardcoded peripheral
table in the bus driver.
The STM32 ETZPC device is responsible for filtering accesses based on
security level, or co-processor isolation for any resource connected
to it.
The RIFSC is responsible for filtering accesses based on Compartment
ID / security level / privilege level for any resource connected to
it.
* tag 'stm32-bus-firewall-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
bus: stm32_firewall: fix off by one in stm32_firewall_get_firewall()
bus: etzpc: introduce ETZPC firewall controller driver
bus: rifsc: introduce RIFSC firewall controller driver
of: property: fw_devlink: Add support for "access-controller"
firewall: introduce stm32_firewall framework
dt-bindings: bus: document ETZPC
dt-bindings: bus: document RIFSC
dt-bindings: treewide: add access-controllers description
dt-bindings: document generic access controllers
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/arm
i.MX SoC changes for 6.10:
- Assign the pmu->dev parent to be the platform device for MMDC driver,
so that it doesn't appear directly under /sys/devices/.
* tag 'imx-soc-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Assign parents for mmdc event_source devices
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/defconfig
i.MX defconfig changes for 6.10:
- Enable DW HDMI bridge driver for i.MX8M Plus SoC in arm64 defconfig
- Enable ONBOAD_USB_DEV driver in imx_v6_v7_defconfig to support USB2514
Hub found on imx6qdl-udoo board
* tag 'imx-defconfig-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Update ONBOARD_USB_HUB to ONBOAD_USB_DEV
ARM: imx_v6_v7_defconfig: Select CONFIG_USB_ONBOARD_HUB
arm64: defconfig: Enable DRM_IMX8MP_DW_HDMI_BRIDGE as module
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/defconfig
- add dependency for DRM_SUN8I_DW_HDMI in sunxi defconfig
* tag 'sunxi-config-for-6.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: configs: sunxi: Enable DRM_DW_HDMI
Link: https://lore.kernel.org/r/20240426164354.GA101098@jernej-laptop
Signed-off-by: Arnd Bergmann <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM DTS for v6.10
1. TI: add missing white-spaces for code readability.
2. Aspeed: add vendor prefix to compatibles, to properly describe
hardware, even though Linux drivers match by device name.
* tag 'dt-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: aspeed: Add vendor prefixes to lm25066 compat strings
ARM: dts: ti: omap: minor whitespace cleanup
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX ARM device tree for 6.10:
- New board support: Seeed Studio NPi dev board, UNI-T UTi260B thermal
camera board.
- A couple of IRQ config correction for touchscreen and RC5T619 on
tolino-shine2hd device.
- Add snvs-poweroff support for i.MX7.
- A couple of dtb_check warning fixes on i.MX6SX and i.MX6QDL ESAI.
- Enable USB support for imx6qdl-udoo and imx27-phytec.
- A big series from Uwe Kleine-König to adopt #pwm-cells = <3> for i.MX
devices.
- Other small changes and clean-ups.
* tag 'imx-dt-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (64 commits)
ARM: dts: imx6ul-pico: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6ul-kontron-bl-common: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6ul-kontron-bl-43: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6ul-isiot: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6ul-imx6ull-opos6uldev: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6ul-geam: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6ul-ccimx6ulsbcpro: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6ul-14x14-evk: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6sx-softing-vining-2000: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6sx-sdb: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6sx-nitrogen6sx: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6sll-evk: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6sl-evk: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6q-var-dt6customboard: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6q-prti6q: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6q-pistachio: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6q-novena: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6q-kp: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6qdl-skov-cpu: Use #pwm-cells = <3> for imx27-pwm device
ARM: dts: imx6qdl-savageboard: Use #pwm-cells = <3> for imx27-pwm device
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm32 DeviceTree updates for v6.10
The QCA8074 PHY package found in IPQ4019 is properly described.
The Sony Xperia Z2 Tablet is cleaned up and improved, vibrator support
is added, upon support for Sony Xperia Z3 is added.
Also based on MSM8974, support for Samsung Galaxy S5 China is introduced.
The WiFi board type is added for these "klte" Samsung devices, to select
appropriate NVRAM firmware file.
Based on MSM8226, support for Motorola Moto G (2013) is added.
Nodes representing the PCIe bridges under existing controllers are added
for APQ8064, IPQ4019, IPQ8064, and SDX55.
A number of fixes throughout to improve compliance with DeviceTree
bindings.
* tag 'qcom-arm32-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (22 commits)
ARM: dts: qcom: msm8974: Add DTS for Samsung Galaxy S5 China (kltechn)
ARM: dts: qcom: msm8974-klte-common: Pin WiFi board type
ARM: dts: qcom: msm8974: Split out common part of samsung-klte
ARM: dts: qcom: sdx55: Add PCIe bridge node
ARM: dts: qcom: apq8064: Add PCIe bridge node
ARM: dts: qcom: ipq4019: Add PCIe bridge node
ARM: dts: qcom: ipq8064: Add PCIe bridge node
ARM: dts: qcom: msm8974-sony-shinano: Enable vibrator
ARM: dts: qcom: ipq4019: add QCA8075 PHY Package nodes
ARM: dts: qcom: Add support for Motorola Moto G (2013)
dt-bindings: arm: qcom: Add Motorola Moto G (2013)
ARM: dts: qcom: msm8974: Add empty chosen node
ARM: dts: qcom: msm8974: Add @0 to memory node name
ARM: dts: qcom: Add Sony Xperia Z3 smartphone
ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common
ARM: dts: qcom: msm8916: idle-state compatible require the generic idle-state
ARM: dts: qcom: include cpu in idle-state node names
ARM: dts: qcom: msm8974pro-castor: Rename wifi node name
ARM: dts: qcom: msm8974pro-castor: Add debounce-interval for keys
ARM: dts: qcom: msm8974pro-castor: Remove camera button definitions
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Changes for v6.10-rc1
Adds support for EMC frequency scaling on PAZ100 devices with RAM code 1
and cleans up deprecated device tree properties.
* tag 'tegra-for-6.10-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: tegra20-ac97: Replace deprecated "gpio" suffix
ARM: tegra: paz00: Add emc-tables for ram-code 1
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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Support Control Flow Integrity (CFI) when compiling with
CLANG.
In the as-of-writing LLVM CLANG implementation (v17)
the 32-bit ARM platform is supported by the generic CFI
implementation, which isn't tailored specifically for ARM32
but works well enough to enable the feature.
Tested-by: Kees Cook <[email protected]>
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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This registers a breakpoint handler for the new breakpoint type
(0x03) inserted by LLVM CLANG for CFI breakpoints.
If we are in permissive mode, just print a backtrace and continue.
Example with CONFIG_CFI_PERMISSIVE enabled:
> echo CFI_FORWARD_PROTO > /sys/kernel/debug/provoke-crash/DIRECT
lkdtm: Performing direct entry CFI_FORWARD_PROTO
lkdtm: Calling matched prototype ...
lkdtm: Calling mismatched prototype ...
CFI failure at lkdtm_indirect_call+0x40/0x4c (target: 0x0; expected type: 0x00000000)
WARNING: CPU: 1 PID: 112 at lkdtm_indirect_call+0x40/0x4c
CPU: 1 PID: 112 Comm: sh Not tainted 6.8.0-rc1+ #150
Hardware name: ARM-Versatile Express
(...)
lkdtm: FAIL: survived mismatched prototype function call!
lkdtm: Unexpected! This kernel (6.8.0-rc1+ armv7l) was built with CONFIG_CFI_CLANG=y
As you can see the LKDTM test fails, but I expect that this would be
expected behaviour in the permissive mode.
We are currently not implementing target and type for the CFI
breakpoint as this requires additional operand bundling compiler
extensions.
CPUs without breakpoint support cannot handle breakpoints naturally,
in these cases the permissive mode will not work, CFI will fall over
on an undefined instruction:
Internal error: Oops - undefined instruction: 0 [#1] PREEMPT ARM
CPU: 0 PID: 186 Comm: ash Tainted: G W 6.9.0-rc1+ #7
Hardware name: Gemini (Device Tree)
PC is at lkdtm_indirect_call+0x38/0x4c
LR is at lkdtm_CFI_FORWARD_PROTO+0x30/0x6c
This is reasonable I think: it's the best CFI can do to ascertain
the the control flow is not broken on these CPUs.
Reviewed-by: Kees Cook <[email protected]>
Tested-by: Kees Cook <[email protected]>
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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When we annotate the loop delay code with SYM_TYPED_FUNC_START()
a function prototype signature will be emitted into the object
file above each site called from C, and the delay loop code is
using "fallthroughs" from the different assembly callbacks. This
will not work as the execution flow will run into the prototype
signatures.
Rewrite the code to use explicit branches to the other code
segments and annotate the code using SYM_TYPED_FUNC_START().
Tested on the ARM Versatile which uses the calibrated loop delay.
Tested-by: Kees Cook <[email protected]>
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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Each CPU type ("proc") has assembly calls for initializing and
setting up the MM context, idle and so forth.
These calls have the C form of e.g.:
void cpu_arm920_init(void);
However this prototype is not really specified, instead it is
generated by the glue code in <asm/glue-proc.h> and the prototype
is implicit from the generic prototype defined in <asm/proc-fns.h>
such as cpu_proc_init() in this case. (This is a bit similar to
the "interface" or inheritance concept in other languages.)
To be able to annotate these assembly calls for CFI, they all need
to have a proper C prototype per CPU call.
Define these in a new C file that is only compiled when we use
CFI, and add __ADDRESSABLE() to each so the compiler knows that
these will be addressed (they are not explicitly called in C, they
are called by way of cpu_proc_init() etc).
It is a bit of definitions, but we do not expect new ARM32 CPUs
to appear very much so it should be pretty static.
Tested-by: Kees Cook <[email protected]>
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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Type tag the remaining per-processor assembly using the CFI
symbol macros, in addition to those that were previously tagged
for cache maintenance calls.
This will be used to finally provide proper C prototypes for
all these calls as well so that CFI can be made to work.
Tested-by: Kees Cook <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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Instead of defining all cache flush operations with an assembly
macro in proc-macros.S, provide an explicit struct cpu_cache_fns
for each CPU cache type in mm/cache.c.
As a side effect from rewriting the vtables in C, we can
avoid the aliasing for the "louis" cache callback, instead we
can just assign the NN_flush_kern_cache_all() function to the
louis callback in the C vtable.
As the louis cache callback is called explicitly (not through the
vtable) if we only have one type of cache support compiled in, we
need an ifdef quirk for this in the !MULTI_CACHE case.
Feroceon and XScale have some dma mapping quirk, in this case we
can just define two structs and assign all but one callback to the
main implementation; since each of them invoked define_cache_functions
twice they require MULTI_CACHE by definition so the compiled-in
shortcut is not used on these variants.
Tested-by: Kees Cook <[email protected]>
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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The cache functions to flush user cache (*_flush_user_cache_all)
are in many cases just a branch to the corresponfing userspace or
kernelspace function. These functions also have the same arguments.
Simplify these by using SYM_FUNC_ALIAS() in all affected sites.
The NOP cache has very many similar calls which are just returns,
but it would be confusing to use aliases here, so leave all the
explicit returns and drop a comment on why we are not using aliases.
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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Tag all references to assembly functions with SYM_TYPED_FUNC_START()
and SYM_FUNC_END() so they also become CFI-safe.
When we add SYM_TYPED_FUNC_START() to assembly calls, a function
prototype signature will be emitted into the object file at
(pc-4) at the call site, so that the KCFI runtime check can compare
this to the expected call. Example:
8011ae38: a540670c .word 0xa540670c
8011ae3c <v7_flush_icache_all>:
8011ae3c: e3a00000 mov r0, #0
8011ae40: ee070f11 mcr 15, 0, r0, cr7, cr1, {0}
8011ae44: e12fff1e bx lr
This means no "fallthrough" code can enter a SYM_TYPED_FUNC_START()
call from above it: there will be a function prototype signature
there, so those are consistently converted to a branch or ret lr
depending on context.
Tested-by: Kees Cook <[email protected]>
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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Instead of avoiding CFI entirely on the TLB flush helpers, reorganize
the code so that the CFI machinery can deal with it. The important
things to take into account are:
- functions in asm called indirectly from C need to be defined using
SYM_TYPED_FUNC_START()
- a reference to the asm function needs to be visible to the compiler,
in order to get it to emit the typeid symbol.
The latter means that defining the cpu_tlb_fns structs is best done from
C code, so that the references in the static initializers will be
visible to the compiler.
Signed-off-by: Ard Biesheuvel <[email protected]>
Tested-by: Kees Cook <[email protected]>
Reviewed-by: Sami Tolvanen <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
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We found below OOB crash:
[ 33.452494] ==================================================================
[ 33.453513] BUG: KASAN: stack-out-of-bounds in refresh_cpu_vm_stats.constprop.0+0xcc/0x2ec
[ 33.454660] Write of size 164 at addr c1d03d30 by task swapper/0/0
[ 33.455515]
[ 33.455767] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G O 6.1.25-mainline #1
[ 33.456880] Hardware name: Generic DT based system
[ 33.457555] unwind_backtrace from show_stack+0x18/0x1c
[ 33.458326] show_stack from dump_stack_lvl+0x40/0x4c
[ 33.459072] dump_stack_lvl from print_report+0x158/0x4a4
[ 33.459863] print_report from kasan_report+0x9c/0x148
[ 33.460616] kasan_report from kasan_check_range+0x94/0x1a0
[ 33.461424] kasan_check_range from memset+0x20/0x3c
[ 33.462157] memset from refresh_cpu_vm_stats.constprop.0+0xcc/0x2ec
[ 33.463064] refresh_cpu_vm_stats.constprop.0 from tick_nohz_idle_stop_tick+0x180/0x53c
[ 33.464181] tick_nohz_idle_stop_tick from do_idle+0x264/0x354
[ 33.465029] do_idle from cpu_startup_entry+0x20/0x24
[ 33.465769] cpu_startup_entry from rest_init+0xf0/0xf4
[ 33.466528] rest_init from arch_post_acpi_subsys_init+0x0/0x18
[ 33.467397]
[ 33.467644] The buggy address belongs to stack of task swapper/0/0
[ 33.468493] and is located at offset 112 in frame:
[ 33.469172] refresh_cpu_vm_stats.constprop.0+0x0/0x2ec
[ 33.469917]
[ 33.470165] This frame has 2 objects:
[ 33.470696] [32, 76) 'global_zone_diff'
[ 33.470729] [112, 276) 'global_node_diff'
[ 33.471294]
[ 33.472095] The buggy address belongs to the physical page:
[ 33.472862] page:3cd72da8 refcount:1 mapcount:0 mapping:00000000 index:0x0 pfn:0x41d03
[ 33.473944] flags: 0x1000(reserved|zone=0)
[ 33.474565] raw: 00001000 ed741470 ed741470 00000000 00000000 00000000 ffffffff 00000001
[ 33.475656] raw: 00000000
[ 33.476050] page dumped because: kasan: bad access detected
[ 33.476816]
[ 33.477061] Memory state around the buggy address:
[ 33.477732] c1d03c00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 33.478630] c1d03c80: 00 00 00 00 00 00 00 00 f1 f1 f1 f1 00 00 00 00
[ 33.479526] >c1d03d00: 00 04 f2 f2 f2 f2 00 00 00 00 00 00 f1 f1 f1 f1
[ 33.480415] ^
[ 33.481195] c1d03d80: 00 00 00 00 00 00 00 00 00 00 04 f3 f3 f3 f3 f3
[ 33.482088] c1d03e00: f3 f3 f3 f3 00 00 00 00 00 00 00 00 00 00 00 00
[ 33.482978] ==================================================================
We find the root cause of this OOB is that arm does not clear stale stack
poison in the case of cpuidle.
This patch refer to arch/arm64/kernel/sleep.S to resolve this issue.
From cited commit [1] that explain the problem
Functions which the compiler has instrumented for KASAN place poison on
the stack shadow upon entry and remove this poison prior to returning.
In the case of cpuidle, CPUs exit the kernel a number of levels deep in
C code. Any instrumented functions on this critical path will leave
portions of the stack shadow poisoned.
If CPUs lose context and return to the kernel via a cold path, we
restore a prior context saved in __cpu_suspend_enter are forgotten, and
we never remove the poison they placed in the stack shadow area by
functions calls between this and the actual exit of the kernel.
Thus, (depending on stackframe layout) subsequent calls to instrumented
functions may hit this stale poison, resulting in (spurious) KASAN
splats to the console.
To avoid this, clear any stale poison from the idle thread for a CPU
prior to bringing a CPU online.
From cited commit [2]
Extend to check for CONFIG_KASAN_STACK
[1] commit 0d97e6d8024c ("arm64: kasan: clear stale stack poison")
[2] commit d56a9ef84bd0 ("kasan, arm64: unpoison stack only with CONFIG_KASAN_STACK")
Signed-off-by: Boy Wu <[email protected]>
Reviewed-by: Mark Rutland <[email protected]>
Acked-by: Andrey Ryabinin <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Fixes: 5615f69bc209 ("ARM: 9016/2: Initialize the mapping of KASan shadow memory")
Signed-off-by: Russell King (Oracle) <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
- added multicolor LED node for pinephone
- marked pinephone LEDs to retain status in suspend
- DT cleanups & fixes
- fixed A64 GPU frequency at 432 MHz
- added H616 NMI node
- new boards: PocketBook 614 Plus, Tanix TX1
* tag 'sunxi-dt-for-6.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h616: Add NMI device node
arm64: dts: allwinner: Add Tanix TX1 support
dt-bindings: arm: sunxi: document Tanix TX1 name
ARM: dts: sun5i: Add PocketBook 614 Plus support
dt-bindings: arm: sunxi: Add PocketBook 614 Plus
arm64: dts: allwinner: h616: Fix I2C0 pins
arm64: dts: allwinner: a64: Run GPU at 432 MHz
arm: dts: allwinner: drop underscore in node names
arm64: dts: allwinner: Orange Pi: delete node by phandle
arm64: dts: allwinner: drop underscore in node names
arm64: dts: allwinner: Pine H64: correctly remove reg_gmac_3v3
arm64: dts: allwinner: pinephone: add multicolor LED node
arm64: dts: allwinner: pinephone: Retain LEDs state in suspend
Link: https://lore.kernel.org/r/20240426164510.GA101219@jernej-laptop
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.10, round 1
Highlights:
----------
- MPU:
- STM32MP13:
- Add and enable LTDC display (rocktech,rk043fn48h)
on stm32mp135f-dk.
- Add firewall bus based on ETZPC firewall controller.
- Add PWR regulator support: Can be only used if the platform is
set as "no-secure" (RCC_SECCFGR cleared) either use SCMI
regulator.
- STMP32MP15:
- Add firewall bus based on ETZPC firewall controller.
- Add heartbeat on stm32mp157c-ed1.
- STM32MP25:
- Add firewall bus based on RIFSC firewall controller.
- Add clock support (RCC) based on SCMI clock protocol for root clocks.
- Add all I2C instances and declare i2c2/i2c8 on stm32mp257f-ev1.
- Add all SPI instances. and declare spi3/spi8 on stm32mp257f-ev1.
* tag 'stm32-dt-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (21 commits)
arm64: dts: st: correct masks for GIC PPI interrupts on stm32mp25
arm64: dts: st: add spi3 / spi8 properties on stm32mp257f-ev1
arm64: dts: st: add spi3/spi8 pins for stm32mp25
arm64: dts: st: add all 8 spi nodes on stm32mp251
arm64: dts: st: add i2c2 / i2c8 properties on stm32mp257f-ev1
arm64: dts: st: add i2c2/i2c8 pins for stm32mp25
arm64: dts: st: add all 8 i2c nodes on stm32mp251
arm64: dts: st: add rcc support for STM32MP25
ARM: dts: stm32: enable display support on stm32mp135f-dk board
ARM: dts: stm32: add LTDC pinctrl on STM32MP13x SoC family
ARM: dts: stm32: add LTDC support for STM32MP13x SoC family
dt-bindings: display: simple: allow panel-common properties
ARM: dts: stm32: add PWR regulators support on stm32mp131
media: dt-bindings: add access-controllers to STM32MP25 video codecs
ARM: dts: stm32: add heartbeat led for stm32mp157c-ed1
ARM: dts: stm32: move can3 node from stm32f746 to stm32f769
ARM: dts: stm32: put ETZPC as an access controller for STM32MP13x boards
ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards
ARM: dts: stm32: put ETZPC as an access controller for STM32MP15x boards
ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM changes for v6.10
1. Few cleanups of deprecated properties and node names pointed out by
bindings newly converted to DT schema.
2. Fix S5PV210 NAND node size-cells, pointed out by DT schema.
3. Add FIFO depth to each SPI node so we can avoid matching this through
DTS alias. Difference SPI instances on given SoC have different FIFO
depths.
4. Fix Exynos4212 Galaxy Tab3 usable memory, because stock bootloader is
not telling us truth.
* tag 'samsung-dt-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos4212-tab3: limit usable memory range
ARM: dts: samsung: s5pv210: specify the SPI FIFO depth
ARM: dts: samsung: exynos5420: specify the SPI FIFO depth
ARM: dts: samsung: exynos5250: specify the SPI FIFO depth
ARM: dts: samsung: exynos4: specify the SPI FIFO depth
ARM: dts: samsung: exynos3250: specify the SPI FIFO depth
ARM: dts: samsung: s5pv210: correct onenand size-cells
ARM: dts: samsung: s5pv210: align onenand node name with bindings
ARM: dts: samsung: exynos5800-peach-pi: switch to undeprecated DP HPD GPIOs
ARM: dts: samsung: smdk4412: align keypad node names with dtschema
ARM: dts: samsung: smdk4412: fix keypad no-autorepeat
ARM: dts: samsung: exynos4412-origen: fix keypad no-autorepeat
ARM: dts: samsung: smdkv310: fix keypad no-autorepeat
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree changes for omaps for v6.10
Update n900 charge limit, and make use of the clksel binding for dra7
for the clksel clocks and other dpll output related clocks.
* tag 'omap-for-v6.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra7: Use clksel binding for CTRL_CORE_SMA_SW_0
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_USB
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_PER
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_ABE_PLL_SYS
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_CORE
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_EVE
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_GMAC
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_DRR
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_GPU
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_IVA
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_DSP
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_CORE
ARM: dts: n900: set charge current limit to 950mA
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.
There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).
Signed-off-by: Rob Herring (Arm) <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Jisheng Zhang <[email protected]>
Acked-by: Sudeep Holla <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Acked-by: Heiko Stuebner <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Acked-by: Alim Akhtar <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Acked-by: Shawn Guo <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.10
- Add HDMI capture support for the Function expansion board for the
Eagle development board,
- Add PMIC support for the RZ/G2UL SMARC EVK development board,
- Add thermal, more serial ((H)SCIF), and timer (CMT and TMU) support
for the R-Car V4M SoC,
- Add Timer Unit (TMU) support for the R-Mobile APE6, R-Car Gen2, and
RZ/G1 SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: rzg3s-smarc-som: Fix Ethernet aliases
arm64: dts: renesas: r8a779h0: Add TMU nodes
arm64: dts: renesas: r8a779h0: Add CMT nodes
arm64: dts: renesas: gray-hawk-single: Enable nfsroot
ARM: dts: renesas: r9a06g032: Remove duplicate interrupt-parent
arm64: dts: renesas: gray-hawk-single: Add second debug serial port
arm64: dts: renesas: r8a779h0: Add SCIF nodes
arm64: dts: renesas: r8a779h0: Add remaining HSCIF nodes
ARM: dts: renesas: rcar-gen2: Add TMU nodes
ARM: dts: renesas: rzg1: Add TMU nodes
ARM: dts: renesas: r8a73a4: Add TMU nodes
ARM: dts: renesas: r7s72100: Add interrupt-names to SCIF nodes
arm64: dts: renesas: r8a779h0: Add thermal nodes
arm64: dts: renesas: rzg2ul-smarc: Enable PMIC and built-in RTC, GPIO and ONKEY
arm64: dts: renesas: eagle: Add capture overlay for Function expansion board
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6ul-pico-dwarf.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6ul-pico-hobbit.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6ul-pico-pi.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl.dtb: pwm@20fc000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dtb: pwm@20fc000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6ull-kontron-bl.dtb: pwm@20fc000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
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The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dtb: pwm@20f8000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6ul-isiot-emmc.dtb: pwm@20fc000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6ul-isiot-nand.dtb: pwm@20fc000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6ul-opos6uldev.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6ull-opos6uldev.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6ul-geam.dtb: pwm@20fc000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dtb: pwm@20f0000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6ull-14x14-evk.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6ulz-14x14-evk.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dtb: pwm@22a8000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
There is no need for an explicit status = "okay" in the pwm nodes as
the soc dtsi doesn't disable these devices. Drop these properties, too.
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6sx-sdb-reva.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6sx-sdb-sai.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6sx-sdb-mqs.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
There is no need for an explicit status = "okay" in the pwm node as
the soc dtsi doesn't disable this device. Drop this property, too.
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
There is no need for an explicit status = "okay" in the pwm node as
the soc dtsi doesn't disable this device. Drop this property, too.
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6sll-evk.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
There is no need for an explicit status = "okay" in the pwm node as
the soc dtsi doesn't disable this device. Drop this property, too.
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6sl-evk.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
There is no need for an explicit status = "okay" in the pwm node as
the soc dtsi doesn't disable these devices. Drop this property, too.
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6q-novena.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6q-kp-tpc.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-kp-tpc.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-skov-revc-lt2.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-skov-revc-lt6.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-skov-revc-lt2.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-skov-revc-lt6.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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