aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)AuthorFilesLines
2013-08-25ARM: debug: provide 8250 debug uart flow control configuration optionRussell King6-5/+10
Move the definition out of the machine class debug-macro.S header into the Kconfig files. Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: clean up low level kernel debugging selectionRussell King1-137/+191
It is silly to bury UART selection under multiple levels of choice statements, where the top level choice statement will only list about four entries when a single SoC is selected. Move the UART selection up into the top level choice statement as it was always intended to be. Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: debug: fix wording error in DEBUG_LL_UART_NONE option helpRussell King1-1/+1
The DEBUG_LL_UART_NONE option was moved from the top of the list to the bottom - unfortunately, it still referred to the options "below" rather than "above". Signed-off-by: Russell King <[email protected]>
2013-08-25ARM: 7822/1: add workaround for ambiguous C99 stdint.h typesArd Biesheuvel1-0/+40
The C99 types uintXX_t that are usually defined in 'stdint.h' are not as unambiguous on ARM as you would expect. For the types below, there is a difference on ARM between GCC built for bare metal ARM, GCC built for glibc and the kernel itself, which results in build errors if you try to build with -ffreestanding and include 'stdint.h' (such as when you include 'arm_neon.h' in order to use NEON intrinsics) As the typedefs for these types in 'stdint.h' are based on builtin defines supplied by GCC, we can tweak these to align with the kernel's idea of those types, so 'linux/types.h' and 'stdint.h' can be safely included from the same source file (provided that -ffreestanding is used). int32_t uint32_t uintptr_t bare metal GCC long unsigned long unsigned int glibc GCC int unsigned int unsigned int kernel int unsigned int unsigned long Acked by: Dave Martin <[email protected]> Acked-by: Nicolas Pitre <[email protected]> Acked-by: Mikael Pettersson <[email protected]> Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-08-25[media] ARM: shmobile: Marzen: enable VIN and ADV7180 in defconfigVladimir Barinov1-0/+7
Add the VIN and ADV7180 drivers to 'marzen_defconfig'. Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-25[media] ARM: shmobile: Marzen: add VIN and ADV7180 supportVladimir Barinov1-1/+43
Add ADV7180 platform devices on the Marzen board, configure VIN1/3 pins, and register VIN1/3 devices with the ADV7180 specific platform data. [Sergei: removed superfluous tabulation and inserted empty lines in the macro definition, updated the copyrights, annotated VIN platform data as '__initdata'] Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-25[media] ARM: shmobile: r8a7779: add VIN supportVladimir Barinov3-0/+50
Add VIN clocks and platform devices for R8A7779 SoC; add function to register the VIN platform devices. [Sergei: added 'id' parameter check to r8a7779_add_vin_device(), used '*pdata' in *sizeof* operator there, renamed some variables, annotated vin[0-3]_resources [] and 'vin[0-3]_info' as '__initdata'.] Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-24ARM: ep93xx: vision_ep9307: Use MMC CD and RO GPIOLaurent Pinchart1-52/+5
Pass the CD and RO GPIO numbers to the MMC SPI driver and remove the custom .get_cd() and .get_ro() callback functions. Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: H Hartley Sweeten <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-24ARM: mmp: avoid to include head file in mach-mmpHaojian Zhuang2-0/+12
pxa910_set_wake() & mmp2_set_wake() are both declared in head files of arch/arm/mach-mmp/include/mach directory. If we include these head files in irq-mmp driver, it blocks the multiplatform build. So adjust the code. Signed-off-by: Haojian Zhuang <[email protected]>
2013-08-24irqchip: mmp: support irqchipHaojian Zhuang4-40/+3
Support IRQCHIP & CONFIG_MULTI_IRQ_HANDLER in irq-mmp driver. Signed-off-by: Haojian Zhuang <[email protected]> Reviewed-by: Daniel Drake <[email protected]>
2013-08-24irqchip: move mmp irq driverHaojian Zhuang6-465/+4
Move irq-mmp driver from mach-mmp directory into irqchip directory. It's used to support multiple platform. Signed-off-by: Haojian Zhuang <[email protected]>
2013-08-24[media] ARM: shmobile: BOCK-W: enable VIN and ML86V7667 in defconfigVladimir Barinov1-0/+7
Add the VIN and ML86V7667 drivers to 'bockw_defconfig'. Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-24[media] ARM: shmobile: BOCK-W: add VIN and ML86V7667 supportVladimir Barinov1-0/+41
Add ML86V7667 platform devices on BOCK-W board, configure VIN0/1 pins, and register VIN0/1 devices with the ML86V7667 specific platform data. [Sergei: some macro/comment cleanup; updated the copyrights, removed duplicate 'sh_eth' driver being enabled before registering VIN1 due to a pin conflict, removed superfluous semicolon after iclink[01]_ml86v7667' initializer.] Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-24[media] ARM: shmobile: r8a7778: add VIN supportVladimir Barinov3-0/+42
Add VIN clocks and platform devices on R8A7778 SoC; add function to register the VIN platform devices. [Sergei: added 'id' parameter check to r8a7778_add_vin_device(), used '*pdata' in *sizeof* operator, and added an empty line there; renamed some variables, annotated 'vin[01]_info' and vin[01]_resources[] as '__initdata'.] Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2013-08-23Merge tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman3-38/+44
into next/soc From Shawn Guo: It contains mxs soc changes for 3.12. - Run savedefconfig on mxs_defconfig to clean it up - Fix on mxs_restart() routine for interrupt context calling - A few other random updates and cleanups * tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs: pm: Include "pm.h" ARM: mxs: Simplify detection of CrystalFontz boards ARM: mach-mxs: Remove "TO" string from revision field ARM: mxs: Fix BUG() when invoking mxs_restart() from interrupt context ARM: mxs: Allow DT clock providers ARM: mxs_defconfig: Cleanup mxs_defconfig
2013-08-23Merge tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman36-3231/+4200
into next/soc From Shawn Guo: It contains the imx device tree updates for 3.12. - New pinctrl entry additions for various peripherals - Devices enabling for imx6, imx5 and imx27 boards - Add missing device nodes like iim, owire, audmux and sram, etc. - Various updates on boards like phytec, wandboard and sabresd - Consolidate pad macros between imx6q and imx6dl * tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (92 commits) ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ARM: dts: i.MX27: Increase "clock-latency" value ARM: dts: i.MX27: Add label to CPU node ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC ... Signed-off-by: Kevin Hilman <[email protected]>
2013-08-23Merge branches 'hwmod_devel_v3.12', 'prcm_devel_v3.12' and ↵Paul Walmsley5-30/+73
'am33xx_devel_v3.12' into prcm_a_for_v3.12
2013-08-23Merge tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman19-143/+487
into next/soc From Shawn Guo: It contains a bunch of imx soc updates for 3.12. - Add more ethernet phy fixups for imx6 boards - Add some missing imx6q clocks into clock driver - Add new clock types fixup mux and div to work around some ugly hardware defect - Consolidate L2 cache initialization function, so that it can be used on more i.MX SoCs - Replace magic numbers in mach-imx6q.c with well defined macros - Small fixes for imx6q and pllv3 clock drivers - Some random updates on imx defconfig files * tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (33 commits) phy: micrel: Add definitions for common Micrel PHY registers ARM: imx: Re-select CONFIG_SND_SOC_IMX_MC13783 option ARM: imx: Move anatop related from board file to anatop driver ARM: imx_v6_v7_defconfig: Enable wireless support ARM: imx_v4_v5_defconfig: Cleanup imx_v4_v5_defconfig ARM: imx_v6_v7_defconfig: Add SATA support ARM: imx_v6_v7_defconfig: Cleanup imx_v6_v7_defconfig ARM: mx53: Allow suspend/resume ARM: mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level ARM: imx_v6_v7_defconfig: Select CONFIG_TOUCHSCREEN_EGALAX ARM: imx6q: add vdoa gate clock ARM: imx6q: add the missing cko output selection ARM: imx6q: add cko2 clocks ARM: imx6q: add spdif gate clock ARM: imx: clk-pllv3: improve the timeout waiting method ARM: imx6: change some clocks to fixup clocks ARM: imx: add common clock support for fixup mux ARM: imx: add common clock support for fixup div ARM: imx: Select MIGHT_HAVE_CACHE_L2X0 ARM: imx: fix imx_init_l2cache storage class ...
2013-08-23ARM: OMAP: AM33xx: clock: Add RNG clock dataLokesh Vutla1-0/+5
Add clock data for RNG module on AM33xx SoC. Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: TI81XX: add always-on powerdomain for TI81XXAida Mynzhasova2-0/+9
This patch adds alwon powerdomain support for TI81XX, which is required for stable functioning of a big number of TI81XX subsystems. Signed-off-by: Aida Mynzhasova <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP4: clock: Lock PLLs in the right sequenceRajendra Nayak1-8/+12
On OMAP4 we have clk_set_rate()s being done for a few DPLL clock nodes, as part of the clock init code, since the bootloaders no longer locks these DPLLs. So we have a clk_set_rate() done for a ABE DPLL node (which inturn locks it) followed by a clk_set_rate() for the USB DPLL. With USB DPLL being in bypass, we have this parent->child relationship thats formed while the clocks get registered. dpll_abe_ck | V dpll_abe_x2_ck | V dpll_abe_m3x2_ck | V usb_hs_clk_div_ck | V dpll_usb_ck This is because usb_hs_clk_div_ck is bypass clock for dpll_usb_ck. So with this parent->child relationship in place, a clk_set_rate() on ABE DPLL results eventually in a clk_set_rate() call on USB DPLL, because CCF does a clk_change_rate() (as part of clk_set_rate()) on all downstream clocks resulting from a rate change on the top clock. So its important that we lock USB DPLL before we lock ABE DPLL. Without which we see these error logs at boot. [These error logs will not be seen if using a bootloader that locks USB DPLL] [ 0.000000] clock: dpll_usb_ck failed transition to 'locked' [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] clock: trace_clk_div_ck: could not find divisor for target rate 0 for parent pmd_trace_clk_mux_ck [ 0.000000] Division by zero in kernel. Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: AM33XX: hwmod: Add hwmod data for debugSSVaibhav Hiremath1-22/+47
In the original hwmod data file, DebugSS entry was disabled, since we didn't (and do not) have SW to control it. This patch enables it back with right data, so that it can be controlled by different ways; and the suggested method it to have modular driver for debugSS as well. Refer to the link for more discussion on handling of debugSS - https://patchwork.kernel.org/patch/2212111/ Signed-off-by: Vaibhav Hiremath <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Tony Lindgren <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP2+: Only write the sysconfig on idle when necessaryJon Hunter1-1/+3
Currently, whenever we idle a device _idle_sysc() is called and writes to the devices SYSCONFIG register to set the idle mode. A lot devices are using the smart-idle mode and so the write to the SYSCONFIG register is programming the same value that is already stored in the register. Writes to the devices SYSCONFIG register can be slow, for example, writing to the DMTIMER SYSCONFIG register takes 3 interface clock cycles and 3 functional clock cycles. If the DMTIMER is using the slow 32kHz functional clock this can take ~100us. Furthermore, during boot on an OMAP4430 panda board, I see that there are 100 calls to _idle_sysc(), however, only 3 out of the 100 calls actually write the SYSCONFIG register with a new value. Therefore, to avoid unnecessary writes to device SYSCONFIG registers when idling the device, only write the value if the value has changed. It should be safe to do this on idle as the context of the register will never be lost while the device is active. Verified that suspend, CORE off and retention states are working with this change on OMAP3430 Beagle board. Signed-off-by: Jon Hunter <[email protected]> [[email protected]: updated to apply] Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: Enable PM framework initializationsAmbresh K2-1/+6
Initialise powerdomains, clockdomains, and hwmod frameworks. Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: updated to apply] Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC dataAmbresh K3-0/+2726
Adding the hwmod data for DRA7XX platforms. Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: Reuse the omap44xx_restart and fix the device instanceRajendra Nayak3-4/+18
The omap44xx_restart used on omap4 and omap5 devices can be reused on dra7 devices as well. The device instance however is different across omap5 and dra7 as compared to omap4. So fix this for omap5 as well as dra7. Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: R Sricharan <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: powerdomain: Handle missing vc/vpRajendra Nayak1-0/+10
DRA7 belongs to the omap4plus devices which reuse the omap4_pwrdm_operations ops for powerdomain control. DRA7 however has no VC/VP while all the earlier omap4plus devices did. So use the .pwrdm_has_voltdm() ops to pass this info on to the core. Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: powerdomain: Add DRA7XX data and update headerAmbresh K3-0/+456
Add the data file to describe all power domains inside the DRA7XX SoC. Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: added generation notation to comments] Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: clockdomain: Add DRA7XX data and update headerAmbresh K3-0/+742
Add the data file to describe all clock domains inside the DRA7XX SoC Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: added generation notation to comments] Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: PRCM: Add DRA7XX local MPU PRCM regsitersAmbresh K2-0/+83
Add the PRCM MPU registers for DRA7XX platforms Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: added generation notation to comments] Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: CM: Add minimal regbit shiftsRajendra Nayak1-0/+51
This header contains minimal regbits that are currently used in code. This header has traditionally been autogenerated on OMAP4+ devices but the autogenerated contents are largely (95%) unused and hence to reduce unsued data in the kernel this header has been cut down (from the autogen output) to whatever is currently needed. This is done by running a cleanup script on top of the existing autogen script. Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Ambresh K <[email protected]> [[email protected]: added generation notation in the comments] Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: CM: Add DRA7XX register definesAmbresh K2-0/+837
Add the new defines for DRA7XX CM registers. Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: added generation notation in comments] Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: PRM: Add DRA7XX register definitionsAmbresh K1-0/+678
Add the new defines for DRA7xx prm module registers. Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: added generation notation in the comments] Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23pinctrl: sirf: add lost atlas6 uart0-no-stream-control pingroupQipan Li1-0/+6
the old codes defined uart0_nostreamctrl_pins, but missed pingroup and padmux definition for it. this patch fixes it. Signed-off-by: Qipan Li <[email protected]> Signed-off-by: Barry Song <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2013-08-23ARM: at91/dt: sama5d3xek: reduce the ROM code mapping for pmecc lookup tableJosh Wu1-2/+2
Signed-off-by: Josh Wu <[email protected]>
2013-08-23ARM: at91/dt: sama5d3xek: Enable NFC support in dtsJosh Wu1-3/+12
Signed-off-by: Josh Wu <[email protected]>
2013-08-23ARM: at91/dt: sama5d3xek: remove the useless NFC dt parametersJosh Wu1-2/+0
The NFC driver code doesn't use atmel,has-nfc and atmel,use-nfc-sram. Signed-off-by: Josh Wu <[email protected]>
2013-08-22ARM: highbank: avoid L2 cache smc calls when PL310 is not presentRob Herring1-7/+6
While Midway firmware handles L2 smc calls as nops, the custom smc calls present a problem when running virtualized Midway guest. They aren't needed so just avoid calling them. In the process, cleanup the L2X0 ifdefs and use IS_ENABLED instead. Signed-off-by: Rob Herring <[email protected]>
2013-08-22ARM: move outer_cache declaration out of ifdefRob Herring1-2/+2
Move the outer_cache declaration of the CONFIG_OUTER_CACHE ifdef so that outer_cache can be used inside IS_ENABLED condition. Signed-off-by: Rob Herring <[email protected]> Cc: Russell King <[email protected]>
2013-08-22ARM: highbank: select ARCH_DMA_ADDR_T_64BIT for LPAERob Herring1-0/+1
ECX-2000 has some 64-bit capable DMA and therefore needs dma_addr_t to be a 64-bit size. Signed-off-by: Rob Herring <[email protected]>
2013-08-22Kconfig: Remove hotplug enable hints in CONFIG_KEXEC help textsGeert Uytterhoeven1-2/+1
commit 40b313608ad4ea655addd2ec6cdd106477ae8e15 ("Finally eradicate CONFIG_HOTPLUG") removed remaining references to CONFIG_HOTPLUG, but missed a few plain English references in the CONFIG_KEXEC help texts. Remove them, too. Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: Stephen Rothwell <[email protected]> Acked-by: Ingo Molnar <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2013-08-22Merge tag 'davinci-for-v3.12/dt' of ↵Kevin Hilman3-3/+57
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc From Sekhar Nori: DaVinci DT updates for v3.12 ---------------------------- This set of patches add ethernet DT nodes for DA850 and also remove now unneeded specification of UART clock frequency so kernel can now boot irrespective of what the bootloader setting of UART frequency is. * tag 'davinci-for-v3.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: da850: do not specify clock_frequency for UART DT node ARM: davinci: da850: add DT node for ethernet ARM: davinci: da850: add OF_DEV_AUXDATA entry for davinci_emac ARM: davinci: da850: add OF_DEV_AUXDATA entry for mdio. ARM: davinci: da850: add DT node for mdio device Signed-off-by: Kevin Hilman <[email protected]>
2013-08-22Merge tag 'davinci-for-v3.12/soc' of ↵Kevin Hilman27-201/+272
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc From Sekhar Nori: DaVinci SoC updates for v3.12 ----------------------------- This set of SoC updates contains changes to the way UART clock is handled to enabled DT-boot to obtain UART clock frequency instead of relying on DT-binding being supplied. Similarly handling of MDIO clock is fixed to make it easier to support MDIO in DT-boot. Finally there is patch to remove now unnecessary setting of wake-up capable flag for RTC. * tag 'davinci-for-v3.12/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: fix clock lookup for mdio device ARM: davinci: da8xx: remove hard coding of rtc device wakeup ARM: davinci: serial: remove davinci_serial_setup_clk() ARM: davinci: serial: get rid of davinci_uart_config ARM: davinci: da8xx: remove da8xx_uart_clk_enable ARM: davinci: uart: move to devid based clk_get Signed-off-by: Kevin Hilman <[email protected]>
2013-08-22Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dtKevin Hilman8-1/+88
From Nicolas Ferre: More DT work on AT91: - sound support for at91sam9x5 family - at91sam9n12: touch button, i2c and gpio-keys - adding missing pinctrl-names to MCI on at91rm9200 and at91sam9260/9g20 - adding ARM Performance Monitor Unit (PMU) on sama5d3 * tag 'at91-dt' of git://github.com/at91linux/linux-at91: ARM: at91/dt: sam9x5ek: add sound configuration ARM: at91/dt: sam9x5ek: enable SSC ARM: at91/dt: sam9x5ek: add WM8731 codec ARM: at91/dt: sam9x5: add SSC DMA parameters ARM: at91/dt: add at91rm9200 PQFP package version ARM: at91: at91rm9200: set default mmc0 pinctrl-names ARM: at91: at91sam9n12: correct pin number of gpio-key ARM: at91: at91sam9n12: add qt1070 support ARM: at91: at91sam9n12: add pinctrl of TWI ARM: at91: Add PMU support for sama5d3 ARM: at91: at91sam9260: add missing pinctrl-names on mmc Signed-off-by: Kevin Hilman <[email protected]>
2013-08-22Merge tag 'fixes-for-linus' of ↵Linus Torvalds14-15/+24
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A handful of fixes for 3.11 are still trickling in. These are: - A couple of fixes for older OMAP platforms - Another few fixes for at91 (lateish due to European summer vacations) - A late-found problem with USB on Tegra, fix is to keep VBUS regulator on at all times - One fix for Exynos 5440 dealing with CPU detection - One MAINTAINERS update" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: tegra: always enable USB VBUS regulators ARM: davinci: nand: specify ecc strength ARM: OMAP: rx51: change musb mode to OTG ARM: OMAP2: fix musb usage for n8x0 MAINTAINERS: Update email address for Benoit Cousson ARM: at91/DT: fix at91sam9n12ek memory node ARM: at91: add missing uart clocks DT entries ARM: SAMSUNG: fix to support for missing cpu specific map_io ARM: at91/DT: at91sam9x5ek: fix USB host property to enable port C
2013-08-22Merge tag 'ux500-core-for-arm-soc' of ↵Kevin Hilman6-4/+17
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc From Linus Walleij: Core ux500 changes for v3.12: - Add support for restart using the PRCMU - Move secondary startup out of INIT section - set coherent_dma_mask for DMA40 * tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: set coherent_dma_mask for dma40 ARM: ux500: remove u8500_secondary_startup from INIT section. ARM: ux500: add restart support via prcmu
2013-08-22Merge tag 'nomadik-i2c-for-arm-soc' of ↵Kevin Hilman2-11/+32
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt From Linus Walleij: Enables the standard Nomadik I2C driver for use on the original Nomadik instead of using a bit-banged driver. * tag 'nomadik-i2c-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: nomadik: switch to use the Nomadik I2C driver Signed-off-by: Kevin Hilman <[email protected]>
2013-08-22ARM: dts: vf610-twr: enable i2c0 deviceJingchang Lu1-0/+7
enable i2c0 device on Vybrid VF610 Tower Board Signed-off-by: Jingchang Lu <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2013-08-22ARM: dts: i.MX51: Add one more I2C2 pinmux entryAlexander Shiyan1-0/+7
This adds one more I2C2 alternate pinmux entry. GPIO1_2 <=> SCL GPIO1_3 <=> SDA Signed-off-by: Alexander Shiyan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2013-08-22ARM: dts: i.MX51: Move pins configuration under "iomuxc" labelAlexander Shiyan1-307/+309
This unmix module/pin definitions and reduce indentation for pin groups, so makes template a bit cleaner. Signed-off-by: Alexander Shiyan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.