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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
Merge "ARM: Keystone DTS for 4.6" from Santosh Shilimkar:
ARM: DTS: Add new bindings for K2G and the K2G evm
K2G SoC family is the newest version of the Keystone family of processors.
The technical reference manual for K2G can be found here:
http://www.ti.com/lit/ug/spruhy8/spruhy8.pdf
* tag 'keystone_dts_for_4.6_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone: Add minimum support for K2G evm
ARM: dts: keystone: Add Initial DT support for TI K2G SoC family
ARM: keystone: Create new binding for K2G SoC
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This makes it possible to automatically boot-test this defconfig with
kernelci.org.
Signed-off-by: Jan Luebbe <[email protected]>
Signed-off-by: Michael Grzeschik <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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Regenerate multi_v5_defconfig by running:
make multi_v5_defconfig
make savedefconfig
mv defconfig arch/arm/configs/multi_v5_defconfig
Signed-off-by: Jan Luebbe <[email protected]>
Signed-off-by: Michael Grzeschik <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci EDMA enhancements for v4.6" from Sekhar Nori:
Pass dma_slave_map data to EDMA driver. This will help
migration to new DMA engine API for requesting
slave channels dma_request_chan().
* tag 'davinci-for-v4.6/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: dm646x: Add dma_slave_map to edma
ARM: davinci: dm644x: Add dma_slave_map to edma
ARM: davinci: dm365: Add dma_slave_map to edma
ARM: davinci: dm355: Add dma_slave_map to edma
ARM: davinci: devices-da8xx: Add dma_slave_map to edma
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC Updates for v4.6" from Simon Horman:
* Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains
* Move emev2_smp_ops to emev2
* Remove legacy map_io callbacks on r8a7740 and emev2 SoCs
* Migrate to generic l2c OF initialization on r8a7740
* tag 'renesas-soc-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains
ARM: shmobile: emev2: Move declaration of emev2_smp_ops to emev2.h
ARM: shmobile: emev2: Remove legacy machine_desc.map_io() callback
ARM: shmobile: r8a7740: Remove legacy machine_desc.map_io() callback
ARM: shmobile: r8a7740: Remove mapping of L2 cache controller registers
ARM: shmobile: r8a7740: Migrate to generic l2c OF initialization
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
Merge "Second Round of Renesas ARM Based SoC Cleanup for v4.6" from Simon Horman:
* Remove stale comment from Kconfig
* Consolidate SCU mapping code
* tag 'renesas-cleanup2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Kconfig: Get rid of old comment
ARM: shmobile: Consolidate SCU mapping code
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.6 merge window. Mostly just
adding board specific devices and few new boards:
- N900 improvments for adp1653 and gpio keys
- Add missing bandgap data for omap3
- Add more devices for compulab cm-t335
- Add n950 WLAN support, enable modem, add pinctrl for SSI
- Correct dm814x and dra62x auxclk rate, add support for GPMC and NAND
- Add syscon node for PHY's on dra7
- Add support more devices on logicpd torpedo
- Add USB host support for igep and specify boot console
- Fix audio clock for am335x-sl50 and specify boot console
- Remove deprecated tx-fifo-resize for dwc3 that was only used on
omap5 es1.0
- Add dra7 thermal data
- Update am43x-epos-evm compatible string to am438
- Add support for logicpd dm3730 som-lv
* tag 'omap-for-v4.6/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (38 commits)
ARM: dts: am57xx-beagle-x15: Add eeprom information
ARM: dts: Add HSUSB2 EHCI Support to Logic PD DM37xx SOM-LV
ARM: dts: n900: Use linux input defines instead hardcoded constants
ARM: DTS: Add minimal Support for Logic PD DM3730 SOM-LV
ARM: dts: omap3logic: Add PWM-Backlight
ARM: dts: omap3-n900: Allow gpio keys to be disabled
ARM: dts: am43x-epos-evm: Add the am438 compatible string
ARM: dts: DRA7: Add missing IVA and DSPEVE thermal domain data
ARM: dts: DRA7: Add IVA thermal data
ARM: dts: DRA7: Add DSPEVE thermal data
ARM: dts: remove deprecated property dwc3
ARM: dts: OMAP3-N950-N9: Add ssi idle pinctrl state
ARM: dts: am335x-sl50: Fix audio codec setup.
ARM: dts: am335x-sl50: Specify the device to be used for boot console output.
ARM: dts: omap3-igep0030-common: Add USB Host support
ARM: dts: igep00x0: Specify the device to be used for boot console output.
ARM: dts: LogicPD Torpedo: Set HSUSB0 Pin Mux
ARM: dts: OMAP3-N950-N9: Enable modem
ARM: dts: OMAP3-N950-N9: Enable SSI module
ARM: dts: LogicPD Torpedo: Add SPI EEPROM
...
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next/soc
Merge "ARM: mediatek: soc updates for v4.6" from Matthias Brugger:
Fix state machine implemenation of PMIC wrapper.
Add SMP support for mt7623.
Disable watchdog of STAUPD in PMIC wrapper for mt8173.
Add SMP support for mt2701.
Use builtin_platform_driver for scpsys. Driver can't be build as module.
Fix regulator enablement in scpsys.
* tag 'v4.5-next-soc' of https://github.com/mbgg/linux-mediatek:
soc: mediatek: SCPSYS: Fix double enabling of regulators
soc: mediatek: SCPSYS: use builtin_platform_driver
ARM: mediatek: add mt2701 smp bringup code
soc: mediatek: PMIC wrap: clear the STAUPD_TRIG bit of WDT_SRC_EN
ARM: mediatek: add MT7623 smp bringup code
soc: mediatek: PMIC wrap: Clear the vldclr if state machine stay on FSM_VLDCLR state.
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Merge "ARM: mediatek: dts updates for v4.6" from Matthias Brugger:
Add support for mt7623 SoC.
Enable SMP support for mt7623.
Enable SMP support for mt2701
Add pinctrl for mt2701
* tag 'v4.5-next-dts' of https://github.com/mbgg/linux-mediatek:
arm: dts: Add pinctrl/GPIO/EINT node for mt2701
ARM: dts: mt2701: enable basic SMP bringup for mt2701
ARM: dts: mt7623: enable SMP bringup
ARM: dts: mediatek: add MT7623 basic support
Document: DT: Add bindings for mediatek MT7623 SoC Platform
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OrangePi Plus board has dwo leds - green ("pwr") and red ("status")
and a switch ("sw4"). This patch describes them in a devicetree.
Signed-off-by: Krzysztof Adamski <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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This patch adds correct aliases to spi and i2c buses so that they get
correct matching bus numbers.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds i2c6 device node and pinctrls required for IFC6410 on
MIPI-CSI connector.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch enables i2c bus for camera via mipi-csi connector on ifc6410.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds gsbi4 and i2c node.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds missing i2c2 pinctrl information in i2c2 node.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch enables spi device on the 30 pin expansion connector.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds spi5 device node, spi5 is used on ifc6410 on the
expansion connector.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds missing i2c pinctrl sleep states.
Also add 16mA drive strength to the pins so that we can detect wide
range of i2c devices on the other side of level shifters.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds PCIE support to APQ8064, tested with Ethernet on
Compulab QS600 board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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As there are more pinctrls to come, moving these to dedicated dtsi makes
more sense.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch fixes i2c lables to be inline with serial labels.
The reason to do this is that it would look odd if we add aliases in the
board file along with serial.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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LogicPD has two main Torpedo styles, a version with wireless and a version
without wireless. This version has Bluetooth and WiFi, but there really
isn't an easy way to identify them automatically. This simply adds
"Wireless" to the model to distinguish it from the 'base' model that will
come soon.
Signed-off-by: Adam Ford <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Looks like we have few cases with wrong clock, and some
entries with missing clock. It should always be sysclk6
for the l4_ls instance.
Cc: Paul Walmsley <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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This allows RTC to work properly with the related DTS
changes.
Cc: Paul Walmsley <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add RTC entry for dm816x.
Signed-off-by: Tony Lindgren <[email protected]>
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Add RTC entry for dm814x and dra62x.
Signed-off-by: Tony Lindgren <[email protected]>
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Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] dm816x TRM: SPRUGX8C: 9.2.4.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] AM335x TRM: SPRUH73L: 7.1.3.3.12.2 NAND Device-Ready Pin
Cc: Teresa Remmet <[email protected]>
Cc: Ilya Ledvich <[email protected]>
Cc: Yegor Yefremov <[email protected]>
Cc: Rostislav Lisovy <[email protected]>
Cc: Enric Balletbo i Serra <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Cc: Teresa Remmet <[email protected]>
Cc: Ilya Ledvich <[email protected]>
Cc: Yegor Yefremov <[email protected]>
Cc: Rostislav Lisovy <[email protected]>
Cc: Enric Balletbo i Serra <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] AM437x TRM: SPRUHL7D: 9.1.3.3.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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wait pin monitoring is not used for nand so it is pointless to
have the gpmc,wait-monitoring-ns property.
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/fixes-non-critical
Warning fixes for DaVinci collected while testing
randconfig builds.
* tag 'davinci-for-v4.6/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: make I2C support optional
ARM: davinci: DA8xx+DMx combined kernels need PATCH_PHYS_VIRT
ARM: davinci: avoid unused mityomapl138_pn_info variable
ARM: davinci: limit DT support to DA850
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The atlas7 clock controller driver registers a reset controller
for itself, which causes a link error when the subsystem is
disabled:
drivers/built-in.o: In function `atlas7_clk_init':
drivers/clk/sirf/clk-atlas7.c:1681: undefined reference to `reset_controller_register'
As the clk driver does not have a Kconfig symbol for itself
but it always built-in when the platform is enabled, we have
to ensure that the reset controller subsystem is also built-in
in this case.
Signed-off-by: Arnd Bergmann <[email protected]>
Acked-by: Philipp Zabel <[email protected]>
Fixes: 301c5d29402e ("clk: sirf: add CSR atlas7 clk and reset support")
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The cpu_die and cpu_kill callbacks are only used when CONFIG_HOTPLUG_CPU
is enabled, otherwise we get a warning about them:
arch/arm/mach-socfpga/platsmp.c:102:13: error: 'socfpga_cpu_die' defined but not used [-Werror=unused-function]
arch/arm/mach-socfpga/platsmp.c:115:12: error: 'socfpga_cpu_kill' defined but not used [-Werror=unused-function]
This adds the appropriate #ifdef.
Signed-off-by: Arnd Bergmann <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
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The code was executing a return with a pointer before reaching
iounmap().
Reported-by: David Binderman <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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Clang complains about the __initdata section attribute being in the
wrong place in two files of ks8695:
arch/arm/mach-ks8695/cpu.c:37:31: error: '__section__' attribute only applies to functions and global variables
arch/arm/mach-ks8695/board-og.c:83:31: error: '__section__' attribute only applies to functions and global variables
This moves the attribute to the correct place.
Signed-off-by: Arnd Bergmann <[email protected]>
Acked-by: Greg Ungerer <[email protected]>
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Enable configuration options useful for Vybrid:
- NFC NAND driver
- USB dual-role controller (and Chipidea Gadget support)
- Built-in EDMA DMA driver (to be available at LPUART probe)
- Vybrid ADC driver
- IIO hwmon support (used in i.MX 23/28, patch pending for Vybrid)
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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They are not symmetric with each other, neither are used in real world
(can not be found by grep command in source code root directory), so
remove them.
Signed-off-by: Chen Gang <[email protected]>
Acked-by: Russell King <[email protected]>
Acked-by: Greg Ungerer <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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Pull KVM fixes from Paolo Bonzini:
"KVM/ARM fixes:
- Fix per-vcpu vgic bitmap allocation
- Do not give copy random memory on MMIO read
- Fix GICv3 APR register restore order
KVM/x86 fixes:
- Fix ubsan warning
- Fix hardware breakpoints in a guest vs. preempt notifiers
- Fix Hurd
Generic:
- use __GFP_NOWARN together with GFP_NOWAIT"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: x86: MMU: fix ubsan index-out-of-range warning
arm64: KVM: vgic-v3: Restore ICH_APR0Rn_EL2 before ICH_APR1Rn_EL2
KVM: async_pf: do not warn on page allocation failures
KVM: x86: fix conversion of addresses to linear in 32-bit protected mode
KVM: x86: fix missed hardware breakpoints
arm/arm64: KVM: Feed initialized memory to MMIO accesses
KVM: arm/arm64: vgic: Ensure bitmaps are long enough
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s3c24xx implements its own inb/outb macros, but the implementation
prints warnings when the port number argument is not a 32-bit scalar:
drivers/scsi/pas16.c: In function 'NCR5380_pwrite':
arch/arm/mach-s3c24xx/include/mach/io.h:193:68: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
#define __ioaddrc(port) ((__PORT_PCIO(port) ? PCIO_BASE + (port) : (void __iomem *)(port)))
This slightly modifies the definition of the __ioaddrc macro to avoid
the warning.
Signed-off-by: Arnd Bergmann <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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The core clock does not depend on corediv, so enabling corediv
based on the clock is not really correct. Move the corediv
config option from the clock driver Kconfig to the mvebu Kconfig
so that it can be enabled by the MACH option instead.
This also enables corediv on Armada 375 and 38X, which was
previously missing.
Signed-off-by: Kevin Smith <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Cc: Thomas Petazzoni <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Add the 1588 timer node for ls1021a platform to
support gianfar ptp driver.
Signed-off-by: Yangbo Lu <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
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The H3 ir receiver is completely compatible with the one found in the A31.
Signed-off-by: Hans de Goede <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Add the corresponding device node for R_PIO on H3 to the dtsi. Support
for the controller was added in earlier commit.
Signed-off-by: Krzysztof Adamski <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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APB0 is bearly mentioned in H3 User Manual and it is only setup in the
Allwinners kernel dump for CIR. I have verified experimentally that the
gate for R_PIO exists and works, though. There are probably other gates
there but I don't know their order right now and I don't have access to
their peripherals on my board to test them.
After some experiments and reviewing how this is organized on other
sunxi SoCs, I couldn't actually find any way to disable clocks for R_PIO
and they are working properly without doing anything so I assume they
are connected straight to the 24Mhz oscillator for now.
Signed-off-by: Krzysztof Adamski <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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